Hypres (United States)

The Josephson balanced comparator (BC) is a key component for all RSFQ/ERSFQ logic cells. Its frequency-dependent properties (gray zone and threshold current value) define the maximum clock frequency and bit error rate (BER) of RSFQ/ERSFQ circuits. The balanced comparator can also be used for various monitoring purposes. In this paper, we focus on clock sources and analyze several of them by means of BCs. We show experimentally how local overheating, associated with sub-optimally designed analog clock sources, can compromise the HF performance of a balanced comparator as well as an RFSQ/ERSFQ circuit on the same chip. We also investigate a clock source based on an external HF generator followed by an on-chip DC/SFQ converter and a frequency doubler. We use the balanced comparator's performance to optimize the on-chip part of the clock source at HF. In addition, we verify the advantage of overshunting the comparator driver to achieve higher clock frequency and lower BER. All test circuits were designed for the SFQ5ee fabrication node at MIT-LL, but conclusions can be applied to other fabrication processes.

Abstract BackgroundElicit AI aims to simplify and accelerate the systematic review process without compromising accuracy. However, research on Elicit’s performance is limited.ObjectivesTo determine whether Elicit AI is a viable tool for systematic literature searches.MethodsWe compared the included studies in four systematic reviews to those identified searching with Elicit. We calculated sensitivity, precision and observed patterns in the performance of Elicit.ResultsElicit had an average of 39.6% precision (26.7% - 46.2%) which was higher than the 7.55% average of the original reviews (0.65% - 14.7%). However, the sensitivity of Elicit was poor, averaging 37.9% (25.5% - 69.2%) compared to 93.5% (87.2% - 98.0%) in the original reviews. Elicit also identified some included studies not identified by the original searches.DiscussionAt the time of this evaluation, Elicit did not search with high enough sensitivity to replace traditional literature searching. However, the high precision of searching in Elicit could prove useful for preliminary searches, and the unique studies identified mean that Elicit can be used by researchers as a useful adjunct.ConclusionWhilst Elicit searches are currently not sensitive enough to replace traditional searching, Elicit is continually improving, and further evaluations should be undertaken as new developments take place.Key MessagesAI tools, such as Elicit, have been developed to improve the efficiency of systematic review processes, including the identification of studies.Using four case study systematic reviews Elicit searches had a sensitivity between 25.5% and 69.2% (37.9% average) and precision between 26.7% and 46.2% (39.6% average).Elicit identified some unique studies that met the inclusion criteria for each of the case study systematic reviews.Elicit is constantly improving and developing its systems, thus independent researchers should continue to evaluate its performance.

The balanced comparator, a pair of Josephson junctions, is a key building block and decision-making element for the Rapid Single Flux Quantum (RSFQ) logic cells. The properties of the balanced comparator (BC) define the maximum clock frequency and bit error rate (BER) of RSFQ cells and circuits. Comparators are well characterized by two parameters, the gray zone (GZ) and the gray zone threshold (GZT). Both parameters depend on the dynamic properties of a pair of junctions forming the BC and its surrounding circuitry. In addition, the gray zone depends on the thermal noise in Josephson junctions. The GZ and GZT parameters can be easily measured for various balanced comparators and be used for model-to-hardware correlations. This makes the balanced comparator a unique circuit to validate and calibrate any Josephson simulator by comparing measured and simulated characteristics, including both dynamic and noise properties. In this paper we used a set of balanced comparators designed for the SFQ5ee fabrication process at MIT Lincoln Laboratory to validate and calibrate the Synopsys PrimeSim HSPICE simulator. We were able to match experimental and simulated results and reproduce in simulations the main features observed experimentally and predicted theoretically. A list of recommended design variations to validate a Josephson simulator is provided.

Fast time-to-digital converters (TDCs), used to convert a continuous time interval into discrete number for further processing, serve diverse applications ranging from photon/particle detectors to communication systems employing delay-encoded pulses. Being a multi-rate digital circuit, the TDC is also a good candidate to explore operation of Energy-Efficient Rapid Single Flux Quantum (ERSFQ) circuits at high (>10 GHz) clock frequency. We designed a TDC using ERSFQ cells, targeting the 10-kA/cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> SFQ5ee fabrication process at MIT Lincoln Laboratory. The main elements of the circuit comprise a 9-bit binary ripple counter and a parallel-to-serial converter. A frequency divider and a pulse distribution network with a decision-making element are designed to control the operation. The ERSFQ TDC was operated up to 25 GHz clock frequency (40 ps time resolution) and with a power consumption of around 14 μW for all ERSFQ components. The design specifications such as number of junctions and area will be discussed together with the power delivery technique involving an over-pumped feeding Josephson transmission line (JTL).

We describe an approach to the integrated control and measurement of a large-scale superconducting multiqubit array comprising up to 108 physical qubits using a proximal coprocessor based on the Single Flux Quantum (SFQ) digital logic family. Coherent control is realized by irradiating the qubits directly with classical bitstreams derived from optimal control theory. Qubit measurement is performed by a Josephson photon counter, which provides access to the classical result of projective quantum measurement at the millikelvin stage. We analyze the power budget and physical footprint of the SFQ coprocessor and discuss challenges and opportunities associated with this approach.

We have devised a digital time-division multiplexing (TDM) scheme for minimizing the circuit complexity required for an array of sensors. As a proof-of-concept, we have designed, fabricated, and tested a four-channel digital TDM readout circuit. The proposed scheme can be generalized for a larger number of channels. The readout circuit comprises an array of ADCs to digitize sensor outputs, a multiplexing unit, a clock controller, and a counter with parallel-to-serial output interface. For demonstration purposes, we employed low-pass phase modulation–demodulation ADCs running in a synchronous mode of operation. To facilitate an independent verification of circuit operation, we also placed an on-chip pattern generator to apply a unique pattern to each channel. The multiplexing unit is based on an array of sequentially triggered switches, each controlling the flow of data from a single ADC to a common output bus. In our scheme, the switches are realized using RS-flip-flops with nondestructive (RSN) readout cells with only one RSN cell turned on at a time. Multiplexed output data were stored in ripple counter based on T-flip-flops and read out to room temperature electronics using a serial interface. The chip was immersed in liquid helium at 4.2-K temperature and extensively evaluated at sampling frequencies up to 12.8 GHz. By means of embedded pattern generators, we proved the correct operation of each channel and of all four channels combined. We also were able to perform reconstruction of a signal applied to individual ADC. The chip was fabricated using HYPRES’ 4.5-kA/cm2 process with four Nb metal layers. We briefly discuss the proposed scheme's scalability for higher current density and smaller feature size fab processes.

We report the results of a study of the current gain in high Josephson critical current density ( j ${}_{\rm c}$ ) superconducting-ferromagnetic transistors with the SISFIFS structure [where S, I, and F denote a superconductor (Nb), an insulator (AlO ${}_{x}$ ), and a ferromagnetic material (permalloy, Py), respectively]. The Nb/AlO ${}_{x}$ /Nb trilayer, which serves as the acceptor (SIS) junction, is estimated to have Josephson critical current density j ${}_{\rm c}$ of 19 kA/cm2. The Al/Py/Al/AlO ${}_{x}$ /Py/Al/Nb multilayer is deposited in a separate vacuum run after in situ ion milling of about 8 nm of the top Nb layer. The devices are patterned using optical lithography and tested at 4.2 K. We have observed a small-signal current gain in the range of 5–9. We demonstrate that proper device engineering allows one to efficiently control the maximum Josephson current in the SISF acceptor junction using the quasiparticle injection.

We describe how to use correctly an active electrically small antenna (ESA) based on superconducting quantum array (SQA) to ensure a highly linear voltage output of the antenna. An interface to the antenna ought to realize strongly mismatched loading of the active ESA. To provide the optimal conjugation of the antenna with the load device such as a low-impedance superconductor analog-to-digital converter, several measures are formulated, including the assignment of the proper SQA design configuration and the implementation of a broadband superconducting impedance transformer in the interface waveguide line. A directional diagram of the SQA-based ESA has been obtained through a three-dimensional full-wave numerical simulation.

Magnetic resonance imaging (MRI) requires a sensitive radio receiver to detect the weak resonant magnetic field from nuclear spins, usually hydrogen in biological tissues. In a typical static magnetic field of 1.5 T, a transient RF magnetic field at 63 MHz must be measured to fT amplitudes. This must be amplified and then digitized with an analog-to-digital converter (ADC) with a high dynamic range (typically 16 bits), in order to obtain high image resolution. As the magnetic field is increased in order to obtain even finer resolution, the required dynamic range is expected to increase further. A superconductor ADC (oversampling at 20 GHz) has previously been demonstrated to exhibit very high dynamic range (up to 24 bits) as part of a receiver for broadband digital-RF communication. Here, we present preliminary results on a similar ADC applied to a 4 T commercial small-animal MRI system, substituted for the built-in 16-bit ADC. The superconductor ADC was mounted on a 4 K cryocooler in a magnetically shielded container outside the MRI room and functioned well despite the presence nearby of a large static field and a high-power RF transmitter. Images were obtained either using direct digitization of the 170-MHz signals or, alternatively, using a low-noise analog mixer and digitization of a 1-MHz intermediate frequency signal. While the results demonstrated the superior dynamic range of the superconductor ADC, further improvement was limited by the thermal noise from the room-temperature pickup coil. Current work is investigating the use of a cryocooled coil (which may be superconducting) and a cold low-noise preamplifier in order to take full advantage of the large dynamic range of the superconductor ADC. This should permit improved spatial resolution, allowing one to "zoom in" to a region of interest.