Institute of Electrical and Electronics Engineers

Modern DevOps practices have accelerated software delivery through automation, CI/CD pipelines, and observability tooling, but these approaches struggle to keep pace with the scale and dynamism of cloud-native systems.As telemetry volume grows and configuration drift increases, traditional, rule-driven automation often results in reactive operations, delayed remediation, and dependency on manual expertise.This paper introduces Cognitive Platform Engineering, a next-generation paradigm that integrates sensing, reasoning, and autonomous action directly into the platform lifecycle.This paper propose a four-plane reference architecture that unifies data collection, intelligent inference, policy-driven orchestration, and human experience layers within a continuous feedback loop.A prototype implementation built with Kubernetes, Terraform, Open Policy Agent, and ML-based anomaly detection demonstrates improvements in mean time to resolution, resource efficiency, and compliance.The results show that embedding intelligence into platform operations enables resilient, self-adjusting, and intent-aligned cloud environments.The paper concludes with research opportunities in reinforcement learning, explainable governance, and sustainable self-managing cloud ecosystems.

Deploying Convolutional Neural Networks (CNNs) efficiently across heterogeneous hardware platforms—such as CPUs, GPUs, and dedicated AI accelerators—remains a significant challenge due to differences in memory bandwidth, compute units, software stacks, and kernel implementations. While Network Architecture Search (NAS) has produced highly compute-efficient architectures like MobileNet, many of these models underperform in real deployments because they optimize primarily for FLOPs/MACs rather than system-level constraints. In this paper, we present a hardware-aware approach to architecture evaluation using the Once-for-All (OFA) framework, which enables flexible exploration of sub-networks with varying input resolution, depths, widths and kernel sizes. We conduct a detailed analysis of widely popular architecture like MobileNet under varying hyperparameters—including input resolution, depth, width and kernel size —and evaluate their behavior across CPUs, GPUs, and AI accelerators. By correlating model structure with real execution performance, we provide actionable insights that help developers design architectures that better exploit hardware capabilities. Our approach integrates system-level performance evaluation with guidelines that bridge the gap between theoretical model efficiency and practical deployment performance, enabling more predictable execution on modern AI hardware.

Dear Readers, The Administrative Committee (AdCm) of the IEEE Instrumentation and Measurement Society (IMS) met in Vancouver during October 23–25, 2025. We had a very productive 3 days, discussing and making decision about many issues related to publications, conferences, membership, education, awards, and technical activities and standards.