Intrinsix (United States)

Intrinsix has developed a Digital Focal Plane Array (DFPA) architecture based on a novel piecewise linear Log2 ADC (LADC) with “lossless” analog compression which enables ultra-high dynamic range ROICs that use less power than other extended dynamic range technologies. The LADC provides dynamic range of 126dB with a constant 75dB SNR over the entire frame. The companding 13bit mantissa, 3bit radix per pixel LADCs compress the 21bit signals into efficient 16 bit data words. The Read Out IC (ROIC) is compatible with most IR and LWIR detectors including two-color SLS (photodiode) and uBolometers. The DFPA architecture leverages two (staggered frame prime and redundant) MIPI CSI-3 interfaces to achieve full HD DFPA at 1000 frames/sec; an equivalent uncompressed data rate of 100Gb/sec. The LADC uses direct injection into a moderate sized integrating capacitor and several comparators create a stream of multi-bit data values. These values are accumulated in an SRAM based log2ALU and the radix of the ALU is combined with the data to generate a feedback current to the integrating capacitor, closing the delta loop. The integration time and a single pole low pass IIR filter are configurable using control signals to the log2ALU. The feedback current is at least partially generated using PWM for high linearity.