- Research Article
- 10.1016/j.esd.2025.101916
Opti-Clean: A predictive solar power system framework for optimized PV panel cleaning
- Jun 01, 2026
- Energy for Sustainable Development
- Anuradha Tomar + 1 more +1
Publications from 2021 to 2026
Showing 10 of 1,030 papers
Opti-Clean: A predictive solar power system framework for optimized PV panel cleaning
High-speed, power efficient 10-bit hybrid flash-SAR ADC with non-binary segmented DAC and asynchronous control
Design of High Performance Second-Generation Voltage Conveyor Using Adaptive Bias Technique and its Application
This paper presents a high-performance class AB second-generation voltage conveyor (VCII), optimized for modern integrated circuit applications. The proposed VCII architecture comprises of a current buffer at the input stage, followed by a voltage buffer. The proposed VCII incorporates slew rate and bandwidth enhancement techniques to optimize its overall performance. Specifically, adaptive biasing, resistive compensation, and a super-transistor configuration are employed to enhance the performance of the conveyor. The super-transistor configuration provides a low output impedance whereas adaptive biasing and resistive compensation technique provides slew rate enhancement and bandwidth extension along with high dynamic range in proposed VCII. Proposed VCII circuits simulated in Cadence Virtuoso environment using TSMC 0.18-μm GPDK technology file and operate at a low supply voltage of ±0.8 V, achieving bandwidths of 319 MHz and 389 MHz for the voltage and current transfer functions, respectively. The proposed VCII consumes 39 µW of static power and exhibits an average slew rate of 2.11 V/µs, demonstrating high-speed and low-power performance. The impedances at Y, Z and X terminals were computed as 63.68 Ω, 23 Ω, and 325 KΩ, respectively. The layout of the proposed VCII has been designed, occupying an area of 2266.041 µm². Furthermore, the performance of proposed VCII is validated through its application in a half-wave rectifier circuit, demonstrating its suitability for analog signal processing applications. Monte Carlo analysis considering device mismatch and PVT variations has been performed to demonstrate the robustness of the proposed circuit.
Read moreEmerging pretreatment Technologies for Biomass Valorization via anaerobic digestion: A systematic review and global research trends
Decoding Investors’ Behaviour in Adoption of Robo-advisors: A PLS-SEM and FsQCA Approach
Despite advancements in robotic finance, individuals seem stuck and struggling to embrace these novel technologies, highlighting the need to uncover the behavioural reasons behind adoption. Following the literature review, the study drafts a conceptual model integrating insights using ‘diffusion of innovation theory’ and ‘unified theory of acceptance and use of technology’ with behavioural economics. Using mixed ‘partial least squares structural equation modelling (PLS-SEM) and fuzzy-set qualitative comparative analysis (FsQCA)’, 513 valid responses from investors were analyzed to examine the relationships. The results revealed that relative advantage and internal locus of control emerged as the most prominent antecedents for investment intention using robo-advisors. Notably, an integrated framework increased the model’s applicability, predictability and robustness by recognizing behavioural antecedents that affect technology perception and finally behavioural intention. This research offers the significance of behavioural economics in research pertaining to information systems because they had never been explored with respect to fintech adoption in the available literature. Moreover, these biases have not been included in the theoretical models that still assume rational behaviour in the fintech domain and hence present a strong case for novelty.
Read moreDo Cyberbullies Develop Depressive Symptoms? A Longitudinal Multi-Study
This study examined the association between cyberbullying attitude and depressive symptoms among cyberbullies with guilt and fear as mediators. Two studies (college students and working professionals) were conducted through three-wave data collection. The correlation and hierarchical regression suggest that cyberbullying attitude can be associated with the development of depressive symptoms in cyberbullies, irrespective of their age and gender. The mediation analysis using PROCESS confirmed that fear and guilt can be used as links between the said association. It is the first of its kind of study that suggests that having cyberbullying attitude can be associated with the develop depressive symptoms. Secondly, it is a pioneer study that suggests guilt and fear can help link the association between cyberbullying attitude and depressive symptoms in cyberbullies, especially in the Indian context.
Read moreBiochemical and functional analysis of a thermostable, xylose-tolerant glycoside hydrolase 43 β-xylosidase from Thermothelomyces thermophilus.
Developing a sustainable metal-free carbon-g-C3N4 photocatalyst integrated with graphene oxide for the degradation of organic pollutants
Review of: "Fundamental Issues and Measurement Problem in Quantum Mechanics"
A Polynomial Time Routing Algorithm for Meda Biochips Based on Dijkstra's Algorithm
Recently, a biochip called MEDA (Micro Electrode Dot Array) has been studied in the field of biochemistry. During conducting experiments using a MEDA biochip, we need to move a droplet to a target position. We can split a droplet to make it smaller, and/or change its shape to go through a narrow path on a MEDA biochip. Because the velocity of a droplet is different depending on its shape and the direction of the movement, it should be complex to find an optimal routing for a droplet (i.e., to determine where to split the droplet, which path should be taken, etc.). Thus, existing methods utilize ILP (Integer Linear Programming) formulation to find an optimal routing; existing methods cannot treat large-scale problems because ILP formulation is inherently an exponential algorithm to the problem size. This paper proposes a completely new approach from the ILP formulation; our method constructs a weighted graph so that we can utilize Dijkstra's algorithm to find an optimal routing in polynomial time with respect to the chip size. Our experimental result confirms that the proposed method reduces computation time by more than 99% compared to existing ILP-based methods, and we can now find an optimal routing for a <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$100 \times 100$</tex>-sized chip, which is totally impossible by existing ILP-based methods.
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