Tokyo Electron (Japan)

In this work, we demonstrate GaN epitaxial growth by plasma-enhanced metalorganic chemical vapor deposition (MOCVD) using trimethylgallium [TMGa, Ga(CH3)3] and ammonia (NH3). Impacts of TMGa, NH3 molar flow rates, and plasma power on surface morphologies and carbon residual impurity concentrations in GaN epitaxial layer have been clarified. GaN surfaces showed step and terrace structures under a wide range of TMGa and NH3 molar flow rates. The residual carbon atomic concentrations in GaN epitaxial layers are found to be remarkably reduced by using NH3-plasma. The electrical characteristics of AlGaN/GaN-based high electron mobility transistor structure exhibits a lower sheet resistance when NH3-plasma is applied. This is mostly owing to the reduction in carbon residual impurities, which act as electron traps. The plasma MOCVD enables reduction in NH3 consumption or increase in GaN growth rate by 50%, which leads to enhancement of manufacturing productivity.

In this paper we have investigated the characteristics of a wide-bandgap materials bilayer by aluminum nitride (AlN) and aluminum oxide (AlO) on different substrates of GaN and Si on 200 mm platform by batch atomic layer deposition (ALD) of 100+ wafers. Among III-Nitride wide-bandgap semiconductors, AlN is proven to be a suitable candidate for passivation on GaN-based devices since it has excellent miscibility with similar III-V semiconductor like AlGaN. Additionally, lower lattice mismatch of these two wurtzite structures offers the adjustable bandgap and piezoelectricity which can eventually enhance the 2DEG channel carrier concentration in high electron mobility transistors (HEMT). Beside that the non-centrosymmetricity of the AlN wurtzite unit cell causes intrinsic polarization, making it a good choice for piezoelectric sensors. ALD offers an attractive advantage for depositing AlN at lower temperatures than conventional MOCVD or MBE and therefore, eliminates the problem associated with thermal expansion coefficient mismatch between film and substrate. Moreover, ALD also open the opportunity to deposit varying crystallinity of AlN on patterned substrate for barrier layer as well as passivation layer for power HEMT devices. However, AlN has a significant problem that it forms passive oxide layer at the surface when exposed to ambient air. It has been demonstrated that the small amount of oxygen has significantly affects the electrical and optical properties of AlN. Although, this effect can be exploited to desirably oxides by depositing a thin layer of oxides on top at the clean deposition environment which provide the exact chemical environment and lattice distribution of oxygen atoms. Thereby, AlN has been deposited at 350°C by Tokyo Electron (TEL) ALD on GaN heterostructure (here it is AlGaN/GaN) followed by low temperature Al2O3 cap layer at 300°C, as shown in Fig 1(a). In-depth X-ray photoelectron spectroscopy (XPS), cross-sectional scanning transmission electron microscopy (STEM) image along with elemental composition by electron energy loss spectroscopy (EELS) has been investigated to understand the miscibility of AlN and AlO at the heterointerface. It has been observed that aluminum oxynitride (AlON) formed at the heterointerface and clearly identifiable in high resolution cross-sectional STEM image in Fig 1(b). Oxygen diffusion from top AlO to the AlN considered to be the main reasons behind this chemical intermixing. With each layer thickness of 10 nm demonstrated around 25 – 30 Å of AlON on Si substrate, as shown in Fig 1(c) of EELS. Both the XPS depth analysis and EELS results show the thickness of the AlON is mainly depends on the thickness of AlO on Si substrate irrespective of AlN thickness variations, as shown in Fig 1(d) of XPS survey. Another noteworthy finding of this work is that the thickness of AlON significantly influenced by the material properties of the substrate surface. On GaN substrate AlON thickness is different than Si. We also observed that thickness is subject to the pretreatment as well as deposition conditions of AlN. The pretreatment of GaN substrate surface has great influence on the crystallinity of the AlN layer and that has substantial role on the miscibility of AlN/AlO. Near single crystalline AlN has been seen to be less susceptible to the chemical intermixing by oxygen diffusion than the amorphous one which may be because of bigger grain boundaries of the later crystal. In-depth XPS depth analysis of Al2p, N1s, O1s, as shown in Fig 1(e) reveals the nature of chemical compositions of the elements and their bonding inside the entire ALD film thickness. The area under the curve of Al2p, N1s and O1s have been considered to estimate how oxygen atoms substitute nitrogen atoms, creating a cation vacancy in the process and bonds in the AlN wurtzite structure. As an application point of view, AlON possess high-k and exhibits low leakage current, high breakdown voltage and stable threshold voltage while used as a gate dielectric. Despite low temperature of deposition, no significant carbon incorporation has been observed from the TMA precursors. The TEL batch ALD at 200 mm platform exhibits excellent thickness uniformity of only 0.33% standard deviation (STDV) in wafer-within-wafer with 49 measurement points and 0.56% STDV of wafer-to-wafer (wtow) along the 100+ wafer boat. Figure 1

Imprint lithography is an effective and well-known technique for replication of nano-scale features. Nanoimprint lithography (NIL) manufacturing equipment utilizes a patterning technology that involves the field-by-field deposition and exposure of a low viscosity resist deposited by jetting technology onto the substrate. The patterned mask is lowered into the fluid which then quickly flows into the relief patterns in the mask by capillary action. Following this filling step, the resist is crosslinked under UV radiation, and then the mask is removed, leaving a patterned resist on the substrate. The technology faithfully reproduces patterns with a higher resolution and greater uniformity compared to those produced by photolithography equipment. Additionally, as this technology does not require an array of wide-diameter lenses and the expensive light sources necessary for advanced photolithography equipment, NIL equipment achieves a simpler, more compact design, allowing for multiple units to be clustered together for increased productivity. Previous studies have demonstrated NIL resolution better than 10nm, making the technology suitable for the printing of several generations of critical memory levels with a single mask. In addition, resist is applied only where necessary, thereby eliminating material waste. Given that there are no complicated optics in the imprint system, the reduction in the cost of the tool, when combined with simple single level processing and zero waste leads to a cost model that is very compelling for semiconductor memory applications. To establish a new lithographic production solution requires the support of an ecosystem in order to enable seamless insertion of the technology. Key elements of the ecosystem include mask fabrication, resists and post pattern transfer processes that follow imprinting. In this paper, we review the required ecosystem and then move on to discuss a variety of applications that can be addressed with NIL and show some processing examples.

3DI and Heterogenous Integration (HI) have become ubiquitous over the past decade with applications in FPGAs, BSI CMOS Image Sensors, HPC GPUs and High Bandwidth Memory entering high volume production (HVM). The primary characteristics of 3DI and HI are the use of wafer or die bonding, TSVs and thinning. With these advanced packaging technologies becoming mainstream and with device scaling reaching fundamental limits, scaled packaging technologies (bonding, thinning, TSV) are now being incorporated into both BEOL and FEOL semiconductor processing to achieve higher performance, bandwidth and/or density. This presentation focuses on the challenges associated with fusion wafer bonding in advanced logic applications.

With the advancement in semiconductor technology, sophisticated multidimensional geometries are being formed resulting in nonconfined spaces. Wet etching these nanoconfined spaces uniformly across different CD sizes is challenging. Typically, etch (ER) decreases with decrease in CD size. One of the reported mechanisms to explain this behavior is the overlapping of electrical double layer (EDL) which prevents the etchants from entering to the nanochannels. In our previous experimental work, we reported a reverse ER trend (ER increase with decrease in CD size) of SiO2 using HF in organic as medium compared to water as medium. These results suggested that EDL model alone cannot explain the full mechanism and other factors need to be considered. Hence, molecular dynamics (MD) simulations are used to explain the mechanism of nanoconfined etching of SiO2 in water and organic solvent. Fig.1 shows the MD simulation result of the number density distribution of diluted HF at the solid-liquid interface in a nanoconfined spaces. When water is the solvent, HF molecules are strongly adsorbed in the solid interface. However, with the organic solvent, the HF molecules are more uniformly distributed in the volume near the surface. As the CD becomes smaller, the HF molecular density in the intermediate region in the space tends to decrease in the aqueous solution and increase in the organic solution. Next, we calculated the diffusion time of HF molecules in the nano-confined trench using the MD simulations, where we found that HF molecules have a faster diffusion time in water than in the organic solvent. This is due to the difference in the interaction between the solid interface, the HF molecules, and the solvent in addition to the viscosity of the solvent. Using EDL model and etching reaction, here we report the wet etching mechanism of nanoconfined spaces from the MD simulation result. Figure 1

Ionic liquids (ILs) are promising candidates for use in the semiconductor industry because of their unique and tunable physicochemical properties. They are a novel class of salts with desirable features such as being in liquid phase at room temperature, nonflammability, high ionic conductivity, high thermal stability, and low to negligible vapor pressures. Their physical, chemical, solubility, transport, and solvation properties can be tuned by altering the cations or anions to tailor for applications in the semiconductor industry, including the process of liquid/gas separations, extraction of impurities, and cleaning under vacuum. Selecting suitable ILs to enhance the efficiency of the target semiconductor processes and tools is crucial.One possible application is to use ILs as a barrier or protective liquid film that does not evaporate in low-pressure conditions. For this application, we need a better understanding of the molecular scale of the behavior of the ILs at different temperature ranges. To develop such a new process, the knowledge of absorbing/desorbing impurities (such as O2, CO2, and H2O, including their mixtures and other organic materials) in the ILs and their transport (diffusion coefficients) properties inside the ILs at different temperatures is essential from the surface protection film point of view. This work seeks to answer these essential questions at the nanometer scale by showing the results from molecular dynamics (MD) simulations of the diffusivity and solubility of impurities inside ILs. Examples of MD simulation models for this study are shown in Figure 1, where impurities with the same concentration are placed on both sides of ILs, and the transport behavior of impurities inside ILs is extracted. From these nanoscale results, we can better understand and predict the diffusivity and solubility of impurities inside ILs and find the conditions at which impurities can be removed from ILs for recycling purposes. Figure 1

Atomic layer etching (ALE) has become an important process for semiconductor device manufacturing due to its unique ability to control surface etching with single molecular level control. ALE first began in the laboratory over thirty years ago, and in the past ten years it has matured into an important part of the semiconductor manufacturing process with several solutions available on the market for high volume manufacturing.Most ALE processes have been developed in a vapor or rarified gas environment, often using a thermal or plasma process to facilitate the required chemical reactions. (1) In recent years there has also been work on digital etching with liquid chemistry, including ALE processes for copper, cobalt, ruthenium, and noble metals (2-5).With wet ALE processes relatively unexplored compared to the longer studied vapor phase processes, there has not been much work done to understand how the interaction of fluid flow and the chemical reaction kinetics can affect a wet ALE process. Digital wet etch processes generally require two different solvents for the ligand deposition/adsorption and subsequent etching steps, and it’s important to minimize any mixing of the two liquids: otherwise the etch process ceases to be digital and instead becomes a continuous etch process, with resulting problems in roughness and local nonuniformity.In this paper we will present results of a series of simulations to model the sequentially switching liquid flow and surface reactions of an ALE process: both in a simplified flow cell system and in center dispense over a spinning wafer.The ALE reactions are modeled assuming Langmuir isotherms: one for the ligand deposition and another for the subsequent etching step. The kinetic equation for a pseudo first order heterogeneous surface adsorption isotherm is as follows: dq/dt = k(qe - q)Where q is the surface adsorption density, t is time, k is the reaction rate constant, and qe is the equilibrium concentration of the adsorbate. qe is determined using the standard Langmuir isotherm: qe = q∞ (K cA /(1 + K cA ))Where q∞ is the maximum possible surface adsorbate concentration, cA is the concentration of adsorbate in the solvent, and K is the Langmuir adsorption equilibrium constant. A similar set of equations are used for the desorption in the etching step, with different values for the rate constant k and equilibrium surface density qe .An example of the spinning wafer liquid dispense simulation is shown in Figure 1. This is an axisymmetric simulation, where liquid is being continually dispensed at 1 L/min onto the center of a wafer spinning at 1000 RPM, with the liquid switching to a different solvent at t = 0. The figure shows the volume fraction in the liquid film at 0.1s as the displacing fluid flows from the center of the wafer at the left to the edge of the wafer at the right. The volume fraction at the bottom boundary, which represents the wafer surface, shows that the transition from one solvent to another is not instantaneous, and that there will be some mixing between the two.Our analysis and results will also include dimensional analysis of the chemical reaction and fluid flow system, showing how parameters like reaction rate constants, spin speed, dispense flow rate, flow velocity, and solvent switching frequency can affect the etching performance in terms of etching uniformity and surface roughness for any generalized wet digital etch system. Kanarik, K. J.; Lill, T.; Hudson, E. A.; Sriraman, S.; Tan, S.; Marks, J.; Vahedi, V.; Gottscho, R. A. Overview of Atomic Layer Etching in the Semiconductor Industry. JVST A 2015, 33 (2), 020802.Netzband, C.; Arkalgud, S.; Abel, P.; Faguet, J. Wet Atomic Layer Etching of Copper Structures for Highly Scaled Copper Hybrid Bonding and Fully Aligned Vias. In 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC); 2022; pp 707–711.Abel, P. Wet Atomic Layer Etching Using Self-Limiting and Solubility-Limited Reactions. US10982335B2, April 20, 2021.Abel, P. Methods for Wet Atomic Layer Etching of Ruthenium. US11802342B2, October 31, 2023.Abel, P. Methods for Wet Etching of Noble Metals. US20230121246A1, April 20, 2023. Figure 1

ABSTRACT The goal of utilizing conductive inks to compliment traditional metallization approaches in semiconductor packaging applications is to enable ultimate design, functionality, and capital expenditures (CAPEX) flexibility through additive manufacturing without sacrificing performance or reliability. Traditional metallization processes include the sputtering method, a Physical Vapor Deposition (PVD) technique, and plating among others. PVD and electroless plating are currently the most used method to deposit a metal film in semiconductor packaging industry and it requires a complex, multi-step process. The metal films and patterns are required for electromagnetic interference (EMI) shielding and SAP among others. These processes have certain limitations related to technology factors including limits on panel area, uniform thickness on complex 3D shapes, temperature, patterning, health, and environmental factors as well as economic factors (throughput, CAPEX, footprint, maintenance, material waste and energy usage). Alternatively, technology is seeing a shift to jettable (aerosol jet and inkjet) or sprayable conductive inks for conformal shielding and additive, 3D metallization. This approach brings about substantial total cost of ownership and throughput advantages that will be reviewed in this paper as the ink-based processes (spray/jet) does not require vacuum and has relatively low process temperatures (at or below 180C in most cases). Metal complex conductive inks can be printed via various digital printing techniques such as aerosol jet printing, inkjet printing, and spray coating. The inks can be jetted or sprayed on various substrates e.g., 3D packages, wafers, chips, boards, and housings to provide a high-performance shielding layer that is reasonably priced and has outstanding reliability qualities for the semiconductor packaging industry. In this paper, we will review different printing techniques, and spray coating. We will review 5-sided metallization to provide shielding via spray coating, film performance parameters including coating thickness uniformity, EMI shielding effectiveness, adhesion to different substrates, and reliability. Another area of focus in this paper is using the silver metal complex inks in semi additive manufacturing as the silver MOD inks make an excellent seed layer for plating processes. We will discuss the spray coating process and performance of the silver film as the seed layer.