Xenics (Belgium)

High-resolution time series are crucial in modern distribution system studies but often result in computationally intractable models. We propose a novel, rule-based scenario reduction method that divides the aggregated load distribution using its cumulative density function. The method assigns a weight to each reduced scenario to preserve total energy and peak characteristics, enabling accurate and interpretable approximations of the original data. We validate the approach through three case studies: (i) exploring the trade-off between the number of representative scenarios and their ability to capture extreme load behavior, (ii) examining the effect of consumer aggregation level, and (iii) applying the method to a realistic 76-bus low-voltage network with a post-power flow voltage analysis. Results show that the proposed technique ensures high fidelity in average load representation and energy balance, while preserving extremes with controllable error. The method is computationally efficient, simple, and tractable, and is well-suited for distribution network planning applications.

The integration of distributed generation (DG) is essential to the energy transition but poses challenges for low-voltage (LV) distribution networks (DNs) with limited hosting capacity (HC). This study incorporates multiple fairness criteria, utilitarian, egalitarian, bounded, and bargaining, into the HC optimisation framework to assess their impact. When applied to LV feeders of different sizes and topologies, the analysis shows that bargaining and upper-bounded fairness provide the best balance between efficiency and fairness. Efficiency refers to maximising the social welfare of the LV DNs, while fairness is proportional to the minimisation of disparity in opportunity for installing DG. Feeder topology significantly influences fairness outcomes, while feeder size affects total HC and the inherent fairness of feeders. These results emphasise the importance of regulatory incentives and network designs in order to facilitate fair and efficient DG integration.

Compared with the other Infrared detector materials, such as HgCdTe (or MCT) and lead salts (e.g.: PbS, PbSe, PbSnTe, …), the history of InGaAs FPA’s is not that old. Some 25 years ago the first linear detectors were used for space missions [1,2]. During the last 15-20 years InGaAs, grown lattice matched on InP, has become the work horse for the telecommunication industry [3] and later on for passive and active imagery in the SWIR range. For longer wavelengths than 1.7 μm, III-V materials are in strong competition with SWIR MCT and till now the performance of MCT is better than high In-content InGaAs. During the last years some alternatives based on quaternary materials [4] and on Superlattice structures [5] are making gradual progress in such a way that they can yield performing Focal planes in the (near) future. As the SWIR wavelengths range covers a large variety of applications, also the FPA characteristics and mainly the ROIC properties need to be adjusted to fulfil the mission requirements with the requested performance. Additionally one has to bear in mind that the nature of SWIR radiation is completely different from what is usually encountered in IR imaging. Whereas the signal of thermal imagery in the Middle Wavelength (MWIR: [3 – 5 μm]) or Long Wavelength (LWIR: [8 – 10 μm] or [8 – 12 μm]) band is characterized by a large DC pedestal, caused by objects at ambient temperature, and a small AC signal, due to the small temperature or emissivity variations, SWIR range imagery is characterized by a large dynamic range and almost no DC signal. In this sense the SWIR imagery is resembling more the nature of Visible and NIR imaging than that of thermal imagery.

Within the European project SmartFiber we experimentally demonstrated a novel miniaturized Fiber-Bragg-Grating sensor interrogator, based on a tailored Arrayed-Waveguide-Grating (AWG) filter fabricated in the Silicon-on-Insulator (SOI) platform. The measured interrogator resolution is 10pm on a 50nm operational bandwidth.

Low-cost GaN-on-Si-based transistors are targeted to function at high ambient temperatures. With this perspective, it is aimed to evaluate the high-temperature (HT) capabilities of GaN-on-Si double-heterostructure field-effect transistors. It is highlighted that HT device operation degrades both ON and OFF states that are directly related to the increase in the on-resistance and the decrease in device breakdown voltage; 2-DEG mobility drops with increasing temperature and is responsible for ON-state degradation. Regarding the OFF-state operation, it is observed that at low-voltage operation and with increasing temperature, there is an increase in the OFF-state leakage current because of thermal-assisted electrical conduction across the III-N layers and various interfaces. The main breakdown limiting mechanism at any temperature is, however, buffer leakage along the AlN/Si interface. Because this parasitic conduction, a negative temperature coefficient of breakdown voltage of approximately -1 V/°C is observed. For devices after Si removal, the leakage across the AlN/Si interface is interrupted and therefore HT OFF-state characteristics show high potential to be used at high operating voltage. A breakdown voltage as high as ~1800V is observed after Si removal compared with ~500 V with Si at 150°C.