22 kV SiC Emitter turn-off (ETO) thyristor and its dynamic performance including SOA

This paper deals with the design of a 7.2 kV, 200 A hybrid AC circuit breaker employing a 15 kV Silicon Carbide (SiC) Emitter Turn-off (ETO) thyristor device as the main semiconductor switch and presents the test results to verify the functions of both the high voltage and low voltage electronic components of the medium voltage hybrid circuit breaker. The hybrid circuit breaker consists a fast acting mechanical switch, a low voltage commutating switch in series with that mechanical switch, a single 15 kV SiC ETO Thyristor device, and a stack of MOVs. This paper focuses on the electronic parts and a companion paper would elucidate the principle and operation of the fast acting mechanical switch. To fulfill bidirectional interruption capability of the high voltage semiconductor device, the SiC ETO is equipped with a low cost silicon diode bridge; a snubber capacitor is equipped in parallel with this diode bridge to alleviate voltage stress of the ETO during turn-off transients. A compact low voltage commutating switch based on silicon MOSFETs has been built and tested up to the full current rating.

The emitter turn-off (ETO) thyristor is a new MOS-controlled thyristor that is suitable for use in high-power converters due to its improved switching performance and easy control. This paper analyzes the uniform turn-on process of the ETO for the first time. To achieve uniform turn-on, the required gate current amplitude and rise rate are characterized for different ETO prototypes. Experimental results show that the ETOs can be uniformly turned on. Correspondingly, the maximum anode current rise rate is improved and the minimum on-time is reduced.

The emitter turn-off (ETO) thyristor is a new type of MOS-controlled thyristor that has a wide reverse-biased safe operation area (RBSOA) due to its unity-gain turn-off capability. Because of the negative feedback provided by the emitter MOSFET, the ETO also has current saturation capability. The forward biased safe operation area (FBSOA) of a small ETO is experimentally demonstrated. The results show that the small ETO has excellent current saturation capability that can be used to control the turn-on di/dt. Issues related to realizing a large area ETO's FBSOA are discussed.

The Emitter Turn-Off (ETO) thyristor, a novel hybrid power semiconductor device, is a potential substitute for IGCT (Integrated Gate Commutated Thyristor) in high power applications. A sub-circuit functional model for the ETO device is presented in this paper, which simulates static and dynamic characteristics in PSIM software with low computational costs and acceptable accuracy. The model is verified by comparing simulation with experiment of a 4500V/4000A ETO device. Further experiments are presented, which show the difference in dynamic characteristics between the ETO and the IGCT.

A new all-optical emitter-turn-off (ETO) configuration is proposed in this paper which is operated under 15 kV single bias and a current of 10 A. This ETO is completely controlled by two optical signals, one for the 15 kV SiC gate-turn-off (GTO) thyristor and the other one for a triggering low-voltage optically controlled Si switch. The latter, called optically-triggered power transistor (OTPT), is used in series with the anode contact of the SiC GTO thyristor in order to handle the current switching between anode and gate path of the SiC GTO thyristor. This OTPT is triggered with a 5-W laser of 808-nm wavelength and the main SiC GTO thyristor is triggered with a laser having a low wavelength of 266 nm. The voltage drop on the OTPT during the on-state is controlled by the power of the laser. For an optical power of 5 W, the structure is optimized to have an on-state voltage of 0.2 V at the junction temperature of 200 °C. This is less than 0.002% of the total bias of 15 kV.

An advanced evaluation system for experimental high power silicon (Si) and silicon carbide (SiC) Super Gate Turn Off Thyristors (SGTOs) with custom data acquisition and characterization electronics was designed and built in a cooperative agreement between engineers at Texas Tech University's (TTU) Center for Pulsed Power and Power Electronics (P3E) laboratory and research scientists at the U.S. Army Research Lab (ARL). The system consists of a 4.4 kJ Pulse Forming Network (PFN) energized by a 10 kW rapid capacitor charger developed at TTU, a data acquisition system which records chosen waveforms for each test cycle and a curve tracing module which the test devices are mechanically switched into to record current and voltage characteristics at arbitrary intervals between high power cycles. Testing is completely automated, with all test parameters including charge level, repetition rate, volume, etc. set within a custom windows based GUI. The evaluation system has successfully recorded changing I-V characteristics before actual physical failure in several devices. Extremely high volume testing has also been carried out with one device having been cycled over 30,000 times at moderate (2.5 kA) conduction levels. This paper expands on work presented at the 2012 Power Modulator Conference and presents newly acquired data and modifications.

Fundamental equations describing carrier transport, current continuity, and potential distribution are used in a finite-difference scheme to model switching phenomena in semiconductor power devices. An irregular and variable mesh approach is introduced that can reduce computation time by 40%. If the device structure satisfies certain conditions, the method works even more effectively. The program is used to analyze gate-turn-off (GTO) thyristor and static-induction thyristor (SIT) switching. Carrier concentration, potential, and current distribution transients during switching of the devices are shown. The current squeeze and concentration during turn-off in the GTO are related to the gate structure. The effective channel width of the SIT is also determined through numerical analysis.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

In this paper, thermal impedances of Silicon carbide (SiC) power module assembled with a Schottky Barrier Diode (SBD)–wall–integrated trench MOSFET (SWITCH–MOS) and a conventional trench gate MOSFET (UMOS) are measured. Then they are compared to show the advantage of SWITCH–MOS for thermal impedance measurement. SiC power device is attracting attention as a candidate for future power device, since it can be operated at higher current density and higher switching speed than conventional silicon (Si) power device. The power module packaging technology for SiC power device should have low thermal impedance (both transient and steady state thermal resistance) to bring out a potential ability of the device. Thermal design often has difference from measurement due to various modeling errors such as power device heat generation, module structure, interfacial thermal resistance, and cooling environment. Therefore, accurate thermal impedance measurement is an essential technology. However, the thermal impedance measurement of SiC power modules has the significant issue due to the instability of the body diode built into the SiC–MOSFET. The thermal impedance is the junction temperature rise per heat generation amount of the device. The temperature dependence of the knee voltage of the body diode is used to measure the junction temperature of the MOSFET. Since the knee voltage of SiC–MOSFET changes depending on the gate voltage, a high negative gate bias was necessary to avoid this effect. However, the negative gate bias stress may cause serious device damage such as threshold shift. The SWITCH–MOS which has SBD built in near the MOSFET channel is expected to stabilize the junction temperature measurement and avoid the risk of device deterioration. Figure 1 shows the cross–sectional schematic of the SWITCH–MOS and the conventional UMOS. The SBD are formed on the trench sidewall in SWITCH-MOS, and the device structure is almost same to the UMOS. The temperature is detected by the PiN diode for the UMOS and by the SBD for the SWITCH–MOS. Both of them measure the temperature inside of the MOSFET cell. The appearance of the test module is shown in Fig. 2. Each type of the test module is composed of the SiC die (SWITCH–MOS, UMOS, and SBD), an SiN–AMC insulating circuit substrate and an Al baseplate. The components are attached each other using AuGe solder. The junction temperature is measured from the built–in voltage of the body diode in response to a constant current flowing from the source to the drain. In the case of the UMOS, the gate bias of −18 V is applied. The gate bias is zero for the SWITCH–MOS. The thermal impedance of each test module was measured by static mode (Fig. 3). Then, the thermal structure function was calculated by transient thermal analysis (Fig. 4). Both the thermal impedance and the structure function for the SWITCH–MOS and UMOS were in good agreement. Since the SWITCH–MOS does not need negative gate bias, the threshold shift issue does not occur in principle. In addition, it is possible to perform a transient thermal testing with a large current for a long time. Because the forward degradation does not occur even if a large current is applied to the SBD in the SWITCH–MOS. The SBD built into the SWITCH–MOS makes it easier and more accurate to measure the junction temperature of the SiC–MOSFET. The thermal impedance measurement using SWITCH-MOS not only allows the precise thermal modeling of SiC power modules to be performed, but also has the potential to be applied to the calibration of the thermal design and the evaluation of thermal properties inside of the package structure. Figure 1

The gate turn-off (GTO) thyristor has the highest voltage and current rating among the semiconductor power switches used extensively today. The insulated-gate bipolar transistor (IGBT) is used to improve switching performance of a GTO in a cascode switch. This paper documents the switching performance of the different power semiconductor devices used in an IGBT-gated GTO-cascode switch. The cascode switch was tested and simulated using SPICE. Experimental waveforms are presented and show good agreement with simulation results.

A large-capacity inverter using high-power gate turn-off (GTO) thyristors that can be used instead of a cycloconverter in AC drives is presented. With the techniques of multiple configuration and GTO series connection, the inverter capacity is increased effectively. High conversion efficiency is obtained by using low-loss snubber circuits for GTOs. It is confirmed that the low-loss snubber circuits using energy recovery units (ERUs) have good performance in pulse-width modulated (PWM) operation. High-energy recovery efficiency is obtained, especially in leading operation (turn-on operation when freewheeling diodes conduct). These snubber circuits have superior ability for clamping overvoltage at GTO turn-off. A 2750 kVA inverter with low-loss snubber circuits using high-power GTOs has been fabricated and evaluated. >

Chapter 2 - Power Semiconductors

Direct-driven wind turbine with a PM generator and a full-scale converter is considered to be a preferred solution for wind power generation, especially for offshore application. As the power ratings of wind turbines increase to MW level, medium voltage converter becomes more competitive. The emitter turn-off (ETO) thyristor is a novel semiconductor device that is suitable for high power applications. This paper proposes a 7MVA ETO Light neutral-point-clamped (NPC) converter as the utility interface for direct-driven large wind turbine application. The converter hardware configuration, the component selection and design are presented. The thermal characteristics and performance of the proposed converter are analyzed in detail.

With the introduction and wide acceptance of gate turn off power devices (e.g. Bipolars, Power Fets, GTO's, etc.), the switching behavior of converters has reached the point where further improvements in firing and switching networks bring only marginal benefits. Consequently, the research interests in the area of static converters have been shifting toward improving the process of power conversion through a combination of new circuit topologies and improved voltage and harmonic control PWM techniques. As a result several such techniques have been proposed lately.

Over the last few years high power semi-conductor devices with intrinsic turn-off capability have become available. These devices, called gate turn-off (GTO) thyristors, consist of several layers of silicon with appropriate dotations; they are able to turn off currents of 1000 Amperes at thousands of volts within microseconds. In circuits used in power electronics the usual resistive, inductive and capacitive circuit elements are combined with thyristors which may simply be considered as switches. This technology is still an active field of research, and it has many important applications such as AC/DC conversion (both ways), speed control of locomotives and electric cars, control of power stations and power networks, etc.

Recently, power semiconductor devices that combine the technology of MOS turn-off and bipolar conduction have been introduced for operation at high voltage and current levels. The MOS turn off thyristor (MTO/sup TM/) is a switching device based on the gate turn off thyristor. This paper is devoted to presenting the results from a study performed to examine the operating characteristics of the MTO/sup TM/. The study included experimental measurements of on-state properties and switching characteristics under snubberless hard switching. Turn off loss, device switching delay time, storage time, transition time and on-state losses are characterized. In addition to the experimental results, the paper also presents a brief review of operation of the device and the experimental procedure used in the study.