32 GHz power-combining TSA array with limited sector scanning

A Ka-band solid-state transmitter capable of power greater than 5 W is being developed. The transmitter consists of an array of 21 elements each driven by a single stage MMIC (monolithic microwave integrated circuit) power amplifier, a MMIC three-stage preamplifier, and a MMIC four bit phase shifter. The design of the array, measurements of the antenna pattern of the full array, and an electronically beam steered subarray are reported. >

A high-performance 6-18-GHz dual-channel monolithic microwave integrated circuit (MMIC) transmit/receive (T/R) module is presented with significant advances in integration and performance. This advanced module featured critical spacing for two-dimensional arrays, an aluminum silicon carbide housing, multilayer ceramic substrates for RF and control circuitry, a custom hermetic DC multipin connector, new high-performance MMIC low-noise amplifiers and power amplifiers, and specialized multifunction MMIC chips for a reduced parts count. Each of the two channels featured a selectable horizontal and vertical polarization capability. The module was very densely packaged with two complete T/R channels occupying 0.97 in/sup 3/. The module's nominal noise figure was below 8.0 dB over most of the band, the output power was 26 dBm, and both the measured transmit and receive gains were 20 dB. >

The demonstration of a 75-305-GHz power amplifier (PA) monolithic microwave integrated circuit (MMIC) is presented in this letter. The PA is based on an eight-cell traveling-wave unit amplifier (UA). Each cell contains an RF cascode with two two-finger transistors with a gate width of 20 μm each. In the output stage, a balanced configuration combines two UAs with Lange couplers. In front, a third UA is used as a driver amplifier. The PA MMIC is fabricated in a 35-nm gate-length metamorphic high-electron-mobility transistor technology. From 75 to 305 GHz, the PA yields a minimum output power of 10 dBm with an average value of 12.8 dBm. At 200 GHz, a peak output power and PAE of 14.9 dBm and 6.6% is achieved, respectively. To the best of the authors' knowledge, this is the first PA MMIC with an octave-bandwidth that provides an output power of 10 dBm at 300 GHz.

The design and performance of a two-stage MMIC (monolithic microwave integrated circuit) power amplifier that has established new benchmarks for power output, bandwidth, and efficiency are reported. The amplifier produces 22 W+or-1.4 dB from 3.0 to 6.0 GHz, with a maximum power output of 29 W, a minimum of 15 W, an associated power gain of 10 to 13.5 dB, and a power-added efficiency of 23% to 35%. The results rival the best narrowband results reported using multiple discrete MESFET cells in a hybrid MIC internally matched format. This excellent performance can be attributed to an accurate device model, a comprehensive design methodology, a robust matching circuit topology, and a high-yield/high-performance power MMIC processes. >

A space power amplifier composed of active linearly tapered slot antennas (LTSAs) has been demonstrated and shown to have a gain of 30 dB at 20GHz. In each of the antenna elements, a GaAs monolithic microwave integrated circuit (MMIC) three-stage power amplifier is integrated with two LTSAs. The LTSA and the MMIC power amplifier have a gain of 11 dB and a power added efficiency of 14%, respectively. The design is suitable for constructing a large array using monolithic integration techniques. >

A Ku-band power amplifier monolithic microwave integrated circuit (MMIC) with an output power density of 726 mW/mm2 is demonstrated using 0.25 ?m SiGe BiCMOS technology. No inductor matching scheme is applied to minimize the MMIC size, but an active biasing topology is used to enhance the power-added efficiency (PAE) and linearity of the MMIC. The fabricated one-stage cascode power amplifier MMIC, including input/output matching and biasing circuits, has a compact size of 0.384 mm2 (0.6 mm × 0.64 mm), and exhibits a saturated output power (Psat) of 24.45 dBm and a PAE of 29.1 % at 14 GHz.

This paper presents a power amplifier (PA) Monolithic Microwave Integrated Circuit (MMIC) based on GaN High Electron Mobility Transistor (HEMT) at 110 GHz. A parallel cascade class AB power amplifier is used in order to increase linearity and efficiency. This single-ended three-stage power amplifier provides 19.6dBm output power (Pout) with large signal gain of 7.6dB and power added efficiency (PAE) of 5.7% at 110GHz. The proposed power amplifier exhibits output power of 18.7dBm at 1dB compression point (P 1dB ).

In this paper, a design of Ka-band monolithic microwave integrated circuit (MMIC) power amplifier (PA) in 0.15μm E-mode GaAs pHEMT process is presented. The PA is co-design with thermal analysis to enhance heat dissipation ability. Simulation result shows that, the PA exhibits 29dB of power gain, 32.4 dBm saturated output power (Psat) and more than 27.5% power added efficiency (PAE) from 34 GHz to 36GHz. The input return loss is lower than -18dB, and the output return loss is lower than -13.5dB. The PA maximum channel temperature can be lower than 114.9°C for 80°C MMIC backside. The PA is biased at VD of 3.7V and Vb of 0.6V. The total chip area is 4.2*2.2 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> .

An InGaP/GaAs heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) power amplifie (PA) using an improved linearization technique is studied in this paper. This improved linearization technique provides high efficiency at different amplification ofthe modulation as well as high operation voltage. Also the gain compression and the phase distortion of the HBT are effectively improved with no additional DC consumption. The fabricated HBT MMIC PA exhibits an output power of 24 dBm and a power-added efficiency as high as 37% at an operation voltage of6.5 V.

A high-performance four-stage monolithic microwave integrated circuit (MMIC) power amplifier chip has been developed using 0.3- mu m gate-length and molecular beam epitaxial (MBE) MESFET technologies. These power MMIC chips have been combined to constitute a 47-GHz power amplifier with an output power of 0.45 W and an associated gain of 16.6 dB. A saturated output power of over 0.58 W was also achieved at 47 GHz. These results represent the highest reported power and gain at U-band from a MMIC amplifier using a 0.3- mu m gate-length MESFET. This amplifier has potential application as a driver for a monolithic doubler to obtain more than 80 mW of transmitted power at 94 GHz for W-band system applications. >

An active frequency doubler monolithic microwave integrated circuit (MMIC) for E-band transceiver applications is presented in this letter. This MMIC has been fabricated in a commercial <TEX>$0.1-{\mu}m$</TEX> GaAs pseudomorphic high electron mobility transistor (pHEMT) process on a 2-mil thick substrate wafer. The fabricated MMIC chip has been measured to have a high output power performance of over 13 dBm with a high fundamental leakage suppression of more than 38 dBc in the frequency range of 71 to 86 GHz under an input signal condition of 10 dBm. A microstrip coupled line is used at the output circuit of the doubler section to implement impedance matching and simultaneously enhance the fundamental leakage suppression. The fabricated chip is has a size of <TEX>$2.5mm{\times}1.2mm$</TEX>.

In this paper, we report on the development of W-band monolithic microwave integrated circuit (MMIC) power amplifiers using 0.1-/spl mu/m AlInAs/GaInAs/InP high electron mobility transistor (HEMT) technology and finite-ground coplanar waveguide (FGCPW) designs. In the device modeling, the Angelov nonlinear HEMT model was employed to predict the large signal performance of the device, and the results were validated by using state-of-the-art vector load-pull measurements. A two-stage single-ended W-band FGCPW MMIC using a 150-/spl mu/m-wide HEMT as the driver and a 250-/spl mu/m-wide HEMT for the output stage was designed, fabricated, and tested. The MMIC amplifier demonstrates a maximum output power of 18.6 dBm with 18.2% power-added efficiency and 10.6 dB associated gain at 94 GHz. This result is the best output power to date reported from an InP-based MMIC using FGCPW design at this frequency.

ABSTRACTThis letter presents a design of a dual‐band power amplifier (PA) monolithic microwave integrated circuit (MMIC). A modified dual‐band component based bias integrated dual‐band matching circuit is employed for both input and output network to achieve small size and low loss. For demonstration, one dual‐band PA is designed using 0.15 μm GaN‐on‐SiC process at 28/39 GHz. The fabricated PA achieves peak output power of 31.4 and 29 dBm at the measured frequency of 26 and 36 GHz, respectively, while the measured maximum drain efficiency (DE) is 51.1% and 27.8% at the two frequencies. The proposed dual‐band PA occupies an area of 1.4 mm × 1 mm including pads.

A novel design methodology for two stages microwave monolithic integrated circuit (MMIC) power amplifier (PA) is presented. The proposed solution allows to almost null the phase distortions (AM/PM) without worsening other key features of the PA, such as amplitude distortion (AM/AM) and efficiency. The derived approach is verified presenting the design and the experimental characterization of a two stages GaN MMIC PA for Microwave Backhaul radio links. The MMIC has been developed in a commercial 0.25 μm GaN power process, resulting in a 3×3 mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> chip area. At 7 GHz, the realized module shows 6 W of saturated output power, 17 dB of gain, 63% of power added efficiency and less than 1.5 degree of phase distortion. Moreover, when tested with modulated signals (i.e., 256 QAM modulation scheme, 7 dB of PAPR), the PA shows a spectral regrow lower than -40 dBc at 32 dBm of average output power without any predistortion, while the average efficiency is around 30%.

A Ka-band low temperature co-fired ceramic (LTCC) transceiver is demonstrated in this paper. The proposed module is composed of several bare monolithic microwave integrated circuits (MMIC) and passive circuits. These MMICs including LNA, phase shifter, attenuator, SPDT switch, driver amplifier, power amplifier have been mounted onto LTCC substrate. The passive circuits like bandpass filter and waveguide to microstrip transition have been embedded into the substrate. The whole transceiver is fabricated in a 36mm×20mm×1.1mm LTCC board with eleven layers. The front-end is designed to operate from 34 to 36 GHz. Measurement shows that the gain of the receiver is 33 dB; noise figure is less than 4.2 dB. Output power of transmitter is greater than 24.6 dBm, while the measured gain is more than 25 dB. The implementation of this transceiver indicates that LTCC technology is well suited for highly integrated microwave and millimeterwave module.