A Carrier-Based Low Total Current Ripple Modulation Strategy for Parallel Converters With Leakage Current Attenuation

This work has adopted the concept of asymmetric inductor magnetization to develop a new quadratic converter with the advantages like a wide range quadratic voltage gain and low source current ripple. In addition, the proposed high quadratic converter has achieved reduced voltage stress due to the presence of switched capacitor cell at the output side. Initially, the operation of the converter and steady-state analysis, including efficiency calculations, are explained. In addition, the design and selection of converter components are presented along with a small-signal analysis. Further, a comprehensive comparison with recent high quadratic gain converters is presented. The comparison is made with regard to the total component count, voltage conversion ratio, effectiveness index, electric stress, current ripple, switching device power (SDP) rating, and input current ripple factor. Furthermore, the 150 W laboratory prototype is used to verify the performance of the proposed converter in terms of operation, dynamic response, and efficiency, and the corresponding experimental findings are reported. The wide range voltage gain, low current ripple, and low electric stress features of the proposed converter highlight its superiority in fuel cell electric vehicle applications.

In this paper, residential loads are modeled in order to analyze low frequency current ripples of residential fuel cell applications. A difference of low frequency current ripples between simple resistor load condition and actual residential load conditions is compared. Aspect of generation and propagation of low frequency current ripples are analyzed in order to design an optimal power conditioning system. Theoretical analysis has been performed and informative simulation and experimental results are provided.

An interleaved buck-boost converter with a wide conversion ratio is proposed in this paper. Two converter cells are used in the porposed converter. One is a single-ended primary inductor converter (SEPIC) and the other is a Cuk converter. Since both converter cells have an inductor and a switch, the input current of the proposed converter has low current ripple by utilizing an interleaving technique. The SEPIC converter cell provides a positive step up/down output and the Cuk converter cell provides a negative step up/down output. Therefore, the proposed converter has also step up/down capability and a wide conversion ratio. The proposed converter has a low input current ripple, step up/down capability, and a wide conversion ratio. Theoretical analysis and performance of the proposed converter were verified on an experimental prototype operating at 100 kHz switching frequency.

To balance the cost and volume when applying a low output current ripple, the power supply design should be able to eliminate the current ripple under any duty cycle in medium and high switching frequencies, and considerably reduce filter volume to improve power density. A stacked buck converter was eventually selected after reviewing the existing solutions and discussing their advantages and disadvantages. A stacked buck converter is used as a basis to propose the transient response and output current ripple elimination effect, boundary limit control method, and low output ripple dead time modulation method to make individual improvements. The principle, mathematical derivation, small-signal model, and compensator design method of the improvement method are presented in detail. Moreover, simulation results are used to mutually verify the correctness and effectiveness of the improvement method. A stacked buck converter with 330-V input, 50-V output, and 1-kW output power was implemented to verify the effect of the low output current ripple dead time modulation. Experimental results showed that the peak-to-peak value of the output current ripple was reduced from 2.09 A to 559 mA, and the RMS value was reduced from 551 mA to 91 mA, thereby effectively improving the output current ripple.

In order to improve the performance of traditional phase-shifted full-bridge converters and reduce the output current ripple, an improved zero voltage and zero current switching phase-shifted full-bridge PWM converter is proposed in this article. By adding a simple auxiliary circuit, the leading-leg switches realize zero voltage switching and the lagging-leg switches realize zero current switching. The primary current is reset during the freewheeling period, so the efficiency of the converter is improved. What is more, the improved converter can effectively reduce the output current ripple. The added auxiliary circuit does not include any lossy components or saturable reactors. The improved phase-shifted full-bridge converter has many advantages, including simple circuit topology, easy implementation of soft switching, high efficiency, and low output current ripple. The operational principle and analysis of the proposed converter are presented in this article. An 800 W experimental prototype is built for experimental verification.

The model predictive direct speed control (MPDSC) can improve the speed dynamic performance effectively. However, due to the large difference between the mechanical and electrical time constants, short prediction could result in large current ripples at steady state, which becomes a critical problem. Besides, the conventional MPDSC methods have not deeply investigated the online-adjustable weighting factor design and the problem of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">i_d</i> transient oscillation. In this article, a model predictive direct speed control with novel cost function is proposed. In the proposed method, two different <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">q</i> -axis current references are generated, one to improve the speed dynamics, and the other to ensure the low current ripples. The two current tracking are assigned with different weighting factors unified in one cost function. In order to determine which current tracking to play a major role under different operations, the speed error is designed as weighting factor. With the proposed cost function and designed weighting factor, the high speed dynamics and low steady current ripples can be achieved simultaneously. Finally, the effectiveness of proposed method is verified by experiments.

This paper proposes novel bidirectional DC-DC converter that has the advantages of high voltage gain, low conduction losses and low input current ripple. Two paralleled current-fed full bridges are located in the low voltage side (LVS), sharing one voltage-fed full bride in high voltage side (HVS). A quadruple phase-shift control strategy is proposed to reduce input current ripple and conduction loss. The phase shift between the full-bridges of LVS is employed to greatly reduce current ripple and the auxiliary inductors are used to help the lag bridge extend the zero-voltage-switch (ZVS) range. Finally, an 800W simulation prototype is built to verify the proposed converter, the accordance between the analysis and simulation results testify the advantages.

Battery Pack life time depending on thermal management is a crucial issue in Electric and Electric Hybrid vehicles. Excessive thermal losses caused by the battery current ripples can be well avoided by introducing suitable topology. This paper proposes utilization of interleaved DC-DC converters to reduce the battery pack current ripples. Interleaved converters have some advantages such as low current ripple, low losses and high reliability. This paper considers Ni-MH batteries used in Toyota Prius 2010 and takes the high frequency model of Ni-MH battery into account to show the effect of ripple current on battery. While design equations and considerations are explored, conventional converter and interleaved DC-DC converter are modeled and simulated to study and compare the battery current ripples in boost and buck modes of operation. It is shown that current ripples of interleaved converter are much lower resulting in extension of battery pack life time.

Switched mode pulse power supply is a promising technique for high-power quasi-continuous laser driver. Contrast to lossy linear laser drivers, switched mode laser drivers can achieve higher efficiency. However, many challenges have been proposed, such as fast pulse edge, low current ripple. This paper proposes a multiphase interleaved pulse power supply with energy recovery and inductive storage (MIEF-PPS). The basic concept of the topology is the inclusion of a multiphase converter with pulse forming circuits to the converter system, which decouples the current slew rate and current ripple. Using an inductive storage technology and pulse forming circuits, a shorter pulse current rising time is obtained. The inductor energy is fed back to the input source not discharged to the load, resulting in a fast pulse trailing edge and energy saving. Thus the pulse current response observed when using this proposed technique is found to be much faster when compared to the conventional interleaved buck driver. Moreover, a pre-charge method is proposed to overcome the challenge of digitally controlling the inductive storage. The proposed topology was simulated in MATLAB/Simulink and validated against the experimental results of a laboratory prototype, 360 W dual-interleaved pulsed power supply.

A hybrid DC/DC converter is studied for direct current microgrid applications to have benefits of low switching losses with wide range of operation load, less winding turns of transformer secondary side, low ripple current on output side and high circuit efficiency. The studied converter includes a phase-shift pulse-width modulation full-bridge circuit and a half-bridge circuit to reduce the switching losses at lagging-leg switches. In the secondary side of the studied converter, two inductors, four diodes and two transformers are adopted to perform partial ripple current reduction and minimise the winding turns. The studied converters are verified with a 1200 W prototype by the experimental results.

A low source current ripple fourth-order buck converter (LSCRBUC) is proposed in this paper. Like buck converter with input filter, it has four L-C elements but structurally different from it. Use of input L-C filter is essential in the conventional buck converters to meet the ripple specifications but it is at the cost stability issues. To minimize the stability issues in these topologies an additional damping network is necessary. The proposed converter is free from damping network and ensures tradeoff ripples with minimum stability issues related to input filter. The stability issues are analyzed through the combination of participation factors and eigenvalue approach. Also, the influence various states associated to the L-C parameters on the dominant modes/instability issues are brought out. Case studies are presented for the low source current ripple buck converter and compared with the conventional fourth-order buck converter. Analytical findings are validated with stability indicating analytical and measurement results.

A single-stage TRIAC (TRIode for alternating current switch) dimmable LED (light emitting diode) driver using a buck converter fed through a capacitor input rectifier provides many advantages such as small-scale implementation, low output current ripple, and stable dimming operation. This circuit topology, however, has a serious issue: A large inrush current to the smoothing capacitor. To solve this issue, this paper focuses on a bleeder circuit in the TRIAC dimmable LED driver. This paper presents the mechanism of the large inrush current issue and its relationship to a conventional bleeder circuit. Moreover, this paper proposes a turn-off delay controlled bleeder circuit. The proposed bleeder circuit is analyzed by using its discrete-time state-space model in order to set proper circuit parameters for inrush current reduction. Experimental results demonstrate the inrush current reduction by the proposed method, which leads to a 37% reduction of maximum input current, as well as proper dimming operation and low output current ripple. The proposed method achieves further small-scale implementation, which enhances the advantages of the intended main circuit topology.

The Weinberg converter is a suitable choice for the battery discharge regulator of a geostationary satellite due to its high efficiency, continuous input and output current, and soft switching of switches and diodes. Nevertheless, this converter has high output current ripple during the commutation period of its output diodes. Therefore, the output RMS current and output voltage ripple are high, which may directly affect the lifetime and total capacitance of bus capacitors and hence, the lifetime and volume of the geostationary satellite. Thus, reducing the output current ripple is important to the design of the geostationary satellite. An improved Weinberg converter with an additional inductor and capacitor is proposed in this paper to reduce the output current and voltage ripple. It features soft switching of all switches, no reverse recovery problems of the diodes, and reduced magnetizing offset current in the coupled inductor. The proposed converter is verified with experimental results from a 750W, 100kHz, 36-50Vdc prototype.

The interleaved converter has may advantages such as low power losses and small output current ripple. The output current ripple of interleaved converter is the key parameter for the filter inductor design and the overall converter optimization. In this paper, the output current ripple behavior of interleaved Buck converter is analyzed, both in CCM and DCM. Further, a simplified numerical method for the output current ripple calculation of the Buck converter in DCM is presented. The proposed method provides a straightforward calculation procedure which is easy to be programmed. Simulation and experimental results validate the effectiveness of the analysis and the calculation method.

Due to power time-varying characteristic of a single phase photovoltaic (PV) grid-connected inverter in grid side, its front-end dc/dc converter tends to draw a large ac ripple current with double grid frequency, which would decrease maxim power point tracking performance of PV side. A novel method is proposed for the low frequency input current ripple analysis of a boost converter in a non-isolated single phase PV inverter, based on back current gain A i (s) (input current to output current) model. Mathematical models with different control schemes are built and derived, which are verified in SABER environment. It is indicated and proved that average current mode control strategy is more effective than voltage mode control and open loop control methods. Design principles are also presented. Simulation and experimental results are provided for model verification. Bandwidth limitation is also discussed and improved with proposed PR controller with A i (s) model.