A full on-chip, low noise, low power consumption reference generator in monolithic active pixel sensors

Monolithic active pixel sensors (MAPS) in a VLSI CMOS technology

The features of the 180nm TowerJazz1 CMOS technology allow for the first time the use of CMOS Monolithic Active Pixel Sensors (MAPS) under the harsh operational conditions of the LHC experiments. The stringent requirements of the ALICE Inner Tracking System (ITS) in terms of material budget, radiation hardness, readout speed and a low power consumption have thus lead to the choice of MAPS as baseline technology option for the recently approved upgrade of the ITS and are the key drivers for R&D efforts on basic transistor and Explorer and MIMOSA pixel sensor prototypes produced in TowerJazz technology. Though the radiation loads expected for the ITS are below those of ATLAS and CMS, it is however necessary to assess the radiation hardness for ITS MAPS prototypes. Total Ionizing Dose (TID) radiation hardness has been established for basic transistor structures using a 60keV X-ray machine. The main operational characteristics and detection properties such as noise, charge collection efficiency and signal over noise ratio of Explorer-0 and MIMOSA32 and MIMOSA34 pixel sensor prototypes have been studied using X-rays (55Fe) and test beams at CERN and DESY before and after Non Ionizing Energy Loss (NIEL) and TID irradiation. In this paper the results of these R&D activities will be presented and discussed.

Monolithic active pixel sensors in CMOS technology, featuring a deep N-well as the collecting electrode (so called DNW MAPS), have been exposed to neutrons from a nuclear reactor, up to a total 1 MeV neutron equivalent fluence of about 3.7×10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">13</sup> cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-2</sup> . The irradiation campaign was aimed at studying the effects of radiation induced displacement damage on the charge collection properties of the device, which was conceived for applications to charged particle tracking in high energy physics experiments. A number of different techniques, including electrical characterization of the front-end electronics and of DNW diodes, laser stimulation of the sensors and tests with <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">55</sup> Fe and <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">90</sup> Sr radioactive sources, has been employed for evaluating the device operation before and after irradiation. This paper discusses the measurement results and their relation with the bulk damage mechanisms underlying performance degradation in DNW MAPS.

High accuracy injection circuit for the calibration of a large pixel sensor matrix

In high-energy physics experiments, Monolithic Active Pixel Sensors (MAPS) have become crucial components of vertex and tracking detectors over the past decade due to the integration of readout circuitry with the detection volume in a single chip. The requirement to achieve precise tracking and vertexing capabilities for upgrade of HEP experiments, such as ALICE at LHC and ePIC at EIC, has implied a strong R&amp;D towards an ultra-thin (a few tens of μm), bent, wafer-scale silicon sensors produced with stitching technology. Recent ongoing activities on CMOS silicon sensor testing performed at the INFN Laboratory in Bari will be described. The characterization of analogue silicon pixel sensors of 65 nm CMOS technology using electrical test pulsing and 55Fe as a soft X-ray source will be discussed. Furthermore, a study on timing performance will be presented.

Silicon pixel detectors are widely used as vertex detectors or inner trackers in high-energy collider experiments because of their excellent spatial resolution, extremely high counting capability and low power consumption. The study of the silicon pixel detector based on the monolithic active pixel sensor (MAPS) is one of the R&amp;D schemes for upgrading the inner chamber of the Beijing spectrometer Ⅲ (BESⅢ) drift chamber (MDC). It is planned to build a 1/10 scale prototype of the inner chamber. The detector module is the basic component of the prototype, consisting of ten MIMOSA28 chips thinned to 50 μm, a flexible cable and a carbon fiber support. In order to study the performance of the module, a test system is set up. The system is composed mainly of five-layer modules, readout electronics and data acquisition system. This article focuses on the realization of the continuous data readout method with trigger marking function, the measurement of the noise level of the detector modules, the module response test by a radioactive source, and the study of the hit reconstruction algorithm. The test of trigger readout logic verifies the correctness of the continuous readout method with trigger marking. It can be concluded that analyzing consecutive three frames data (the previous frame, the current frame and the next frame) of each valid trigger will not lead to effective hit data loss. The noise level of the detector module is tested. The results show that the fixed pattern noise (FPN) is 0.253 mV, and the temporal noise (TN) is 1.65 mV. The fake hit rate is less than &lt;inline-formula&gt;&lt;tex-math id="M1"&gt;\begin{document}$ {10}^{-5} $\end{document}&lt;/tex-math&gt;&lt;alternatives&gt;&lt;graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="17-20210464_M1.jpg"/&gt;&lt;graphic xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="17-20210464_M1.png"/&gt;&lt;/alternatives&gt;&lt;/inline-formula&gt; that can be ignored when the chip threshold is set to be above 4σ of noise. Two algorithms for hit reconstruction (i.e. adjacent method and comparison method) are studied and compared. When the average number of fired pixels caused by each hit is 2.562 and more than four hits in each frame of data, the adjacent method can find all of the fired pixels to be faster. During the test, the detector module and the electronics are proved to work well. These studies lay a foundation for further testing the performance of the detector prototype.

The MIMOSA pixel sensors developed in Strasbourg have demonstrated attractive features for the detection of charged particles in high energy physics. So far, full-size sensors have been prototyped only with analog readout, which limits the output rate to about 1000 frames/second. The new MIMOSA 26 sensor provides a 2.2 cm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> sensitive surface with an improved readout speed of 10,000 frames/second and data throughput compression. It incorporates pixel output discrimination for binary readout and zero suppression micro-circuits at the sensor periphery to stream only fired pixel out. The sensor is back from foundry since february 2009 and has being characterized in laboratory and in test beam. The temporal noise is measured around 13-14 e <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-</sup> and an operation point corresponding to an efficiency of 99.5±0.1 % for a fake rate of 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-4</sup> per pixel can be reached at room temperature. MIMOSA 26 equips the final version of the EUDET beam telescope and prefigures the architecture of monolithic active pixel sensors (MAPS) for coming vertex detectors (STAR, CBM and ILC experiments) which have higher requirements. Developments in the architecture and technology of the sensors are ongoing and should allow to match the desired readout speed and radiation tolerance. Finally, the integration of MAPS into a micro-vertex detector is addressed. A prototype ladder equipped, on both sides, with a row of 6 MIMOSA 26-like sensors is under study, aiming for a total material budget about 0.3% X <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">0</sub> .

The continuous advancement of accelerator-based x-ray sources has and will continue to enable new scientific opportunities. To exploit these capabilities a correspondent advancement in detector technology is necessary. FLORA (Fermilab-LCLS CMOS 3D-integRated detector with Autogain) is a large dynamic range hybrid pixel detector with continuous, fast readout rate. The detector comprises a Monolithic Active Pixel Sensor (MAPS), for very low noise and high sensitivity, and a readout ASIC with in pixel Analog-to-Digital converter (ADC), for fast readout. Advanced interconnects will be used to implement the density required for the signals processing. Originally conceived to exploit the high repetition rate operation at LCLS-II with focus on soft X-rays, FLORA can fulfill the needs of the new storage rings and its concept extended to tender and harder X-rays. The current development aims to achieve single photon sensitivity at low energy (250 eV) with a dynamic range of 104 photons per pixel per frame and a readout rate of more than 10 kframes/s.

High-performance low dropout regulator (LDO) chips are core components that provide clean power for high-precision sensors, radio frequency (RF) circuits, low noise amplifiers and other noise-sensitive circuits. In the reported literature, the designed LDO chip has advantages in certain parameters, but it cannot meet all the requirements of a high power supply rejection ratio (PSRR), low output noise and low standby current at the same time, which makes the high-end applications of LDOs greatly limited. In this paper, an LDO chip with high PSRR, low output noise and low standby current has been designed and fabricated. By increasing the loop gain, introducing an improved feedforward path, and adopting isolated power supply, the PSRR of the LDO at different frequency bands is greatly improved. By optimizing the design of the error amplifier (EA) and adding a low-pass filter to filter out the reference noise, the output voltage noise of the LDO is reduced. Within the depletion process and an optimized reference structure, the standby power consumption of the LDO is reduced without damaging the output voltage accuracy. The chip is taped out with SMIC’s 0.18 μm/5 V/BCD process. The measured PSRR of the chip is as high as 95dB at a frequency of 1 kHz, and the high-frequency (1 MHz) PSRR is above 45 dB. The amplitude of integrated output noise is below 5.4 μVrms within the frequency range of 10 Hz to 100 KHz. When the load current is zero, the measured standby current is less than 400 nA. The test results indicate that the chip has excellent performance in terms of PSRR, output noise and standby power consumption.

A new control scheme for a single phase shunt Active Power Filter (APF) is proposed in this paper. The goal is the introduction of a new reference generator along with a repetitive current control scheme. The proposed reference generator uses a filter based on a sinusoidal signal integrator and the instantaneous reactive power theory to compute the APF reference current. The proposed scheme can be easily adapted to work in a distributed generation system, injecting active power into the grid. The whole control algorithm has been implemented on the dSPACE DS1103 development system controlling a single phase APF prototype to demonstrate the feasibility of the proposed solution.

We have developed a monolithic three-terminal voltage-controlled current source which operates between 300 K and 4 K, has large intrinsic voltage amplification and compliance, resembling therefore a high-performance field-effect transistor: the SuperFET. Two additional terminals allow for optional and auxiliary biasing. This structure was fabricated using a GaAs MESFET foundry process that has three types of FETs available with quite different breakdown and threshold voltages. By properly combining three FETs, one of each type, high performance is obtained in the three-terminal structure: the intrinsic voltage amplification at 77 K is at least 10000 for a drain voltage up to 15 V. The input FET has a width of 50000 μm to assure low series noise. Based on the SuperFET configuration, a charge-sensitive preamplifier was implemented for demonstration, using additional circuitry included on the chip. This preamplifier develops output pulses up to 10 V, a value 2.5 times larger than the highest so far reached with cryogenic GaAs monolithic circuits. This opens new interesting opportunities in applications where, besides low noise and high speed, dynamic range is a demanding requirement. One such application is the signal amplification of cryogenic liquid calorimeters used in high-energy physics experiments.

12 - Performance verification of low noise, low dropout regulators: Silence of the amps

The Heavy Flavor Tracker (HFT) is a recently installed micro-vertex detector upgrade to the STAR experiment at RHIC, consisting of three subsystems with various technologies of silicon sensors arranged in 4 concentric cylinders. The two innermost layers of the HFT close to the beam pipe, the Pixel (“PXL”) subsystem, employ CMOS Monolithic Active Pixel Sensor (MAPS) technology that integrate the sensor, front-end electronics, and zero-suppression circuitry in one silicon die. This paper presents selected characteristics of the PXL detector part of the HFT and the hardware, firmware and software associated with the readout system for this detector.

Photonics chip-based soliton microcombs have been used in many applications including LIDAR, spectroscopy, coherent communication and astronomical spectrometer calibration [1]. Current-initiated soliton microcombs have been demonstrated [2, 3] recently, signifying improvements in the fabrication of high-Q Si 3 N 4 microresonators. However, both approaches suffer from limited input laser power, thus only demonstrated single-soliton at repetition rates above 149 GHz, which are challenging to detect with commercially available photodetectors. Here we demonstrate a single-soliton generation in 100-GHz-FSR Si 3 N 4 microresonators fabricated using the photonic Damascene reflow process [4], yielding the intrinsic Q-factor exceeding 15 million [5]. Using a compact hybrid laser with narrow linewidth, low relative intensity noise (−160 dBc/Hz at f offset =100 kHz) and high output power up to 100 mW [6], different comb states are observed by simply changing the current of the laser diode, without the need of complex tuning mechanism such as a single sideband modulator [7]. As the laser noise is directly transferred to the soliton comb line, this low-noise laser can be utilized in applications where the phase noise is a critical parameter, e.g. low-noise microwave generation or coherent communication. The experimental setup shown in Fig. 1 (a) consists of an ULN laser operated by a current source and temperature controllers to tune its frequency and power. After the light is coupled into the Si 3 N 4 photonic chip via double inverse nano tapers [8], the temperature of FBG/GC is changed to align the laser wavelength to the resonance of the microresonator. The laser diode current is increased (≈ 330 mA) until soliton existence range is sufficiently long. This is indicated by transmission signal directly observed after the chip on the photodetector (Fig. 1 c). Due to high-Q factor of the Si 3 N 4 , the soliton state can be accessed via simply frequency forward tuning [9], without the need of any complex soliton tuning mechanism. Further, different comb states are observed, i.e. modulation instability, multi-soliton state and single-soliton state, via laser diode current tuning. The coherence properties of the soliton-comb teeth is asserted by performing a heterodyne beatnote measurement using a reference laser with a short-time linewidth of 10 kHz (Fig. 1b). The soliton spectrum is fitted with a sech2 function corresponding to a 3 dB bandwidth of ≈19.3 nm and a ≈131.5 fs pulse.

A novel monolithic active pixel detector in [formula omitted] triple well CMOS technology with pixel level analog processing