A high frequency current mode ladder filter using multiple output lossless integrator

ABSTRACTA structure for a low input impedance current buffer transimpedance amplifier (CBTIA) is presented, which holds great potential for flexible bioelectronic applications requiring high linearity sensing and transmission. Based on this structure, a tunable CBTIA and a low input impedance CBTIA circuits are implemented. The former utilizes a current sink input mode, where the voltage at the drain of common gate transistor is fed back to the gate of input current sink transistor in order to achieve low input impedance. A self‐biasing optimization (SBO) technique is proposed for self‐regulation of voltage headroom at each node. Additionally, the active load constructed by pseudo current source converts the current to voltage. Due to the current sink input mode, this design ensures that adjusting the transimpedance gain does not affect the input impedance. Furthermore, in the second circuit design, feedback is provided to the gate of an SBO regulated transistor in order to achieve even lower input impedance. The proposed CBTIAs were successfully implemented using 10‐ m IZO TFT technology. Test results show that the tunable CBTIA achieves a transimpedance gain range of 15.2 K to 47.4 K while maintaining an unchanged 2 K input impedance, and the low input impedance CBTIA achieves an input impedance less than 1.3 K with a 61.7 K transimpedance.

New low voltage low power CMOS current conveyor (CCII) is presented. The proposed CCII is based on rail-to-rail class AB folded cascode operational amplifier. The new CCII provides very low input impedance at X-port, very high input impedance at Y-port, accurate voltage and current tracking with low offset, and very wide bandwidth. As an application, an oscillator has been built based on the proposed CCII. The performance of the proposed CCII has been confirmed by PSPICE simulation program using TSMC MOSIS 0.18 µm CMOS technology. The presented CCII is supplied at ± 0.75 V.

Modern wideband transceivers that supports several different wireless communication standards require flexible intermediate frequency (IF) chains. Active low-pass filters are essential blocks in all transceiver architectures and their IF chain designs. In this paper, an active low-pass filter with a variable filter order and cut-off frequency is proposed. The filter order control gives a possibility to optimize the IF chain for different modes of transceiver operation like reduced power consumption or/and noise. The proposed filter can achieve a 6th, 4th or 2nd order low-pass filter response with a tunable cut-off frequency from 20MHz to 120MHz. The proposed design was verified with Cadence using a 65nm CMOS technology.

In this paper, a bandpass filter with controllable cutoff frequency is designed by using current mode synthesis method which is good to design the low-voltage and low-power filter. The designed bandpass filter is composed of cascade connection between 3rd Butterworth highpass filter and 3rd Chebychev lowpass filter. And as a core circuit in the current-mode filter, a current-mode integrator and differentiator are designed and apply to designing filters. The cutoff frequency of the designed 6th bandpass filter can be controlled to 120kHz~54MHz according to control voltage, 0.7V~1.5V.

A low impedance receiver for power efficient current mode signalling across on-chip global interconnects

Current-mode electronically tunable biquadratic filters consisting of only CCCIIs and grounded capacitors

A New CMOS resistor based current mirror with extremely low voltage requirement at input (in the range of a few mV) and output voltage requirement of about one V ds is presented. The proposed structure combines the advantages of wide input swing, wide output swing, large output impedance, low input impedance and high linearity altogether, which make it attractive for high performance low-voltage and low power applications. Pspice simulations show a very low THD of −42.2dB from a single 0.9V supply in 0.18µm, input impedance of 239Ω, output impedance of 1.2MΩ and power dissipation of only 180µW. Interestingly, the input and output voltage requirements are only 10mV and 0.1V respectively.

In this paper a novel high output impedance, low input impedance, wide bandwidth, very simple mirror/source structure with input and output voltage requirements less than that of a simple current mirror is presented. It can be also used as variable negative impedance converter (variable-NIC) by modifying amplifier transistors' aspect ratios. The circuit's principle of operation is discussed and compared to simple and low voltage cascode (LVC) current mirrors. Working with power supplies less than 1volt, the proposed circuit provides output impedance greater than LVC current mirror. Such outstanding features of this current mirror as high output impedance~25.3M, low input impedance~44, wide bandwidth~498 MHz, low input voltage ~ 415 mV, low output voltage ~ 149 mV and low current transfer error ~1.3% (all at 10 ¿A) makes it an outstanding choice for high performance applications. Simulation results in BSIM 0.35 ¿m CMOS technology with Hspice are given in comparison with simple, and LVC current mirrors to verify and validate the performance of the proposed current mirror/NIC.

Comparison of four methods for determining the cut-off frequency of accelerometer signals in able-bodied individuals and ACL ruptured subjects

An induction voice coil motor (VCM) is composed of a moving metal ring, permanent magnets, cores and exciting coils. The moving ring current induced by an exciting coil current, and the magnetic flux of the permanent magnets, generate a driving force acting on the moving ring. The induction VCM is not able to generate forces below the lower cutoff frequency or above the higher cutoff frequency. The lower cutoff frequency is lowered by raising the permeability and lowering the hysteresis loss of the core; the higher cutoff frequency is raised by reducing core eddy current losses and lowering the leakage inductance of the moving ring. There is an electromechanical parallel resonance near the lower cutoff frequency, and the higher permeability and lower loss make the resonance stronger and lowers the resonance frequency.

Multiple-input single-output low-input and high-output impedance current-mode biquadratic filter employing five modified CFTAs and only two grounded capacitors

Nowadays, current passive mixers represent the state of the art for signal down-conversion in wireless receivers. In such kind of structures, noise, distortions and losses are strictly correlated to the performance of the stage following the mixer. The most common solution adopted to sense the down-converted current is a transimpedance amplifier (TIA) in shunt with a capacitance to ground that assures a low input impedance when the loop gain of the amplifier decreases (Fig. 20.9.1a). A low input impedance is necessary to have a small voltage swing at the output of the mixer (typically few hundreds mV) to minimize the modulation of the switch resistance and with it the distortion produced during the downconversion. The input capacitance can also be used to filter the majority of the out-of-band interferers by transforming the TIA into a filter [1,2] (Fig. 20.9.1b). This reduces the dynamic range required by the TIA and its power consumption. This advantage comes at a cost of area, since the limited voltage swing tolerable at the input of the TIA demands a large capacitor to absorb the downconverted interferers. This trade-off is relaxed with the proposed solution (Fig. 20.9.2), where the input capacitance (C1) is partially boosted by a feedback network minimizing the swing required at the input of the TIA. This idea, originally proposed in [3] only to improve the 1dB compression point, is now used to maximize the spurious-free dynamic range of the TIA, exploiting an intrinsic in-band highpass shaping of noise and distortion. Furthermore, an adaptive transfer function, which improves its filtering action in presence of large out-of-band interferers, is realized.

A new Floating gate metal oxide semiconductor (FGMOS) and a CMOS Resistor-based current mirror (RBCM) with very low voltage requirement at input and output voltage is presented in this paper. The proposed circuit employs two resistors arranged in a symmetrical configuration, one control circuit and FGMOS the resulting error in two resistors circuits is subtracted to each other, this property reduces error and improves precision. The circuit is designed and investigated by using Cadence virtuoso, EDA tool with 180 nm technology under supply voltage of 0.75 V. This circuit has the advantage of high output impedance, low input impedance, wide input swing, large output swing, high linearity which makes this circuit a preferred choice for high performance low-voltage, wide range of input voltage and low-power application. The simulation results show are quite motivating as this circuit offers extremely low input impedance of 370 <tex>$\Omega$</tex>, output impedance of 1 <tex>$7\mathrm{M}\Omega$</tex> and power consumption of 150 <tex>$\mu$</tex> A.

The paper describes a new CMOS current LC-oscillator using an inductive effect observed in the current (low impedance) input terminal of a current conveyor. The calculation of the equivalent inductance and its Q-factor is given. The oscillator is then realized by a simple connection of a capacitor between this current input and output of the current conveyor. To control the oscillation amplitude, a resistor is connected between the conveyor output and ground. The results of calculations are verified using simulations of the circuit designed for 0.18 /spl mu/m CMOS technology.

Optical wireless communications systems are preferably designed to receive a strong signal over a wide field of view and with a large bandwidth. These are conflicting requirements. Recently it has been proposed and experimentally tested to split the surface area of the photodiode (PD) into N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</inf> by N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</inf> subareas, and to place N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">p</inf> rows in parallel with N <inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">s</inf> of these in series. This paper generates a deeper insight in this solution by analyzing the performance, in particular in combination with the low-noise transimpedance amplifier (TIA). In fact, by creating a virtual-ground (very low impedance) input, a TIA flattens the frequency response thereby mitigates parasitic PD capacitances. With decreased capacitance due to serial connection of PDs, noise is also less boosted at high frequency. Our analysis is compared with SPICE simulations.