A High-Security mutual authentication system based on structural color-based physical unclonable functions labels

Physical unclonable functions (PUFs) are devices which are easily probed but difficult to predict. Optical PUFs have been discussed within the literature, with traditional optical PUFs typically using spatial light modulators, coherent illumination, and scattering volumes; however, these systems can be large, expensive, and difficult to maintain alignment in practical conditions. We propose and demonstrate a new kind of optical PUF based on computational imaging and compressive sensing to address these challenges with traditional optical PUFs. This work describes the design, simulation, and prototyping of this computational optical PUF (COPUF) that utilizes incoherent polychromatic illumination passing through an additively manufactured refracting optical polymer element. We demonstrate the ability to pass information through a COPUF using a variety of sampling methods, including the use of compressive sensing. The sensitivity of the COPUF system is also explored. We explore non-traditional PUF configurations enabled by the COPUF architecture. The double COPUF system, which employees two serially connected COPUFs, is proposed and analyzed as a means to authenticate and communicate between two entities that have previously agreed to communicate. This configuration enables estimation of a message inversion key without the calculation of individual COPUF inversion keys at any point in the PUF life cycle. Our results show that it is possible to construct inexpensive optical PUFs using computational imaging. This could lead to new uses of PUFs in places where electrical PUFs cannot be utilized effectively, as low cost tags and seals, and potentially as authenticating and communicating devices.

For modern security, devices, individuals, and communications require unprecedentedly unique identifiers and cryptographic keys. One emerging method for guaranteeing digital security is to take advantage of a physical unclonable function. Surprisingly, native silk, which has been commonly utilized in everyday life as textiles, can be applied as a unique tag material, thereby removing the necessary apparatus for optical physical unclonable functions, such as an objective lens or a coherent light source. Randomly distributed fibers in silk generate spatially chaotic diffractions, forming self-focused spots on the millimeter scale. The silk-based physical unclonable function has a self-focusing, low-cost, and eco-friendly feature without relying on pre-/post-process for security tag creation. Using these properties, we implement a lens-free, optical, and portable physical unclonable function with silk identification cards and study its characteristics and reliability in a systemic manner. We further demonstrate the feasibility of the physical unclonable functions in two modes: authentication and data encryption.

Advances in hacking and counterfeiting demand new security architectures. Optical physically unclonable functions (PUFs), which derive their cryptographic strength from optical responses to structural randomness, are promising platforms for next-generation security. However, despite considerable effort, achieving high readout reliability under various light conditions, stability, and reconfigurability in optical PUFs for practical use remains challenging. Here we present an optical PUF based on disordered wrinkles arising from a Young's modulus mismatch between a silicone-polymer surface and its bulk. These mechanically encoded wrinkles produce unclonable optical responses under varied illumination, and treating the applied strain vector as the challenge markedly expands the key space. In addition, rotating the region of interest provides a simple route to reconfiguration. The resulting PUF exhibits near-ideal performance across an expanded and reconfigured challenge-response space. Patterns generated by the PUF reliably serve as identifiers and cryptographic keys for mutual authentication and image encryption. This mechanically encoded PUF is poised to provide a robust platform for next-generation security systems.

Modern embedded electronic devices are gradually becoming an essential part of everyday lives, proving indispensable for daily activities. The growth of the Internet of things (IoT) technology fuels this phenomenon. IoT devices are found everywhere around us – smartphones, smartwatches, home automation, autonomous cars, and medical implants for human bodies. These devices find widespread use in medical imaging, video surveillance as embedded vision, cloud computing platforms, and military applications. Ensuring the reliability and safety of these devices is of prime importance, since these devices store sensitive data. A wide range of such embedded devices is a common target for intellectual property (IP) theft and reverse-engineering attacks by hackers to access confidential information and counterfeit integrated circuits. Physically unclonable functions (PUFs) are innovative hardware defense techniques that promise a fundamental change in our approach to many security problems. PUFs possess desirable properties like low cost, simple architectures, a light weight, versatility, and the valuable advantage of unclonability. This unclonable property is a consequence of intrinsic random variations at the micro- and nanoscale levels in the manufacturing processes and cannot be controlled or removed. This characteristic also serves as a unique fingerprint for the integrated circuit chips, similar to humans. The widespread usage of PUF techniques in security applications makes it imperative for hardware designers to appreciate its working and understand its uses in practice fully. This chapter aims to address these and other topics by presenting a detailed introduction of the concepts, evaluation parameters, and various ramifications of physically unclonable functions. PUF techniques also provide an economical alternative to ciphers and hash functions for secure cryptographic protocols. It is also necessary to provide security of IoT devices, have economic viability, and fit well with embedded devices’ heterogeneous nature. PUF circuits receive challenges as a sequence of bits and generate matching responses called a challenge-response pair, which can be thought of as a secret key or unique fingerprint. It also obviates the need for storing the keys in nonvolatile memories with dedicated protection, which is a costly affair. In this chapter, different PUFs, including optical PUF, delay-based PUFs, weak and strong PUFs, etc., the maturity of this technology, and their various applications are investigated. This chapter also emphasizes critical challenges toward PUF utilization in IoT and related fields and significant future development areas like critical public infrastructure, reconfigurability, and bit-specific reliability. The unique IoT domain protection criteria and how PUFs can be used to fulfill them are also examined. The chapter’s emphasis is on proven and well-understood strategies involving their benefits and shortcomings.

Physical Unclonable Functions (PUFs) are promising security primitives for resource-constrained network nodes. The XOR Arbiter PUF (XOR PUF or XPUF) is an intensively studied PUF invented to improve the security of the Arbiter PUF, probably the most lightweight delay-based PUF. Recently, highly powerful machine learning attack methods were discovered and were able to easily break large-sized XPUFs, which were highly secure against earlier machine learning attack methods. Component-differentially-challenged XPUFs (CDC-XPUFs) are XPUFs with different component PUFs receiving different challenges. Studies showed they were much more secure against machine learning attacks than the conventional XPUFs, whose component PUFs receive the same challenge. But these studies were all based on earlier machine learning attack methods, and hence it is not clear if CDC-XPUFs can remain secure under the recently discovered powerful attack methods. In this paper, the two current most powerful two machine learning methods for attacking XPUFs are adapted by fine-tuning the parameters of the two methods for CDCXPUFs. Attack experiments using both simulated PUF data and silicon data generated from PUFs implemented on field-programmable gate array (FPGA) were carried out, and the experimental results showed that some previously secure CDC-XPUFs of certain circuit parameter values are no longer secure under the adapted new attack methods, while many more CDC-XPUFs of other circuit parameter values remain secure. Thus, our experimental attack study has re-defined the boundary between the secure region and the insecure region of the PUF circuit parameter space, providing PUF manufacturers and IoT security application developers with valuable information in choosing PUFs with secure parameter values.

Communication security is essential for the proper functioning of the Internet of Things. Traditional approaches that rely on cryptographic keys are vulnerable to side-channel attacks. Physical Unclonable Functions (PUFs), leveraging unavoidable and irreproducible variations of integrated circuits to produce responses unique for individual PUF devices, are emerging as promising candidates as security primitives to provide keyless solutions. Before a PUF can be adopted for real applications, the PUF must be thoroughly examined to understand its various properties for its application feasibility. In this paper, we study XOR PUFs for broad ranges of values for circuit architecture parameters. XOR PUFs have been extensively studied, and have been shown to be unable to withstand machine learning attacks for 64-bit XOR PUFs with less than ten component PUFs. Attack methods employed in existing studies need a large number of challenge-response pairs (CRPs), which are obtainable only if the PUF has an open access interface. When PUF-embedded devices equipped with mutual authentication or response obfuscating techniques, it is difficult for attackers to accumulate large numbers of CRPs. With only a small number of accumulated CRPs available to attackers, small size PUFs, like XOR PUFs with a small number of component PUFs and stages, may become resistant to machine learning attacks. Since smaller sizes mean less resource-demanding, it is worthwhile to examine such PUFs which have usually been considered unsafe against attacks. Such are thoughts that have been motivating us in this paper to explore the PUF performances for a wide range of values of the PUF architecture parameters.

Several publications presented tamper-evident Physical Unclonable Functions (PUFs) for secure storage of cryptographic keys and tamper-detection. Unfortunately, previously published PUF-based key derivation schemes do not sufficiently take into account the specifics of the underlying application, i.e., an attacker that tampers with the physical parameters of the PUF outside of an idealized noise error model. This is a notable extension of existing schemes for PUF key derivation, as they are typically concerned about helper data leakage, i.e., by how much the PUF’s entropy is diminished when gaining access to its helper data. To address the specifics of tamper-evident PUFs, we formalize the aspect of tamper-sensitivity, thereby providing a new tool to rate by how much an attacker is allowed to tamper with the PUF. This complements existing criteria such as effective number of secret bits for entropy and failure rate for reliability. As a result, it provides a fair comparison among different schemes and independent of the PUF implementation, as its unit is based on the noise standard deviation of the underlying PUF measurement. To overcome the limitations of previous schemes, we then propose an Error-Correcting Code (ECC) based on the Lee metric, i.e., a distance metric well-suited to describe the distance between q-ary symbols as output from an equidistant quantization, i.e., a higher-order alphabet PUF. This novel approach is required, as the underlying symbols’ bits are not i.i.d. which hinders applying previous state-of-the-art approaches. We present the concept for our scheme and demonstrate its feasibility based on an empirical PUF distribution. The benefits of our approach are an increase by over 21% in effective secret bit compared to previous approaches based on equidistant quantization. At the same time, we improve tamper-sensitivity compared to an equiprobable quantization while ensuring similar reliability and entropy. Hence, this work opens up a new direction of how to interpret the PUF output and details a practically relevant scheme outperforming all previous constructions.

The lack of stability is one of the limitations that constrain physical unclonable function (PUF) from being put in widespread practical use. In this paper, we propose a weak PUF and a strong PUF that are both completely stable. These PUFs are called locally enhanced defectivity physical unclonable function (LEDPUF). An LEDPUF is a pure functional PUF that does not require any kinds of correction schemes as conventional parametric PUFs do. The source of randomness of an LEDPUF is extracted from locally enhance defectivity without affecting other parts of the chip. In this paper, we construct a weak LEDPUF by forming arrays of directed self-assembly random connections, and the strong LEDPUF is implemented by using the weak LEDPUF as the key of a keyed-hash message authentication code. Our simulation and statistical results show that the entropy of the weak LEDPUF bits is close to ideal, and the inter-chip Hamming distances of both weak and strong LEDPUFs are about 50%, which means that these LEDPUFs are not only stable but also unique. We develop a new unified framework for evaluating the security of PUFs, based on password security, by using information theoretic tools of guesswork. The guesswork model allows us to quantitatively compare, with a single unified metric, PUFs with varying levels of stability, bias, and available side information. In addition, it generalizes other measures to evaluate the security level, such as min-entropy and mutual information. We evaluate the guesswork-based security of some measured static random access memory and ring oscillator PUFs as an example and compare them with an LEDPUF to show that the stability has a more severe impact on the PUF security than biased responses. Furthermore, we find the guesswork of two new problems: guesswork under the probability of attack failure and the guesswork of strong PUFs that are used for authentication.

Recent fourth industrial revolution, industry4.0 results in lot of automation of industrial processes and brings intelligence in many home appliances in the form of IoT, enhances M2M / D2D communication where electronic devices play a prominent role. It is very much necessary to ensure security of those devices. To provide reliable authentication and identification of each device and to abort the counterfeiting from the unauthorized foundries Physical Unclonable Functions (PUFs) emerged as a one of the promising cryptographic hardware security solution. PUF is function, mathematically modeled by using uncontrollable/ unavoidable random variances of the fabrication process of the ICs. These variances can generate unpredictable, random responses can be used to overcome the difficulties such as storing the keys in non-volatile memories (NVMs) in the classical cryptography. A wide variety of PUF architectures such as Arbiter PUFs, Ring oscillator PUFs, SRAM PUFs proposed by authors. But due to its design complexity and low cost, Delay based Arbiter PUFs (D-PUFs) are considering to be a one of the security primitives in authentication applications such as low-cost IoT devices for secure key generation. This paper presents a review on the different types of Delay based PUF architectures proposed by the various authors, sources to exhibit the physical disorders in ICs, methods to estimate the Performance metrics and applications of PUF in different domains.

Embedded systems carry and process more and more sensitive information in untrusted environments, where an attacker can wiretap the external communication and also has unlimited physical access to the device. Cryptography protects systems against many of the threats and relies on the security of the cryptographic keys inside the system. Physical Unclonable Functions (PUFs) measure manufacturing variations inside integrated circuits, for example FPGAs, to generate a unique secret PUF response inside each device. Similar to deriving a biometric pattern from human features, the individual pattern inside an FPGA differs slightly from measurement to measurement. From these measurements, the PUF response is generated to derive a secure and reliable cryptographic key. The Ring-Oscillator (RO) PUF is a popular PUF type because of its high randomness and reliability. Frequencies of ROs are compared pairwise to derive one secret bit. So far, the reliability of RO PUFs was evaluated by counting bit flips in measured PUF responses. This work analyzes the distribution of frequency measurements to derive the behavior of the PUF. Analyzing the frequency distributions gives a more precise estimation of the PUF bit error rates than measuring the bit errors after the comparison of two oscillator frequencies. The evaluation of publicly available real world empirical FPGA data has shown that most error probabilities of RO PUF responses are so low that they cannot be measured in feasible time. For almost 200 evaluated FPGAs, more than 70% of the PUF outputs on every FPGA have bit error probabilities under 10 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">-20</sup> . We can even ensure this error probability for over 60% of the PUF outputs after a practicable number of frequency measurements with a confidence of 99.9%. Index Terms-Physical Unclonable Functions (PUFs), Ring Oscillator PUF, FPGA, Statistics.

Physical Unclonable Functions (PUF) are an emerging hardware security primitives proposed by various researchers in last one decade. PUFs are useful security architectures used for identification, authentication and cryptographic key generation. Many PUF topologies are proposed in the past targeting both ASIC and FPGA. It is nearly impossible to get two PUF circuits with same characteristics for the same design. PUFs make use of random process variation occurring during manufacturing of IC which is uncontrollable. The most versatile PUF is ring oscillator (RO) PUF, in which the frequencies of ring oscillators are compared to produce the PUF response. The conventional approach consumes large number of ring oscillators and requires all RO's to be mutually symmetric. In this paper, we have proposed a RO-PUF for FPGA devices, which is capable of generating multiple output bits from each ring oscillator with better security metrics in comparison with PUF designed with similar technique. The PUF is implemented on Xilinx Spartan 3E FPGA boards and the challenge-response pairs (CRP) are verified for statistical properties.

A Physical Unclonable Function (PUF) is a die specific random function that can be used in a number of secure IC applications including die identification/authentication and key generation. At the core of a silicon PUF is a circuit (the PUF core) that generates random bits. These bits are like a silicon biometric, unique across dies, but can be reliably reproduced multiple times on a die across voltage and temperature variations and aging. In this thesis, we discuss various aspects of a PUF design, with a strong focus on circuit details. We describe the properties and the figures of merit of a PUF and then compare various PUF core implementations. We identify the biggest design challenges and provide several solutions. Results in this work are supported by measurement data from testchips designed in 65nm bulk CMOS. We provide an apples-to-apples comparison of various PUF implementations. We demonstrate that while adequate randomness and uniqueness is achievable for most PUF implementations, achieving high reliability is a challenge. The conventional method to achieve high reliability is to use error correcting codes (ECC). Unfortunately, the overheads associated with these techniques grows very quickly with error correction capability. Alternately, researchers have proposed several error reduction techniques to minimize the use of error correction. In this work, we evaluate four orthogonal and complementary error reduction techniques. Two of these techniques, categorized as extrinsic techniques, are multiple evaluation (ME) and activation control (AC) and are able to reduce errors in PUF response by ~70-80%. The other two techniques, categorized as intrinsic, are post-silicon selection (PSS) and directed accelerated aging (DAA) and show ~100% correction of errors. As a proof of concept prototype, we describe a self-contained, BIST-controlled key-generator that implements the PSS technique to autonomously generate bits with a bit error rate &lt; 5 * 10^-9, equivalent to a 128-bit key error rate &lt; 10^-6. We also describe a realization of a strong-PUF that uses these highly reliable bits in conjunction with an Advanced Encryption Standard (AES) primitive.

A fundamental property of physical unclonable functions (PUFs) is that they generate unique outputs that cannot be reproduced by another chip, even with an identical circuit and layout design. Several configurations of feed-forward PUFs (FF PUFs) are evaluated in terms of their interchip variation, a measure of uniqueness. In general, PUFs are considered to be unique due to symmetry in their path delay distributions, which are typically Gaussian. In this paper, we prove that certain FF PUFs can result in skewed path delay distributions leading to poor uniqueness. In these PUFs, the total delay difference is sum of a symmetric Gaussian distribution and an asymmetric half-Gaussian distribution. We also compute empirical estimates and verify our observations by simulating 200 PUFs in each FF configuration. It is observed that (1) FF PUFs with one intermediate arbiter and odd number of feed-forward loops and (2) FF PUFs in cascade or separate configurations have degraded interchip variation. This is the first study to observe and prove the non-uniqueness property of such PUFs.

The physical unclonable function (PUF) serves as a security primitive of circuits, which is applicable to the embedded systems with lightweight authentication function. However, the modeling attack, which estimates the unknown CRPs by establishing the mathematical model of PUF, is a real threat to the PUF based crypto-systems. Subsequently, the anti-modeling-attack PUF becomes a research hotspot. The systematic design method of secure PUF is still an open issue, although some secure PUF schemes have been proposed based on the repeated trials. This work proposes a security improvement method of PUFs to enhance the anti-modeling-attack capability. The growth function and the Vapnik-Chervonenkis (VC) dimension of PUF are defined as the indicators of PUF security. The proposed method regards the improvement of PUF as an optimization problem, which aims to obtain a PUF scheme with the better security indicators. Guided by the indicators, the proposed method is able to specify the improvement sites of PUF and the techniques to be applied. In addition, three approaches are proposed to inspire the new security improvement techniques. An improved arbiter PUF and an improved array-based PUF are designed as the instances of the results from the proposed method. Both of the improved PUF schemes have the stronger security than the original schemes.

A new concept for Physical Unclonable Functions (PUFs), the Mirror PUF, is proposed. The Mirror PUF can be applied to existing preselected PUF circuits by post-processing the preselection test results and has the potential to double the number of effective bits, with no additional area at the bit-cell level. The Mirror PUF utilizes a preselection test, which measures the amount of mismatch within the PUF cell. This data is generally used to determine the mask for a conventional PUF. Here, it is used as an entropy source that is not correlated to the original response of the PUF. Bit-cells with low mismatch are considered as a ‘0’ and cells with high mismatch as a ‘1’. A systematic method is shown for identifying unstable bits in the Mirror PUF response. It classifies the cells to ‘low’, ‘medium’ and ‘high’ mismatch, such that medium mismatch bits are considered as unstable and masked from the response. The concept was applied to a 65nm Si implementation of the Capacitive Tilt PUF (Shifman et al., 2020). All of the unstable cells of the Mirror PUF, except for 0.03%, were identified and masked, with a worst-case corner Bit Error-Rate (BER) of only 2.35E-5 and 0.00026% erroneous responses across all corners. The application of the Mirror PUF to the Capacitive tilt PUF increased the number of stable response bits by 66%. No observable correlation was found between the responses of the original PUF and the Mirror PUF.