A Leveling Control Media Prototype in Automatic Control

Beginning with process controls in the mid fifties, digital control systems have seldom met all the claimed advantages and in many cases have been outright failures. Airborne digital computers have just begun to appear in the commercial jet transport market after several years of experimental and military development. The success of these systems in meeting user expectations has not been overwhelming, which leads to the question: Why change from known analog flight control technology to digital? This paper examines that question by reviewing the state of the art in analog flight control system technology and evaluating this against current airline problems. A realistic means of evaluating claimed advantages for new technology is thus established. The advertised solutions of digital technology to analog problems are examined and, in some cases, debunked. However, consideration of the real problems and the capabilities of digital systems leads to the conclusion that there is a real payoff. Evidence from background studies at Boeing is offered to support this conclusion. A description of the digital flight control system electronics (FCSE) development program for the new Boeing 7×7 airplane is also provided. This program is currently in progress, and its specific objective is to assure that the real payoff is achieved for the subsequent production system.

The Automatic Train Control (ATC) system was originally developed to support safe, super-high speed railway transport on Japan's Shinkansen network. East Japan Railway Company has developed a new Shinkansen ATC that utilizes digital communications and control (DS-ATC). The DS-ATC system controls train speed mainly relying on the onboard equipment allowing a reduction in rail-side devices, enhancing passenger riding comfort, and reducing arrival times and intervals between trains. This paper describes the architecture, functions, train braking process, merits of the digital ATC, and DS-ATC implementation schedule.

Digital controls have become the primary form of control in numerous applications due to the advancements in semiconductor industry and lower cost. Digital control algorithms implemented on digital signal processors (DSPs) or microcontrollers execute the algorithm at a specified clock frequency. Discrete time algorithms such as digital filters and digital PID controllers require the sampling period in the controller design, which is directly related to the microcontroller clock frequency. Due to aging, manufacturing process defects and environment conditions cause the clock frequency to drift from the specification. Such variation affects the discrete time algorithm performance deviate from expected performance.

Introduction. Nowadays, communication systems are mostly digital. One of the tasks of automatic gain control in digital receivers is to maintain analog signals at the appropriately fixed level, which prevents saturation of the analogto-digital converter. Most numerical algorithms are based on floating point arithmetic, and digital automatic gain control is usually implemented using fixed-point arithmetic devices such as programmable logic chips and signal processors. As consequence of fixed-point arithmetic and hardware constraints usage, the out-put significant bits should be truncated correctly. Although many studies mention digital automatic gain control, its characteristics are not considered in detail in terms of the finite capacity of calculators.Objective. The purpose of the study is to analyze dynamic characteristics of digital automatic gain control implemented on a computer for operations on numbers with fixed-point.Materials and methods. Within the frames of the study in Matlab software was developed a mathematical model of digital automatic gain control. The model was implemented on a programmable logic chip.Results. The paper shows the difference in characteristics and features of the digital automatic gain control during operations on fixed-point numbers. The study provides the assessment of the effect of fixed-point signals on the stability of the digital automatic gain control and includes the analysis of causes of spurious oscillations of the control signal.Conclusion. The study proposes the algorithm for compensation of the control signal oscillations by means of correction of the reference level of the digital automatic gain control. Further is required to verify the proposed algorithm on real signals. The results of the study are relevant in development of digital receivers for communication systems of various purposes.

A robust PWM power amplifier whose transient response characteristics do not deteriorate against an extensive load change and/or direct-current power-supply voltage change is needed. In this paper, a method for designing a digital robust controller for PWM power amplifier which can satisfy such demands is proposed. First, a nominal model of PWM power amplifier is derived from the linear approximation. The controlled object is described by discrete-time systems with consideration of the input dead time. It is shown that a digital controller can be designed in almost the same way as the previously proposed analog controller and then 2-degree-of-freedom digital robust systems are constituted. An integral-type control system is built by carrying out an equivalent conversion. The LC filter and the digital controller which satisfy the design specifications are determined by the proposed design procedure. Especially, the sampling period of the digital controller is determined suitably. A DSP is used to realize the digital controller obtained here. An experiment demonstrates that the proposed digital controller can satisfy all the specifications.

A visual CAD platform for designing the positioning system of optical disk drives is described in this paper. The platform consists of the opto-mechanical assembly (OMA) and its simulator of an optical disk drive, a servo control board (SCB) with a high performance digital signal processor (DSP), and a personal computer (PC). The OMA and SCB form the complete digital positioning control system of an optical disk drive. The OMA simulator and SCB provide a real-time simulation environment under which a digital controller (i.e., the DSP program) is run. On a PC with the CAD software packages, the controller can be conveniently designed and loaded into SCB. Furthermore, the behavior of the disk drive and the status, parameters and structure of the controller are visualized on the PC's display without interrupting the controller. The visualization can be implemented on three levels: post-processing, tracking, and even steering.

The article presents a new approach to the analysis of the stability of automatic systems with discrete links. In almost all modern automatic control systems (ACS), there are links that break signals in time. These are power controlled switches—transistors or thyristors operating in a pulsed mode and digital links in regulators. Time discretization significantly affects the stability of processes in the automatic control system. The theoretical analysis of such systems is rather complicated and requires a significant change in engineering approaches to analysis. With the improvement of digital controllers and a significant increase in their performance, this problem has practically been forgotten. However, its mathematical “content” has not changed since the 1980s when discreteness began to play a major role in hindering the transition to digital automatic control systems. In this paper, we propose a new approach that consists of interpreting the sampling operation by a link with the proposed frequency characteristic, which determines the suppression of input high-frequency signals. This link greatly simplifies engineering calculations and demonstrates the new capabilities of sampling systems. These possibilities include the rational distribution of digitalization resources—the number of bits and the sampling interval between the regulator channels, depending on the frequency range of the efficiency of these channels. We verify and confirm our theoretical statements through simulations and show how this approach makes it possible to formulate new principles of construction of seemingly well-known controllers—PID (Proportional Integral Differential) controllers and variable structure systems (VSS).

The use of multiple digital signal processors (DSPs) to implement a real-time digital controller is described. Specially, the multi-DSP implementation of a multi-input single-output digital controller with small sampling period and throughput time is considered. The optimal scheduling problem to achieve the minimum sampling period when the number of available DSPs is fixed is formulated. A scheduling algorithm based on a branch-and-bound approach for the optimization problem is then proposed. The multi-DSP system has also been realized experimentally. The proposed algorithm has been implemented and tested by a breadboard experiment using three DSPs. >

Digital Control and Signal Processing Systems and Techniques

Application of Digital Control Techniques for Satellite Medium Power DC-DC ConvertersThe objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter is based on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage and current mode stabilization that was implemented using VHDL. The described controllers are based on a classical digital PID controller. The converter used for testing is a 200 kHz, 750W buck converter with 50V/15A output. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.

Modern High performance control applications demanded from mixed-signal and digital signal processors (DSPs) are ever increasing. As digital circuits and DSP operate at a higher rate, a considerable amount of noise and radiation degrades the system?s performance and creates EMI problems that make it difficult to pass tests required to obtain certification by the EMC regulations. In this paper, we introduce some effective methods for reduced EMI of the measurement and control systems, which are power supply design, clock and phase-locked loop (PLL) isolation, decoupling techniques, digital and analog partitioning, printed circuit board (PCB) layout, and so on for meeting many challenges of mixed-signal and DSP systems design. Design guidelines for improved EMC and signal integrity are derived from the results obtained, thus, the evaluation board of the measurement and control systems is especially suitable for performing function in high definition array induction log (HDAIL).

The series of IEC 61850 standards is currently the most widely used source for description of a digital substation’s equipment and processes; therefore, advanced technologies in the field of designing relay protection and automatic controls (PAC) shall inevitably be developed in compliance with the requirements of these standards. However, the scope of this standard series was originally limited to describing SCADA-controlled facilities and processes, which poses certain restrictions on the standard series capabilities. PAC systems should be designed subject to the IEC 61850 requirements, but at the same time, the IEC 61850 standard does not provide any tools and has no intent for thoroughly describing the structure and operational principle of PAC devices, and only describes the external interface for monitoring the necessary data, which is sufficient from the SCADA system perspective. Such restrictions of the standard series can be clearly seen when it comes to designing centralized PAC systems, PACs with migrating functions and digital substation computer-aided designing and monitoring systems, which pose more stringent (compared to a SCADA) requirements for describing the information model structure and for data exchange between its parts. The fact that the actual algorithmic support of the PAC functions differs from their information models has an impact on designing the functional requirements for logic units (LU). The functional requirements for LUs cannot be developed unless there is understanding of the logical device (LD) structure that will reflect a certain function; however, IEC 61850 does not specify any logical device structure. As a result, both the structure of logical devices and the functions implemented within one LU may differ essentially from manufacturer to manufacturer, which has a negative impact on the compatibility of the solutions offered in the market. The development of logical devices and units within the research framework revealed a number of problems connected with the specific features of implementing IEC 61850, which result in lack of unambiguity of LU and LD implementations. Thus, the standard does not specify the sources of signals supporting the LU operation, nor does it consider a functional for processing and producing measurements for relay protection as part of the information model. The standard does not describe the functions typical for the domestically adopted PAC designing practice. It should also be noted that the UES Federal Grid Company’s corporate profile specifies them only partially since it inherits the description structure from IEC 61850. The article suggests a change in the approach to the use of logical units. Currently, the function information model represents only an external interface. This interface makes it possible to obtain, from the midst of algorithmic support, the values of necessary signals with the required semantics, which is functionally useful only for the SCADA. Thus, it turns out that the functional requirements for an LU should define the requirements for the external interface instead of the algorithmic support implementing the PAC function, which to a certain degree makes a nonsense. The article proposes to set up, for each LU, an independent separate algorithmic support, so that the algorithmic support structure would be consistent with that of the information model. In view of this feature, logical devices and units are developed that reflect the PAC functions for facilities of medium and high voltage classes. In addition, data objects are classified into input, output signals and setting parameters, and the extensions of LU information models, should a need to do so arises, are suggested. The study has revealed multiple applications of similar LUs in different PAC functions, which pose specific requirements for the LU operation. In this connection, it is decided to standardize the entire specific functional within a single LU type with the possibility to choose the necessary operation mode by changing the setting parameters. The development of the algorithmic support has revealed repeating types of LU algorithmic support structure, which were combined into three categories: measuring, starting-functional, and functional. For each of the LU types, there is a certain set of LU functional blocks. The designing of PAC functions on the basis of the new approach to the use of LUs has the following advantages: the protection scheme modular structure makes it possible to select the set of protection functions in a wide range at the designing stage; strict definition of interconnections and data exchange between LUs simplifies the understanding of protection operation, and opens the possibility to evaluate the influence of the LU operation mode on the performance of the protection function as a whole; the protection scheme modular structure with a predictable behavior of LUs makes it possible not only to monitor the correct operation of protection using special automatic tools, but also to automatically develop protection schemes. The disadvantage of this approach is the need to develop the PAC algorithmic support from scratch, because the previously developed algorithms do not imply the information model structure. The process of developing a logical device is shown within the article framework on the example of the medium voltage class overhead power line overcurrent protection with a detailed description of the logic device structure and the purpose of the presented LUs. A configurator software was developed during the study, which makes it possible to configure logical devices based on the library of developed LUs with subsequently making binary files to be uploaded on a hardware platform. The unambiguous description of information exchange between LUs generated the need to extend the SCL syntax, as a result of which a new format of CLD files was produced. The mechanism of applying reference data objects like InRef and BlkRef, that are part of the standard SCL syntax is not applicable because they lack semantic meaning. The article describes a successful process of testing and validation of the developed algorithms/logic units and logic devices on a hardware platform, as well as the problems revealed during the testing, which are connected with the lack of regulatory requirements for functional testing of logic units and methods for taking into account the impact of various quality labels of data objects.

The combination of the automatic control theory courses, simulation verification and practical implementation of the designed controller algorithms in real-time conditions is very important for training of the control engineers.This contribution present structure and usage of Self-tuning Controllers Simulink Library (STCSL) for real time control.The STCSL was created for design, simulation verification and especially realtime implementation of single input -single output (SISO) digital self-tuning controllers.The proposed adaptive controllers, which are included in the library, can be divided into three groups (PID controllers, controllers based on the polynomial approach and the controllers derived on the other approaches (minimum variance etc.).This Library is very successfully used in Adaptive Control Course in education practice for design and verification of self-tuning control systems in simulation and real-time conditions.It is suitable also for design and verification of industrial digital controllers.The highly nonlinear laboratory model, the DR300 Speed Control with Variable Load, has been chosen as example for real-time control.

With the development of modern automatic control technology, digital control technology has advanced technology and inherent advantages compared with traditional analog control technology. Therefore, the use of digital instrument and control system has become an inevitable trend of global nuclear power construction. Nuclear power embedded real-time operating system is an important part of digital instrument and control system in nuclear power plant. It is responsible for managing the hardware resources of the whole system and providing operation environment for application software. Its safety directly affects the safety of instrument and control system. This paper studies the application of embedded information technology in the safety of nuclear power plant, and puts forward a safety related scheme of embedded information system. The scheme fully considers the confidentiality, integrity and availability of information in the digital instrument and control system of nuclear power plant. The application results show that the scheme can meet the information security requirements of nuclear power instrument and control system, and has reference and guiding significance for the research and development of nuclear power embedded real-time operating system.

This paper presents the implementation and experimental details of a real-time digital simulator designed for representing a Distribution Static Compensator (D-STATCOM) interfaced with a digital controller. Real-time simulation using conventional fixed time-step integration algorithms can lead to erroneous results due to the lack of synchronism between the simulator time-step and the discrete switching signals coming from the digital controller. The real-time simulation algorithm implemented in this paper overcomes the drawbacks of a fixed time-step algorithm. The real-time algorithm relies on precise registration of timing of the incoming discrete firing pulses and a subsequent correction procedure to calculate the system state. This approach has been implemented on a hybrid digital processing platform comprising of a Digital Signal Processor (DSP) and a Field Programmable Gate Array (FPGA). The platform represents both the power electronic system and the digital control system. Experimental results, for a 5 kV A D-STATCOM system, in verification of the real-time simulator results are also provided.