A new look-up table-based multiplier/squarer design for cryptosystems over GF(2m)

Look-up table (LUT) halftoning is an efficient way to construct halftone images and approximately simulate the dot distribution of the learned halftone image set. In this paper, a general mechanism named multiple look-up table (MLUT) halftoning is proposed to generate the halftones of direct binary search (DBS), whereas the high efficient characteristic of the LUT is still preserved. In the MLUT, the standard deviation is adopted as an important feature to classify various tables. In addition, the proposed quick standard deviation evaluation is employed to yield an extremely low computational complexity in calculating the standard deviation. In the parameter optimization, the autocorrelation is adopted because it can fully characterize the periodicity of dot distribution. Experimental results demonstrate that the dot distribution generated by the proposed method approximates to that of the DBS, which enables the proposed scheme as a very competitive candidate in the copying and printing industry.

Elliptic curve cryptography (ECC) is widely used for secure communications, because it can provide the same level of security as RSA with a much smaller key size. In constrained environments, it is important to consider efficiency, in terms of execution time and hardware costs. Modular inversion is a key time-consuming calculation used in ECC. Its hardware implementation requires extensive hardware resources, such as lookup tables and registers. We investigate the state-of-the-art modular inversion algorithms, and evaluate the performance and cost of the algorithms and their hardware implementations. We then propose a high-radix modular inversion algorithm aimed at reducing the execution time and hardware costs. We present a detailed radix-8 hardware implementation based on 256-bit primes in Verilog HDL and compare its cost performance to other implementations. Our implementation on the Altera Cyclone V FPGA chip used 1227 ALMs (adaptive logic modules) and 1037 registers. The modular inversion calculation took 3.67 ms. The AT (area–time) factor was 8.30, outperforming the other implementations. We also present an implementation of ECC using the proposed radix-8 modular inversion algorithm. The implementation results also showed that our modular inversion algorithm was more efficient in area–time than the other algorithms.

This paper examines the cryptographic security of fixed versus random elliptic curves over the field GF(p). Its basic assumption is that a large precomputation to aid in breaking the elliptic curve discrete logarithm problem (ECDLP) can be made for a fixed curve. We take this into account when examining curve security as well as considering a variation of Pollard's rho method where computations from solutions of previous ECDLPs can be used to solve subsequent ECDLPs on the same curve. We present a lower bound on the expected time to solve such ECDLPs using this method, as well as an approximation of the expected time remaining to solve an ECDLP when a given size of precomputation is available. We conclude that adding 5 bits to the size of a fixed curve to avoid general software attacks and an extra 6 bits to avoid attacks on special moduli and a parameters provides an equivalent level of security.

A lookup table (LUT) is a computationally inexpensive piecewise function used to approximate computationally expensive mathematical functions. Evaluating a LUT can be as quick as using Horner’s method to evaluate a polynomial after looking up its coefficients. A common choice of LUT is a piecewise constant or piecewise linear function; however, high-degree interpolating polynomials can also be valuable. Here, we describe the functionality of FunC 2.0 , a C++ library designed to streamline the process of building, comparing, and implementing univariate LUTs in practical applications. In particular, FunC 2.0 can build relatively small LUTs satisfying user-provided absolute and relative tolerances for error. Furthermore, FunC 2.0 can build nonuniform LUTs, it provides utilities to quickly determine reasonable LUT bounds and tolerances for error, and it provides a way to quickly profile a set of LUTs. We demonstrate FunC ’s utility in application by reducing the total runtime of a simulation performed by the Canadian Hydrological Model (CHM). This simulation modelled the snow mass distribution across Western Canada over one month. Now, CHM can evaluate the mathematical function of interest about \(28\) times faster, allowing the necessary algorithm to finish \(2\) times faster, and the overall simulation is about \(9\%\) faster.

The elliptic curve cryptography is almost used in the literature to develop the public key cryptosystems. A new general-purpose symmetric key cryptosystem using elliptic prime curves is proposed in this paper. For a given prime number P, there are many elliptic prime curves on which each point in the quadrant (0,0) to (P-1,P-1) lays. The set of minimum number of eligible elliptic prime curves for a given prime number P constitutes a lookup table that is the secret key of the proposed cryptosystem. The sender can pick up one eligible elliptic curve for each 2n-bit plaintext block. The sender sends two integers cipher for each 2n-bit plaintext block with encryption rate = 0.8. Moreover, a small prime number can be used efficiently with high security and good robustness against brute force attack.

In this paper, we present an efficient look-up table (LUT)-based approach to design multipliers for GF(2 m ) generated by irreducible trinomials. A straightforward LUT-based multiplication requires a table of size (m×2 m ) bits for the Galois field of degree m. The LUT size, therefore, becomes quite large for the fields of large degrees recommended by the National Institute of Standards and Technology (NIST). Keeping that in view, we have proposed a digit-serial LUT-based design, where operand bits are grouped into digits of fixed width, and multiplication is performed in serial/parallel manner. We restrict the digit size to 4 to store only 16 words in the LUT to have lower area-delay complexity. We have also proposed a digit-parallel LUT-based design for high-speed applications, using the same LUT as the digit-serial design, at the cost of some additional multiplexors and combinational logic for parallel modular reductions and additions. We have presented a simple circuit for the initialization of LUT content, which can be used to update the LUT in three cycles whenever required. The proposed digit-serial design involves less area-complexity and less time-complexity than those of the existing LUT-based designs. The proposed digit-parallel design offers nearly 28 % improvement in area-delay product over the best of the existing LUT-based designs. NIST has recommended five binary finite fields for elliptic curve cryptography, out of which two are generated by the trinomials Q(x)=x 233+x 74+1 and Q(x)=x 409+x 87+1. In this paper, we have designed a reconfigurable multiplier that can be used for both these fields. The proposed reconfigurable multiplier is shown to have a negligible reconfiguration overhead and would be useful for cryptographic applications.

High-performance Elliptic Curve Cryptography (ECC) implementation in encryption authentication severs has become a challenge due to the explosive growth of e-commerce&#x2019;s demand for speed and security. Point multiplication (PM) is the most common and complex operation in ECC which directly determines the performance of the whole system. This article proposes a 6CC-6CC (clock cycle) dual-field PM architecture and a 6CC-4CC dual-field PM architecture based on maximizing utilization of Karatsuba multipliers and re-ordering schedule strategy in PM. The Montgomery Ladder algorithm used in PM is modified to a 4CC algorithm for better resource utilization and parallel computation. To solve the frequency drop problem while working on large finite field, the PM architectures for high and low field are carefully studied to have universal critical path length and balanced performance. Both of the architectures are implemented over GF(2⁵⁷¹) and GF(2²⁸³) on Xilinx Virtex-5 and Virtex-7 FPGAs (Field-Programmable Gate Array) for comparison. The 6CC-6CC architecture is shown to have the best performance on GF(2⁵⁷¹), which achieves one PM operation in <inline-formula> <tex-math notation="LaTeX">$17.44~\mu s$ </tex-math></inline-formula> using 81549 LUTs (Look-Up-Table) with the frequency of 197.2 MHz on Virtex-5, and <inline-formula> <tex-math notation="LaTeX">$12.55~\mu s$ </tex-math></inline-formula> using 80970 LUTs with the frequency of 274.1 MHz on Virtex-7. The 6CC-4CC architecture performs better on GF(2²⁸³) with the shortest computation time. It takes only <inline-formula> <tex-math notation="LaTeX">$3.21~\mu s$ </tex-math></inline-formula> to finish one PM operation on Virtex-5 and <inline-formula> <tex-math notation="LaTeX">$2.22~\mu s$ </tex-math></inline-formula> on Virtex-7, which are faster than all the previous designs. The implementation results prove that the proposed architectures have state-of-the-art performance as well as higher versatility for ECC designs.

In railroad turnouts, geometries of tongue and crossing rails are very complex and their shapes are changing along the track. Therefore, wheels are subjected to not only tread and flange contacts, but also the back-of-flange and top-of-flange contacts in the case of spring switches of tram vehicles. For this reason, one needs to deal with significant jumps in contact points for solving wheel/rail contact problems in turnout, and an accurate prediction of jumps in contact points is one of the most important issues that need to be carefully handled in the dynamic simulation of vehicle/turnout interactions. In this investigation, a numerical procedure that can be used for solving such a complex wheel/rail contact problem in turnout is proposed. In particular, a combined nodal and non-conformal contact approach is developed such that significant jumps in contact points are detected using the nodal search, while the exact location of contact point is then determined with continuous surface parameterizations using non-conformal contact equations. With this combined nodal and non-conformal contact approach for the contact geometry analysis of vehicle/turnout interactions, multiple look-up contact tables can be generated in an efficient way without losing accuracy. Since detailed contact search is performed off-line to obtain look-up contact tables, significant changes in contact points in turnout can be efficiently predicted on-line with tabular data to be interpolated in a standard way. Several numerical examples are presented in order to demonstrate the use of the numerical procedure developed in this investigation.

This work presents an evaluation of different software implementations of algorithms to compute the most demanding operation in cryptographic schemes based on Elliptic Curve Cryptography (ECC), the scalar multiplication. Five different methods were studied, including traditional and more sophisticated methods for elliptic curve cryptography defined over prime and binary fields. For evaluation, the key generation algorithm in ECC consisting on a single scalar multiplication was implemented on a P500h LG smarthphone, which includes an ARM processor running at 600MHz. Both execution time and memory usage was evaluated. It was found that in general, scalar multiplication runs 8 times faster for ECC defined over prime fields, being the NAF the best performer method. For ECC over binary fields, the best performer method was wNAF. The results presented in this work could help a designer to select the most appropriate method when implementing ECC-based cryptographic schemes such as encryption or digital signatures on mobile devices like smartphones, meeting implementation requirements in terms of execution time and memory usage.

Using the concept of reciprocal polynomial, this paper shows that a field multiplication over GF(2 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">m</sup> ) can be implemented by the extended Stein algorithm, one of the algorithms used to realize division. With a fundamental change at the algorithmic level, the field multiplication can be efficiently embedded into a divider so that the multiplier can be eliminated with very little hardware overhead for operand selection. When applied to Elliptic Curve Cryptography (ECC) using affine coordinates, about 13.8% reduction on the area requirement can be achieved with almost no performance degradation compared with the one implemented with two distinct components. Experimental results show that the combined multiplication and division circuit achieves area advantages in comparison with other low-cost designs. The area-efficient design of ECC system also exhibits obvious improvement in area-time (AT) complexity.

Cloud computing represents a significant challenge for securing data due to its inherently distributed model. Elliptic Curve Cryptography (ECC) will provide substantial security with smaller key sizes, creating a strong candidate for cloud-based environments. This review critically examines ECC based security architectures in cloud computing with the aim of reducing the cipher space for efficiency and scalability. A comprehensive examination of recent ECC implementations guided this review, including identity-based and lightweight ECC Architectures. Specific consideration was given to cipher space reduction techniques incorporating point compression and optimized scalar multiplication. The review provided evidence of a gap in the literature regarding the ability to counterbalance strength of security with the compactness of the cipher across a range of cloud scenarios and use cases. Most models considered provide little flexibility for real-time or post-quantum alternatives. None of the literature considered cipher space optimization for ECC to date. The ongoing optimization of cipher space is essential to progressing security based on ECC implementations for cloud scenarios. Future research efforts must centre on adaptive, efficient, quantum resilient ECC schemes, in ways that yield high security with minimum impacts on the operational scale, and the associated computational loads.

ABSTRACTThis paper presents two efficient cellular automata based Montgomery AB2 multipliers for exponentiation in finite fields GF(2m) using a polynomial representation. The proposed type I multiplier produces the results in m + 1 cycles with a critical path delay of two 2-input AND gates, two 2-input XOR gates, and one flip-flop using O(m2) area–time complexity. The proposed type II multiplier produces the results in m + 1 cycles with a critical path delay of one 2-input AND gate, two 2-input XOR gates, and one flip-flop using O(m2) area–time complexity. The proposed architectures are highly modular, and consist of regular blocks of AND and XOR logic gates. Exponentiation is more efficiently implemented by applying AB2 multiplication repeatedly rather than AB multiplication. Compared with related works, the proposed multipliers have lower area–time complexity, and computational and include the features of regularity, modularity, and cascadability.

Many cryptographic systems use multiplication in the finite field GF(2/sup n/) for their underlying computations. In the recent past, a number of look-up table-based algorithms have been proposed for the software implementation of GF(2/sup n/) multiplication. Look-up table-based algorithms can provide speed advantages, but they either require a large memory space or do not fully utilize the resources of the processor on which the software is executed. In this work, an algorithm for GF(2/sup n/) multiplication is proposed which can alleviate this problem. In each iteration of the proposed algorithm, a group of bits of one of the input operands are examined and two look-up tables are accessed. The groupsize determines the table sizes, but does not affect the utilization of the processor resources. It can be used for both software and hardware realizations and is particularly suitable for implementations in memory constrained environment, such as smart cards and embedded cryptosystems.

Elliptic curve cryptography (ECC) is one of the most popular asymmetric key cryptography techniques used in secured data communications. The scalar multiplication is the most expensive operation in the ECC. In this paper, we propose a low cost hardware for scalar multiplication in Affine coordinates based ECC. Here, we use a reconfigurable Galois field (GF) arithmetic circuit, which performs various GF arithmetic operations such as addition, multiplication, inverse, and fused multiply add (FMA) using a same set of hardware circuit. Instead of using a number of multipliers and adders in point addition/doubling, we have used only one reconfigurable GF arithmetic circuit. The existing and proposed designs are implemented in 45 nm CMOS technology using Cadence. The synthesis results show that the affine co-ordinate based proposed \(GF(2^{163})\) scalar multiplier achieves \(69\%\) of reduction in the switching power dissipation as compared with the Lopez-Dahab projective co-ordinates based conventional design in 45 nm CMOS technology. KeywordsAffine coordinatesElliptic-curve cryptographyLopez-Dahab coordinatesPoint additionPoint doublingScalar multiplication

The additional information (side effects) in Elliptic Curve Cryptography (ECC) hardware can be used to attack cryptographic systems. Additional information related to time, power consumption and electromagnetic radiation. Side channel attacks have been done with SPA (Simple Power Analysis), DPA (Differential Power Analysis), SEMA (Simple Electromagnetic Analysis) and DEMA (Differential Electromagnetic Analysis). Some scalar multiplication algorithm can be used to countermeasure SPA attack on elliptic curve cryptography. In this study, conducted experiments side-channel attacks ECC hardware implementations use binary algorithms by observing power consumption of ECC processor on FPGA. Experimental of side-channel attack is conducted to guess the secret key for data encryption and decryption by looking at the physical differences on hardware side effects. In this study, side-channel attack experimental is successful 100% get the key by analyzing of power consumption ECC processor.