A New Symbolic Channel Router: YACR2

A robust channel router with simple heuristics is discussed. This router is able to handle two-layer channels, three-layer channels with two horizontal layers and one vertical layer (HVH), and three-layer channels with two vertical layers and one horizontal layer (VHV). This router uses horizontal layers only for horizontal wires and the vertical layer only for vertical wires. It is robust in the sense that small changes in the input or in the algorithm do not have a major effect on the results, which is a key feature of its ability to support the wide variety of routing models. The Deutsch difficult example, which has a channel density of 19, was routed in 19 tracks on two layers and in 10 tracks on three layers, with no stacked vias. >

A linear time algorithm for routing over the cells is presented. The algorithm tries to reduce maximum channel density by routing some connections over the cells. The algorithm first defines a new scheme for channel representation and formulates the problem based on an intersection graph derived from the new scheme. Then, a feasible independent set of the intersection graph is found for routing some subnets over the cells. The algorithm is implemented and evaluated with several well known benchmarks. In comparison with previous research, our results are satisfactory, and the algorithm takes substantially less CPU time than those of previous works. For Deutsch's difficult example, the previous algorithms take about 29.25 seconds on an average but our new algorithm needs only 5.6 seconds.

The authors present several powerful techniques which allow them to generate efficiently channel routing solutions which are beneficial to further compaction. These techniques can be applied to straight-track compaction as well as to contour-routing compaction and produce very encouraging results. In particular, for D.N. Deutsch's (1985) Difficult Example, they obtained straight-track routing solution with an area 7% less than the best known result after straight-track compaction. The router generated a routing solution using less area than reported results of all well known routers after contour-routing compaction. >

The authors present several powerful techniques which allow them to generate efficiently channel routing solutions which are beneficial to further compaction. These techniques can be applied to straight-track compaction as well as to contour-routing compaction and produce very encouraging results. In particular, for D.N. Deutsch's (1985) Difficult Example, they obtained straight-track routing solution with an area 7% less than the best known result after straight-track compaction. The router generated a routing solution using less area than reported results of all well known routers after contour-routing compaction. >

An efficient merger of the channel routing theory and the genetic stochastic search introduces a new paradigm for VLSI channel routing. The feasibility of the paradigm is demonstrated by the first genetic router for Manhattan model channels which contain cyclic vertical constraints. The router has been implemented as a self contained genetic algorithm system. It creates an initial population without violations of constraints using the results of a new theory of locally optimal breaking of cyclic vertical constraints. The population size is problem instance dependent to provide for the preservation of the structural diversity which is built into the initial population. A new encoding scheme and novel crossover and mutation operators are introduced. Convergence rates to optimal solutions are excellent.

Channel routing problem of area minimization is a well-defined problem in VLSI physical design automation. In this paper we have developed algorithms for computing reduced wire length channel routing solutions using a purely graph theoretic framework, TAH (track assignment heuristic) that was designed for computing minimum area routing solutions. Here we consider the total wire length of a routing solution as one of the most important factors of high performance computing. Reduction in wire length is important from signal delay as well as from the viewpoint of cost of wire segments required in interconnecting all the nets. The framework is designed for computing routing solutions in two-layer channels, and extended to route three-layer routing also in a modular fashion. All the algorithms developed under the framework of TAH are executed for computing no-dogleg and dogleg routing solutions for most of the well-known benchmark channels, with reduced total area and/or total wire length in two- and three-layer channel routing. Performance of our algorithms is highly encouraging.

Channel routing and crosstalk minimization are important issues while we talk about high-performance circuits for VLSI physical design automation. Interconnection among the net terminals satisfying constraints in an intelligent way is a necessity to realize a circuit in a minimum possible area, as this is a primary requirement to reduce cost as well as to increase yield. In this paper, along with area minimization, the performance of the computed circuits has also been enhanced by computing routing solutions with a specified amount of bottleneck crosstalk in two-layer channel routing. Usually, crosstalk is measured by the amount of overlapping of a pair of nets assigned to adjacent tracks. The crosstalk minimization problem in the reserved two-layer Manhattan channel routing model is NP-hard. Thus, in this paper, heuristic algorithms have been devised to optimize bottleneck crosstalk in order to augment circuit performance in two-layer channel routing. Experimental results obtained are highly encouraging.

A new channel routing model, which allows horizontal and vertical wire segments to be placed on both layers and two wires on different layers to be overlapped, is presented. Based on this model, the basic constraints as well as the rules of layer assignment and routing order in two-layer channel routing are obtained. Then the property of optimal overlapping in a zone is analyzed. For the example used, this algorithm obtains 18 tracks solution.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

A gate array router that utilizes horizontal and vertical over-cell routing channels to increase cell density is described. Logic macros, with fixed intraconnect metal that may span several cell columns, are mapped onto the array producing partially filled routing channels. Macro interconnects are loosely assigned to the partially filled horizontal and vertical routing channels during global routing. Each loose horizontal channel segment is assigned to a channel track using a maze router. Vertical channel segments are completed by a modified dogleg channel router.

A unified approach is developed for solving the general problem of minimizing the number of via holes in a two-layer very large-scale integration (VLSI) channel and switch-box routing environment with movable terminals. All horizontal segments of the nets are assumed to be in one layer, and the vertical segments in the other layer. Each net can have multiple terminals. Three different models are considered: (i) two-row channel routing, (ii) three-sided switch-box routing, and (iii) four-sided switch-box routing. The concept of a maximum parallel set of edges in a bipartite graph is introduced to solve the minimization problem. This leads to a unified graph-theoretic approach for solving the via minimization problem for all three models considered. The complexity of the proposed algorithm is O(N log N), in all three cases, where N is the number of pairs of terminals to be connected. >

We present an algorithm to find a set of all optimal solutions for a channel placement problem. A channel consists of two rows of horizontal line segments (representing components). Each line segment contains some terminals with fixed positions. Sets of terminals, called nets, are to be connected. The relative ordering of line segments in each row is fixed. The line segments can be shifted left or right, which will affect the width needed for routing and the length of the channel. We want to find the tradeoff between channel length and routing width. Since the channel routing problem is NP-complete, we use a lower bound on routing width, called density. The density of a placement is the maximum number of nets crossing each vertical cut. We can increase the total length to minimize the channel density, or minimize the total length by increasing the channel density. The pair (density, total length) is called the shape of a placement. A shape is minimal if a decrease in density would cause an increase in total length, and vice versa. Our algorithm computes all the minimal shapes in O (N 4 ) time, where N is the number of nets. This is the first known algorithm for this problem whose running time is polynomial in the number of nets and independent of the length of the channel.

Environmental assessments of golf courses and other turf systems must often rely on mathematical modeling. However, in the case of pesticide runoff, successful modeling applications are rare. Available models were developed for agricultural applications and have seen very limited testing for turf. TurfPQ is a pesticide runoff model developed exclusively for turf. The model is based on a curve number calculation for runoff volume and linear partitioning of pesticide into adsorbed and dissolved components during a precipitation or irrigation event. Calibration is optional, so the model can be applied, using default parameter values, to situations where runoff and chemical loss data are unavailable. TurfPQ was tested with default parameter values for 52 pesticide runoff events involving six pesticides measured in plot studies in four states. The model typically produced conservative overpredictions of pesticide runoff, particularly with strongly adsorbed pesticides. Mean predicted pesticide runoff was 2.9% [corrected] of application, compared with an observed mean of 2.1%. TurfPQ captured the dynamics of the pesticide runoff events well with R2 = 0.65 [corrected]. Sensitivity analyses indicated that prediction errors could be reduced by better estimates of adsorption parameters and runoff curve numbers. However, even with default parameters, TurfPQ predictions are at least as accurate as those produced by more complex models.

The IPCC Tool for predicting soil organic carbon changes evaluated for the Pampas, Argentina

Bayesian parameter and joint probability distribution estimation for a hysteretic constitutive model of reinforcing steel

Wireless Sensor Networks (WSNs) represent a very promising solution in the field of wireless technologies for industrial applications. However, for a credible deployment of WSNs in an industrial environment, four main properties need to be fulfilled, i.e., energy efficiency, scalability, reliability, and timeliness. In this paper, we focus on IEEE 802.15.4 WSNs and show that they can suffer from a serious unreliability problem. This problem arises whenever the power management mechanism is enabled for energy efficiency, and results in a very low packet delivery ratio, also when the number of sensor nodes in the network is very low (e.g., 5). We carried out an extensive analysis-based on both simulation and experiments on a real WSN-to investigate the fundamental reasons of this problem, and we found that it is caused by the contention-based Medium Access Control (MAC) protocol used for channel access and its default parameter values. We also found that, with a more appropriate MAC parameters setting, it is possible to mitigate the problem and achieve a delivery ratio up to 100%, at least in the scenarios considered in this paper. However, this improvement in communication reliability is achieved at the cost of an increased latency, which may not be acceptable for industrial applications with stringent timing requirements. In addition, in some cases this is possible only by choosing MAC parameter values formally not allowed by the standard.