A novel capacitor voltage balancing method in modular multilevel converters

THIS dissertation addresses the technical challenges associated with the operation and control of high-power modular multilevel converters. To improve the performance of modular multilevel converter (MMC), a generalized three-phase mathematical model with common-mode voltage (CMV) is proposed. By using the proposed mathematical model, the magnitude of circulating currents, capacitors voltage ripple, and the ripple in DC-link current during balanced and unbalanced operating conditions can be minimized. The modulation scheme and switching frequency are directly affected the output power quality and the performance of the converter and control method. In this dissertation, a novel sampled average and space vector modulation scheme is proposed. These modulation schemes are suitable to control the MMC with any number of submodules (without modifications), operates at low switching frequency, minimizes the ripple in output current and voltage harmonic distortion, and reduces the output filter size. For reliable operation of MMC, the voltage balancing among submodules is mandatory. This dissertation proposes a generalized single-stage balancing approach with reduced current sensors to control the MMC. The proposed balancing approach is suitable to implement with both phase-shifted and level-shifted pulse width modulation schemes. With the proposed approach, it is also possible to control the MMC with half-bridge and three level flying capacitor submodules. Also, an improved balancing approach often referred as the dual-stage balancing approach is proposed to minimize the voltage harmonic distortion and device power losses. This dissertation also proposes a direct model predictive control (D-MPC) approach to minimize the ripple in submodule capacitors voltage. To implement D-MPC approach, a discrete-time model of MMC with CMV is proposed. With the use of proposed model, the D-MPC approach does not require a cost function to minimize the circulating currents. The computational complexity is one of the major issues in the implementation of D-MPC approach for MMC. In this dissertation, a novel reduced computational MPC approaches named as dual-stage D-MPC and indirect model predictive control (I-MPC) approach are proposed. These approaches significantly minimize the computational complexity and, improve the voltage and current waveform quality while operating at the low switching frequency. Finally, the simulation and experimental studies are presented to validate the dynamic and steady-state performance of proposed methodologies. Index Terms • Modular Multilevel Converters. • Capacitors Voltage Balancing. • Pulse Width Modulation Schemes. • Circulating Currents. • Capacitors Voltage Ripple • Direct Model Predictive Control. • Dual-Stage Direct Model Predictive Control. • Indirect Model Predictive Control. • Total Harmonic Distortion.

The modular multilevel converter (MMC) is one of the most promising topologies for high- and medium-voltage applications. However, the conventional MMC relies on large arm inductance and complicated feedback control to maintain submodule (SM) capacitor voltages balanced, which requires a large number of voltage sensors and complicated arm current control loops. In contrast to the conventional perspective, the MMC can be regarded as a derivative from the general multilevel topology based on switched-capacitor (SC) structure. The SC structure endows excellent properties to the MMC, such as minimum or no arm inductor and automatic SM capacitor voltage balancing capability. This MMC with minimum or no arm inductor is named as SC-MMC. Since the arm inductances are very small, the SM capacitor voltages can be balanced automatically. Small stray/parasitic inductance is enough to limit inrush current during SM's switching instants to the rated current level. To unleash the automatic SM capacitor voltage balancing capability of the SC-MMC, a Y-matrix modulation (YMM) has been proposed, which does not require closed loop control or any sensor, has no limitations on the number of SMs, and works for both half-bridge and full-bridge SMs. An unresolved issue of the emerging YMM is that, in the published literature, the existence of the Y matrix with full rank has not been proved theoretically beyond the observation for the SC-MMC when the number of SMs is large. In this paper, an analytical proof of the existence of the full rank Y matrix is provided, which implies the automatic voltage balance of SMs for the MMC with arbitrary number of SMs in each arm. Simulation results using the YMM on a 21-level SC-MMC with minimum arm inductance are provided to verify the voltage balance theory/observation of the SC-MMC using the YMM.

The Doubly Fed Induction Motor (DFIM) is essential in Wind Energy Conversion Systems (WECS) for efficient wind energy harvesting. Conventional power converters in WECS often result in high Total Harmonic Distortion (THD) in output voltage and current, affecting wind energy economy. This research proposes replacing conventional converters with Modular Multi-level Converters (MMC) due to their scalable topology, low harmonic distortion, high efficiency, and the elimination of DC link capacitors. The MMC is connected in a back-to-back configuration between the rotor of the DFIM and the grid to enable four-quadrant operation. Circulating current in the MMC is minimized using a Modified Deer Hunting Optimization (MDHO) based Fractional Order PID (FOPID) controller and a Mexican Axolotl Optimization (MAO) based FOPID. Capacitor voltage balancing is achieved using Level-Shifting PWM (LSPWM) and Three-Dimensional Space Vector PWM (3D-SVPWM) techniques with voltage sorting algorithms. The impact of these control and modulation techniques on the DFIM is analyzed in terms of reduced THD, and steady state and transient performance. Simulations are conducted in MATLAB/R2022a, and experimental validation is performed using a 7-level 0.5 kW MMC in a Hardware-In-Loop (HIL) setup.

The modularity, fault-tolerability, and voltage scalability features allow the modular multilevel converter (MMC) to be a promising topology for modern electric ship applications. Arm voltage and submodule (SM) capacitor voltage balancing controllers with conventional high-frequency modulation schemes are indispensable for reliable and stable operation of an MMC. This requires an additional external arm controller and the control complexity increases for an MMC with a large number of SMs. Alternatively, the space-vector pulse width modulation (SVPWM) schemes provide more freedom in selecting the voltage vectors to achieve multiple objectives, thus eliminating the arm voltage balancing controller. In this paper, a simplified SVPWM implementation for an $n$ -level MMC is proposed. This scheme utilizes all the available switching states and calculates switching timings by mapping to a two-level space-vector structure. The computational burden of the proposed scheme is independent of converter voltage level, therefore it is computationally efficient and well suited to the MMC with any number of SMs. Experimental results are presented to show the performance of an MMC system using the proposed scheme under steady-state, rapid acceleration and speed-reversal conditions.

Submodule capacitor voltages of Modular Multilevel Converter (MMC) can realize self-balancing, which is based on the full-rank switching matrix principle. The self-balancing does not need voltage sensors. However, the effectiveness of votlage balancing is highly dependent on the reliability of the trigger pulses. Trigger pulse errors can lead to unbalanced submodule capacitor voltages. However, due to the absence of sensors, the capacitor voltage is in an unknown state. In order to monitor the capacitor voltage in real time, this paper adopts a capacitor voltage strategy based on Sliding Mode Observer (SMO) method combined with BP neural network. The main purpose of the sliding mode observer is to observe capacitor voltage, while the BP neural network optimizes the parameters in the sliding mode observer to make the observation accuracy more accurate. This scheme estimates the capacitor voltages by acquiring the arm currents and switching signals and utilizing the sliding mode observer. The BP neural network adaptively adjusts the sliding mode gain to achieve precise observation of the capacitor voltages. Finally, an MMC system is built on the MATLAB/Simulink platform to verify the feasibility of the proposed BP neural network-based SMO strategy for MMC capacitor voltage observation.

The control complexity of modular multilevel converter (MMC) increases with the number of submodules per arm. In particular, the implementation of a pulsewidth modulation (PWM) scheme and a voltage balancing approach for MMC is a major challenge. This paper proposes a generalized low-cost less computational decoupled sampled average PWM scheme for MMC. In this approach, the reference output voltage is generated by averaging the two nearest voltage levels from the top and bottom arms in each sampling interval. In addition, a simplified voltage balancing approach is proposed for MMC. The proposed approach does not require a sorting technique to select the submodules. Instead, the relative comparison logic is presented. The effectiveness of the proposed modulation scheme and voltage balancing approach is evaluated on a single-phase MMC system with three-level flying capacitor submodules. The proposed approach is extended to a three-phase system, which results in dynamic balancing of the zero-sequence voltage. Hence, the zero-sequence current is minimized. The performance of the proposed three-phase approach is compared with that of the conventional phase-shifted carrier PWM scheme. The simulation and experimental studies show successful voltage balancing among submodule capacitor voltage, low harmonic distortion, and less ripple in output current.

Unlike the modular multilevel converter (MMC) topology operated under the rectifier or inverter modes, control of the balanced state for the submodule (SM) capacitor voltage has emerged as the key issue for DC-DC MMCs. This is mainly caused by no balanced alternative powers being used for balancing SM capacitor voltages, which can be absorbed from the input or output DC sides of the converter. Typically, the alternative voltages and currents should be injected to achieve SM capacitor voltage balance in the DC-DC MMC. However, this solution is based on the cost of adopting the bulky LC filter components. For interconnecting different DC voltages in medium-voltage applications, this paper presents a non-isolated DC-DC MMC equipped with the proposed middle cells. It is intended to achieve DC voltage conversion without adopting bulky passive LC filters. On the one hand, the alternative currents, used for balancing the SM capacitor voltages, are arranged for flowing only within the phase legs of the proposed DC-DC MMC without disturbing the input current. On the other hand, through appropriate control of the middle cells, compensated components can be developed to eliminate the undesirable voltages on the output DC side. The middle cells of the proposed DC-DC MMC are supplied with the function of the active filter, which enables the DC-DC MMC system to escape the bulky LC components. Through theoretical analysis and a control strategy, the proposed DC-DC MMC has been analyzed comprehensively. Finally, the simulation and experimental results are verified to evaluate the effectiveness of the proposed DC-DC MMC.

The modular multilevel converter (MMC) is regarded as a competitive choice for future dc grids at high and medium voltage levels. To study the dc grid stability, a few MMC dc impedance models have been proposed, but their accuracy is limited by the assumption of ideal submodule voltage or neglecting the circulating current control. In this paper, a more accurate MMC dc impedance model is developed considering both the submodule capacitor voltage and circulating current dynamics. Simulation and experiment results indicate that the developed model matches with the actual MMC better than state-of-art models and can predict the dc system stability correctly.

In this paper, we consider an optimization problem solving for model predictive control (MPC) of a modular multilevel converter (MMC). An MMC consists of a large number of submodules. The objective of the MPC is to determine the best switching sequences for the submodules in the MMC to track the phase current references for T time horizons. The MPC is formulated as a nonlinear mixed-integer programming (MIP) problem with the on/off status of submodules as binary decision variables and MMC dynamic states such as phase currents, circulating currents and submodule capacitor voltages as continuous decision variables. With a large number of submodules and a large number of time horizons, the dimension of the nonlinear MIP problem becomes difficult to handle. Our contribution is to formulate this problem and solve this problem using Bender's decomposition. An example 5-level single-phase MMC is demonstrated for the proposed algorithm.

The required module capacitances of modular multilevel converters can be significantly reduced in comparison to conventional operation modes when quasi-two-level operation is applied. Unfortunately, the output voltage distortion becomes similar to those of conventional two-level-converters. Adding a new current path to the topology enables quasi-three-level operation of the modular multilevel converter, which can reduce the harmonic content of the output voltage while still maintaining the advantage of small module capacitances. In this paper, a novel converter topology based on a combination of modular multilevel converter and bidirectional semiconductor clamping switch is presented, which is capable of quasi-three-level operation. This novel topology has all advantages of a quasi-three-level modular multilevel converter topology from literature, while overcoming the requirement for additional full-bridge modules connected between the phase output and the dc center tap. This is expected to reduce costs and losses.

The nearest level modulation (NLM) based submodule capacitor voltage measuring technology for a modular multilevel converter (MMC) with reduced sensors can effectively reduce the costs of the data acquisition system of MMC and simplify the operation system. One of the technical challenges of this submodule capacitor voltage measuring technology is to reduce the measurement errors of submodule capacitor voltage. This paper proposes an improved submodule capacitor voltage measuring algorithm to overcome this challenge. In the proposed algorithm, by keeping the operation states of submodules unchanged during the continuous control period, the probability of obtaining the actual capacitor voltage is increased, and then the number of corrections of observed capacitor voltage is significantly increased. Thus, the proposed algorithm can effectively reduce the measuring errors. More significantly, the proposed algorithm can also improve the measurement accuracy even in the capacitance deviation situation. Finally, both simulation and experimental results are provided to verify the feasibility and effectiveness of the proposed voltage measuring algorithm.

This paper presents a method for estimating the voltages at the individual sub-module capacitors of Modular Multilevel Converters (MMCs). The estimation method is designed according to a predictor-corrector scheme with a model-based prediction stage utilizing the arm current measurements and the internal modulation signals of the control system. The corrector stage is based on measurement of the total output voltage from each arm of the MMC. Thus, only two voltage measurements for each phase of the MMC must be continuously processed by the control system instead of individual voltage measurements for each sub-module. This can significantly reduce the communication requirements for the MMC control system and by that simplify the implementation. The principles of the proposed estimation method are described in detail in the paper, and the operation is demonstrated by simulation results. Estimation accuracy and settling time of the proposed method have been investigated with respect to the number of sub-modules in each arm of the MMC. Quantization effects due to limited resolution of the arm voltage sensors and the influence of parameter deviations have also been considered. The presented results illustrate the response of the proposed algorithm and indicate its potential for limiting the communication requirements and increasing system reliability by reducing the control system dependency on individual sub-module capacitor voltage measurements.

This thesis is focused on the modular multilevel converter (MMC) for High-Voltage DC (HVDC) systems. It is an attempt to address the issues associated with the modelling, simulation, control, efficiency, and fault-handling capability of the MMC. Thus, to address the modelling of the MMC, a new and more accurate steady-state harmonic model is proposed. The proposed harmonic model is capable of predicting the amplitude of the harmonic components of the MMC arm voltages, submodule capacitor voltages, and arm currents. Further, based on the proposed harmonic model, a capacitor sizing method is proposed to determine the capacitance of the submodule capacitor for a desired level of voltage variation, without a need for numerical algorithms or graphs used by the existing methods. In addition, the proposed capacitor sizing method can accurately determine the required capacitance even if circulating currents are injected to mitigate dc voltage fluctuations. The thesis also proposes a simple equivalent-circuit-based simulation model for MMC-based HVDC systems, which assumes ideal submodule switches to speed up the simulation, but is nonetheless capable of capturing the transients as well as harmonic components of the voltages and currents. Further, the thesis proposes a simple compensation strategy that calculates the magnitude of the second harmonic component of an arm voltage, and uses the calculated value as a feedforward signal to cancel the circulating current of the corresponding MMC leg. The proposed feedforward compensation strategy, if combined with a closed-loop circulating current suppression strategy, greatly mitigates the possibility of control saturation and, also, results in better damped closed-loop dynamics. Finally, the thesis proposes two new MMC topologies for enhanced efficiency and dc-side fault handling capability. In the first proposed topology, that is the lattice modular multilevel converter (LMMC), the entire MMC arm is modified to accommodate networks that allow shortcuts between the arm capacitors, thus, reducing conduction power losses of the converter. In the second topology proposed, however, only the submodule is modified. In the proposed submodule topology, referred to as lattice submodule (LSM), the conduction power losses are decreased, as it is the case for the LMMC, with the difference that the voltage stress in the switches are also reduced. Keywords: Control, lattice modular multilevel converter, lattice submodule, modelling, modular multilevel converter, simulation model.

this paper proposes a circulating current elimination controller based on the detailed analysis of sub module capacitor voltage ripple in modular multilevel converter (MMC). When a circulating current suppression controller is embedded in MMC overall controller, the switching function of arms consists of a second harmonic component. The magnitude and phase angle of the second harmonic switching function (SHSF) is dependent on various factors, like, output current, power factor, modulation index, submodule capacitor, average submodule capacitor voltage and submodule capacitance. This paper gives the mathematical analysis of determining the magnitude and phase angle of SHSF. Firstly, the voltage components of submodule capacitor at different frequencies are calculated using average model of MMC. Based on the derived voltages, the magnitude and phase angle of the SHSF is determined. The analytic expressions and proposed control scheme are validated with simulation study.

To further improve the power supply sustainability of the ac/dc hybrid distribution networks, this article proposes a control strategy for the modular multilevel converter (MMC) under grid-side open-circuit fault, which is based on independent arm current control. Firstly, the behaviors of the MMC after the faults are analyzed, including single-phase and two-phase open-circuit faults. For single-phase open-circuit fault, the proposed strategy can be achieved by reconfiguring the amplitude and phase of the arm currents, thereby eliminating the zero-sequence current. For two-phase open-circuit fault, both the arm currents and voltages need to be reconfigured. After that, a method for detecting and locating specific faults is provided, which can be implemented by detecting the amplitude of the zero-sequence current. Besides, the postfault characteristics of the MMC under single-phase open-circuit condition are given, including submodule (SM) capacitor voltage ripple, circulating current, arm rms current and arm peak current. According to it, long-term postfault operation of the MMC can be guaranteed with 50% of the rated power. Additionally, stable dc-bus voltage and balanced SM capacitor voltage are satisfied even though one phase is disconnected. Moreover, with the proposed control strategy, although the MMC is able to operate for a short period of time in emergency situations when two phases are disconnected, it is not supposed to transmit power due to the inevitable large current on neutral conductors. Finally, the feasibility and effectiveness of the proposed control strategy is validated by simulation and experimental results.