A novel framework for retiming using evolutionary computation for high level synthesis of digital filters

A novel method is presented for the exact design and synthesis of lossless discrete-integrator (LDI) digital filters. In this method, the entire digital filter synthesis is performed directly in the discrete-time z-domain without any recourse to the concept of a continuous-time analog prototype reference filter. The proposed design method lends itself in a straightforward fashion to the synthesis of high-quality LDI digital filters having ladder, lattice, or other similar practical configurations. In addition, it is capable of realizing a wide class of practical digital transfer functions, including the classical Butterworth Chebyshev, inverse Chebyshev, and, most importantly, elliptic transfer functions. >

Genetic algorithms are exploited and applied to the development of a novel approach to the high-level synthesis of digit-serial digital filters. The salient feature of this approach is that it permits the digit-size to be taken into account as a variable of optimization, facilitating global data-path optimization with respect to both area and time. Moreover, it conforms closely to an actual hardware implementation, taking into account not only the cost of the required arithmetic functional units but also that of the required registers and multiplexors. The proposed approach is particularly efficient as it preserves the data-dependency relationships in the original digital filter data flow-graph under the operations of crossover and mutation performed by the constituent genetic algorithm. The effectiveness of this approach is demonstrated by comparing its results to those obtained by using the existing techniques for the high-level synthesis of a benchmark wave digital filter implemented as a bit-parallel architecture, and by presenting the results for the corresponding digital filter implemented as a digit-serial architecture.

The article presents a technique for the synthesis of controlled digital recursive Chebyshev lowpassfilters of the first kind with an infinite impulse response. The frequency response of such filters hasripples in the passband and is as flat as possible in the stopband. Controllability is understood as anexplicit dependence of the filter coefficients on the cutoff frequency. The technique is based on the bilineartransformation of the transfer function of the analog low-pass filter prototype and the frequencytransformation of the amplitude-frequency characteristics of the obtained digital filter. The main idea ofthe technique is that for an analog prototype filter with a cutoff frequency of 1 rad/s, the parameters ofthe transfer function of biquadratic or bilinear links, which have the dimension of frequency, will benumerically equal to the correction factors for similar parameters of a controlled filter with an arbitrarycutoff frequency. As an example, the synthesis of a digital Chebyshev filter of the first kind of the fifthorder is considered. In this article, the transfer function of an arbitrary order filter is represented as acascade connection of II order links if the filter is of an even order. In the case of an odd order greaterthan one, one cascaded link of the first order is added. Despite the relative simplicity of the frequencyconversion, in its practical use for digital filters synthesized using computer-aided design of digital filters(or using reference books containing calculated prototype low-pass filters for various approximationsof the frequency response of an ideal low-pass filter), a series arises non-trivial specific momentsthat complicate the engineering use of this method of synthesizing controlled digital filters. Therefore, inaddition to the technique, a step-by-step algorithm has been developed that allows one to synthesize afilter without knowing these moments. The algorithm is implemented in the Mathcad environment; asan example, a digital recursive Chebyshev filter of the 1st kind of the 5th order is calculated.The example shows the calculated coefficients of a digital controlled low-pass filter, which explicitlydepend on the cutoff frequency, the amplitude-frequency characteristics of this filter and its lowfrequencyprototype converted into a filter with the same cutoff frequency, the amplitude-frequencycharacteristics are given in the same coordinates. Due to the good formalization of the algorithm, thelatter is suitable for the implementation of computer-aided design systems for controlled digitalChebyshev low-pass filters of the first kind.

Article Free Access Share on Optimal clock skew scheduling tolerant to process variations Authors: José Luis Neves University of Rochester, Department of Electrical Engineering, Rochester, New York University of Rochester, Department of Electrical Engineering, Rochester, New YorkView Profile , Eby G. Friedman University of Rochester, Department of Electrical Engineering, Rochester, New York University of Rochester, Department of Electrical Engineering, Rochester, New YorkView Profile Authors Info & Claims DAC '96: Proceedings of the 33rd annual Design Automation ConferenceJune 1996Pages 623–628https://doi.org/10.1145/240518.240636Published:01 June 1996Publication History 43citation578DownloadsMetricsTotal Citations43Total Downloads578Last 12 Months19Last 6 weeks2 Get Citation AlertsNew Citation Alert added!This alert has been successfully added and will be sent to:You will be notified whenever a record that you have chosen has been cited.To manage your alert preferences, click on the button below.Manage my AlertsNew Citation Alert!Please log in to your account Save to BinderSave to BinderCreate a New BinderNameCancelCreateExport CitationPublisher SiteeReaderPDF

Background and Objectives: High-level synthesis (HLS) is one of the substantial steps in designing VLSI digital circuits. The primary purpose of HLS is to minimize the digital units used in the system to improve their power, delay, and area.Methods: In the modified MFO algorithm presented in this paper, a hyperbolic spiral is chosen as the update mechanism of moths. Also, by presenting a new approach, a paramount issue involved in applying meta-heuristic methods for solving HLS problems of VLSI circuits has been disentangled.Results: By comparing the performance of the proposed method with Genetic algorithm (GA)-based method and particle swarm optimization (PSO)-based method for the synthesis of the digital filters, it is concluded that the proposed method has the higher ability in the HLS of data path in digital filters. The best improvement is 2.78% for the delay (latency), 6.51% for the occupied area of the chip and 6.93% in power consumption. Another feature of the proposed method is its high-speed in finding optimal solutions, in a manner which, more than 21.6% and 12.9% faster than the GA-based and PSO-based methods, respectively on average.Conclusion: The most important very large scale integration (VLSI) circuits are digital filters and transformers, which are widely used in audio and video processing, medical signal processing, and telecommunication systems. The complex, expansive, and discrete nature of design space in high-level synthesis problems has made them one of the most difficult problems in VLSI circuit design.

This work presents the methodology utilized for the development of the numerical module of SIPREX, an expert system for digital filter design. This system integrates knowledge on the different techniques and application areas of digital signal processing with powerful numerical algorithms, representing a valuable tool for the solution of problems involving analysis and synthesis of digital filters.

When discretizing continuous-time systems or signals, one is often interested in preserving a property termed covariance-invariance. In this paper a technique is outlined for synthesizing discrete-time systems and signals which are covariance-invariant with corresponding continuous-time systems and signals. Applications of the technique to process simulation, minimum mean-squared error estimation, and digital filter synthesis are outlined, with example designs presented for covariance-invariant Butterworth and Chebychev digital filters. Based on the frequency response of these designs it is argued that the method of covariance-invariance is superior to the methods of impulse-invariance and bilinear-z as a response matching design technique for the synthesis of digital filters. This superiority is especially apparent at sampling rates that are marginal with respect to filter critical frequencies.

This study is an integral part of a project focusing on the synthesis of IIR digital filters with finite word length. The implementation of the project involves considering the finite word length already at the stage of computation zeros and poles. The results of this stage are final and are not distorted at the stage of structural synthesis. The computation uses the fact that the zeros and poles of a practically implemented digital filter are elements of the set of algebraic numbers of the corresponding degree. At the stage of structural synthesis, a digital filter block diagram is generated. This block diagram provides specified degrees of algebraic numbers, which are zeros and poles. The exact values of the coefficients of the generated digital filter structure are calculated taking into account previously calculated zeros and poles. Different structures are characterized by structural precision, independent of specific coefficient values. This paper is devoted to the study of the generation of structures that provide a given structural precision of the denominator of the transfer function and a given degree of algebraic numbers that are poles.

Under the assumption that the clock can be inputted to each register at an arbitrary timing, the minimum feasible clock period might be reduced by register relocation while maintaining the circuit behavior and topology. But if the minimum feasible clock period is reduced, then the number of registers tends to be increased. In this paper, we propose a register relocation method that reduces the number of registers while keeping the target clock period. The proposed method reduces the number of registers in the practical time in experiments.

We present the experimental application and comparison of two methods for the synthesis of digital filters, which represent the state-of-the-art of optimum digital processing of shaped signals with arbitrary constraints in time and frequency domain and any kind of stationary noise power spectral density. The methods are implemented in experimental measurement setups and optimum filters are synthesized with regard to assigned constraints (e.g. finite duration, flat top, peaking time, zero area, etc.) and by taking into account the real environmental noise or disturbance present in the system, identified from datasets of straightforward signal experimental acquisitions. Implementation issues are detailed and design rules for digital signal processors based on these techniques are derived.

Digital filter is an important component of analog-to-digital converter. The speed and complexity of digital decimation filter have a great influence on Sigma Delta analog-to-digital converter. In view of this situation, a design of high speed and low complexity digital filter is presented in this paper. A three stages cascaded architecture is adopted to reduce the number of half-band filters by increasing the downsampling rate of cascaded integrator-comb filter. The cascaded integrator-comb filter adopts a serial-parallel mixed structure to improve the speed of data processing. In order to reduce the complexity of digital filter, a novel sine compensation filter is proposed to compensate the passband attenuation and the multipliers of half-band filter are designed by time division multiplexing technique. The simulation results and analysis show that this design meets the performance requirements and its speed is increased by four times. Compared with the same type of filters, the number of multipliers, adders and registers has decreased by 45%, 31% and 26% respectively.

Digital filters are now key components in many modern digital systems. This paper proposed a novel evolutionary method to design structure-diversified digital filters. On the investigation of the existing evolution-based digital filter design methods, most state-of-the-art works concentrate on the evolution of appropriate transfer functions for digital filters. However, a transfer function is not equivalent to a practical digital filter that has proper structure and can be implemented by a hardware directly. Some researchers proposed a synthesis method to generate the structure of digital filter from a specified transfer function. However, this method needs an existing transfer function as the prior knowledge. Compared with existing works on the evolution of digital filters, the proposed method is novel at the following aspect: the proposed method can directly evolve the structure and parameters of digital filter without the pre-definition of the transfer function. The only prior knowledge we need is the specification of the design target, such as the frequency range of the passband and stop-band. In the experimental study, a significant characteristic is revealed that the proposed method is able to evolve structure-diversified filters with approximate frequency response. The proposed method is a prototype, and it is demonstrated to be a promising way of digital filter design.

Many evolutionary computation (EC) methods have been used to solve feature selection problems and they perform well on most small-scale feature selection problems. However, as the dimensionality of feature selection problems increases, the solution space increases exponentially. Meanwhile, there are more irrelevant features than relevant features in datasets, which leads to many local optima in the huge solution space. Therefore, the existing EC methods still suffer from the problem of stagnation in local optima on large-scale feature selection problems. Furthermore, large-scale feature selection problems with different datasets may have different properties. Thus, it may be of low performance to solve different large-scale feature selection problems with an existing EC method that has only one candidate solution generation strategy (CSGS). In addition, it is time-consuming to find a suitable EC method and corresponding suitable parameter values for a given large-scale feature selection problem if we want to solve it effectively and efficiently. In this article, we propose a self-adaptive particle swarm optimization (SaPSO) algorithm for feature selection, particularly for large-scale feature selection. First, an encoding scheme for the feature selection problem is employed in the SaPSO. Second, three important issues related to self-adaptive algorithms are investigated. After that, the SaPSO algorithm with a typical self-adaptive mechanism is proposed. The experimental results on 12 datasets show that the solution size obtained by the SaPSO algorithm is smaller than its EC counterparts on all datasets. The SaPSO algorithm performs better than its non-EC and EC counterparts in terms of classification accuracy not only on most training sets but also on most test sets. Furthermore, as the dimensionality of the feature selection problem increases, the advantages of SaPSO become more prominent. This highlights that the SaPSO algorithm is suitable for solving feature selection problems, particularly large-scale feature selection problems.

Chapter 2 - Design and Implementation of Digital FIR Filters

Digital filters are extensively used in video processing, digital communications, frequency analysis, auto control and so on. Digital filter is one of the most important part of digital signal process, almost appeared in all digital signal process system. Based on theory, the digital filters can be divided into FIR digital filter and IIR digital filter. FIR digital filter is achieved for these requirements and then widely used in modern signal processing. IIR digital filter is a kind of digital filter that its unit pulse response is unlimited long, and is also an important research task in modern electronics, communication and signal processing, many scholars did much research on the optimization design of IIR digital filter. High-density FPGA have real-time performance and flexibility, and it can provide powerful hardware support for the implementation of digital filters. In this dissertation, author will make some analysis on digital filters, and make realization of digital filters based on FPGA.