3- https://doi.org/10.1109/icnets2.2017.8067910
A novel method for design and implementation of low power, high stable SRAM cell
- Mar 1, 2017
- Ashish Kumar Sharma +1 more
Abstract
SRAM is widely used cache memory in the world. Materialization of low power SRAM with highest stability is a need of the hour. As from many years the requirement of fast and low power devices are augmenting. In this paper, in first part described about stability analysis from ADM (extract from N-Curve). After that information about leakage power is given. One 8T SRAM circuit is proposed with low power and highest probable stability. This paper promises reduction in power by 66%. The stability of the cell is also increased, i.e. WNM increased by 15.9%; penalty is in RNM by 7.9 %.
- # Highest Stability
- # Implementation Of Low Power
- # Low Power Devices
- # Low Power
- # Reduction In Power
- # Cache Memory
- # Leakage Power
- # Method For Design
- # Design Of Low Power
- # Stability Analysis
