A parallel task allocation methodology for non-buffered message-passing environments

A distributed Java platform has been designed and built for the simplified implementation of distributed Java applications. Its programmable nature means that code as well as data is distributed over a network. The platform is largely based on the Java Distributed Computation Library of Fritsche, Power, and Waldron. The generality of our system is demonstrated through the emulation of a MIMD (multiple instruction, multiple data) architecture. This is achieved by augmenting the server with a virtual pipeline processor. We explain the design of the system, its deployment over a university network, and its evaluation through a sample application.KeywordsData UnitClient SoftwareMultiple InstructionObject ArrayPipeline ProcessorThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Parallel solution methods for the Navier-Stokes equations

On Factors Limiting the Generation of Efficient Compiler-Parallelized Programs

When using MIMD (multiple instruction, multiple data) parallel computers, one is often confronted with solving a task composed of many independent subtasks where it is necessary to synchronize the processors after all the subtasks have been completed. This paper studies how the subtasks should be allocated to the processors in order to minimize the expected time it takes to finish all the subtasks (sometimes called the makespan). We assume that the running times of the subtasks are independent, identically distributed, increasing failure rate random variables, and that assigning one or more subtasks to a processor entails some overhead, or communication time, that is independent of the number of subtasks allocated. Our analyses, which use ideas from renewal theory, reliability theory, order statistics, and the theory of large deviations, are valid for a wide class of distributions. We show that allocating an equal number of subtasks to each processor all at once has good efficiency. This appears as a consequence of a rather general theorem which shows how some consequences of the central limit theorem hold even when we cannot prove that the central limit theorem applies.

Basic linear parallel solver for large CFD applications using decomposed unstructured meshes

The application of parallel computers to reservoir simulation is studied with the aid of two recently introduced Multiple Instruction, Multiple Data (MIMD) computers. The problems posed by reservoir simulators are shown to be particularly well suited for such parallel computers* Fundamental parallel programming techniques using Fortran are presented for the Hetrogeneous Element Processor (HEP) produced by Denelcor and the iPSC Hypercube produced by Intel. These techniques are then applied to two of the most time consuming tasks in reservoir simulation: forming the matrix coefficients and producing a sparse matrix solution. The problem of parallel formation of sparse matrix coefficients is addressed for the single and multiphase cases using both black oil and compositional fluid models. Parallel sparse matrix solution is addressed by considering D4 ordered Gaussian elimination, and the multigrid, conjugate gradient, and Successive Over-Relaxation (SOR) methods. Three parallel algorithms based on SOR are developed to illustrate the possible diversity of parallel algorithms. The red-black and multicolored SOR methods which are often used on vector machines are shown to be easily adaptable to parallel MIMD machine. Matrix partitioning and a new method of iteration pipelining are also presented as parallel SOR methods. The various SOR algorithms, in parallel form, are mapped onto the HEP to illustrate the speedups currently possible on an MIMD machine. Projections are made on the future importance of these types of machines to reservoir simulation.

The authors present a parallel algorithm for finite state machine (FSM) verification on multiple instruction/multiple data (MIMD) machines. Given two FSMs, the verification process consists of dynamically constructing the product machine and investigating the reachability of the failure state (from the start state) of the product machine in a distributed fashion. The technique partitions one of the FSMs across a set of processors by distributing the states of the FSM among the processors. Experimental results on benchmark circuits demonstrate near linear speedup. >

Recent years have seen the upraising of a new type of processors strongly relying on the Single Instruction, Multiple Data (SIMD) architectural principle. The main idea behind SIMD computing is to apply a flow of instructions to multiple pieces of data in parallel and synchronously. This permits the execution of thousands of operations in parallel, achieving higher computational performance than with traditional Multiple Instruction, Multiple Data (MIMD) architectures. The level of parallelism required in SIMD computing can only be achieved in image coding systems via microscopic parallel strategies that code multiple coefficients in parallel. Until now, the only way to achieve microscopic parallelism in bit plane coding engines was by executing multiple coding passes in parallel. Such a strategy does not suit well SIMD computing because each thread executes different instructions. This paper introduces the first bit plane coding engine devised for the fine grain of parallelism required in SIMD computing. Its main insight is to allow parallel coefficient processing in a coding pass. Experimental tests show coding performance results similar to those of JPEG2000.

Department of Computing Science, Chalmers University of Technology, S-41296 G¨oteborg, Sweden,lindskog@cs.chalmers.seFinite element meshes and nodenumberingssuitable for parallel solution with equally loaded processors are pre-sented for linear orthotropic elliptic partial differential equations. These problems are of great importance for in-stance in oil and airfoil industry. The linear systems of equations are solved by the conjugate gradient methodpreconditionedby modified incompletefactorization, MIC.The basic method presented,is based on fronts of un-coupled nodes and unlike earlier methods it has the advantage of no requirement of a specific orientation of themesh. This method is howeverin generalrestricted to small degreeof anisotropyin the differential equation. An-other method, which does not suffer from this limitation, uses rotation of the differential equation and spectralequivalence.Therotation is madein such a way that in thenew coordinatesystem, thebasic methodis applicable.The spectral equivalence property is used for estimation of the condition number of the preconditioned system.Both methods are suitable for implementation on parallel computers. The computer architecture could be singleinstruction multiple data (SIMD) as well as multiple instruction multiple data (MIMD) with shared or distributedmemory.Implementation ofthe basicmethodon a sharedmemory parallelcomputershowsasignificantimprove-ment by use of the MIC method compared to the diagonalscaling preconditioningmethod.

A large variety of multiple instruction, multiple data (MIMD) parallel machines-some with global shared memory and some without, some with few processors to some with a few thousand processors-are becoming commercially available, and more are being proposed, designed, or developed. Programming such machines for fast execution of desired applications remains a challenging problem. An examination is made of some broad approaches towards this goal, identifying relevant issues and presenting a few guidelines that should be helpful in parallel programming research and development. The Chare Kernel parallel programming system is proposed as a solution to the parallel programming problem.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

The Scheduling and mapping of tasks on a set of processors is considered as a critical problem in parallel and distributed computing system. This paper deals with the problem of dynamic scheduling on a special type of multiprocessor architecture known as Linear Crossed Cube (LCQ) network. This proposed multiprocessor is a hybrid network which combines the features of both linear types of architectures as well as cube based architectures. Two standard dynamic scheduling schemes namely Minimum Distance Scheduling (MDS) and Two Round Scheduling (TRS) schemes are implemented on the LCQ network. Parallel tasks are mapped and the imbalance of load is evaluated on different set of processors in LCQ network. The simulations results are evaluated and effort is made by means of through analysis of the results to obtain the best solution for the given network in term of load imbalance left and execution time. The other performance matrices like speedup and efficiency are also evaluated with the given dynamic algorithms.

The Accurate Automation Corporation (AAC) neural network processor (NNP) module is a fully programmable multiple instruction multiple data (MIMD) parallel processor optimized for the implementation of neural networks. The AAC NNP design fully exploits the intrinsic sparseness of neural network topologies. Moreover, by using a MIMD parallel processing architecture one can update multiple neurons in parallel with efficiency approaching 100 percent as the size of the network increases. Each AAC NNP module has 8 K neurons and 32 K interconnections and is capable of 140,000,000 connections per second with an eight processor array capable of over one billion connections per second.© (1994) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

A set of tools to simulate SIMD (single instruction multiple data) and MIMD (multiple instruction multiple data) shared memory architectures on multitasking sequential systems is presented. The main objective of these tools is to evaluate parallel computing systems. As is well known, the performance of the parallel algorithms, unlike that of serial algorithms, is very machine dependent. The simulation is based on an algorithm-driven approach, allowing the test and evaluation of algorithms for this type of architecture. The evaluation of the algorithms is done at run-time, making possible the acquisition of very realistic results. Different levels of evaluation can be applied. More accurate results are achieved at the expense of more simulation time. Simulation tools have been developed in C language for Unix based systems, assuring portability among a large class of computing systems. The tools presented have been extensively used to simulate orthogonal multiprocessing systems, especially for the development and simulation of several image processing algorithms. Experimental results show that a good approach to the real system operation has been achieved. >

The problem addressed is how to use transputer networks for image processing. As is well known, SIMD (single instruction/multiple data) or MIMD (multiple instruction/multiple data) architectures are very useful in parallel computing. The authors describe how to use transputers as a SIMD or MIMD machine to implement parallel image processing. Several image-processing algorithms, including Laplacian of Gaussian, edge detection, region labeling, generalized Hough transform, and thinning, have been tested. The authors maintain that transputer-based systems are suitable for real-time image processing. It is also pointed out that, compared with the other parallel machines, transputer systems can provide high performance and more flexibility with relatively low cost. >

8 - Multiprocessing