A real-time defect detection in printed circuit boards applying deep learning

Plasma treatment of printed circuit board (PCB) is a common step in the electronic packaging processes in order to modify the surface and enhance its adhesion to molding compound. In this paper, PCB surface modifications resulting from plasma treatment were investigated by chemical and mechanical analysis methods. The PCB substrate in consideration was for multichip package, consisting of a core layer sandwiched by solder resist (SR) material, which in turn was composed of epoxy, acryl resins, and several kinds of fillers. Argon was employed as a plasma gas and the number of times that the plasma treatment was applied was chosen as a variable to estimate the effect of repeated exposure to the SR surface during the manufacturing process. The resulting surface conditions were analyzed using roughness measurement, water contact angle measurement, X-ray photoelectron spectroscopy (XPS), nano-indentation, and nano-scratch test method. Comprehensive analyses made it possible to understand the characteristics of the effect of plasma on the PCB surface, i.e., SR material. It was found that the surface roughness after the one-time plasma treatment increased from ~ 62 to ~ 90nm, then decreased more or less to the initial level after three and eight times of repeated treatments. These roughness trends were explained by cleaning out contaminants accumulated in the surface crevices and then preferentially removing or melting away a thin resin layer from the peaks on the surface. The plasma treatment decreased the contact angle significantly and increased work of adhesion. Chemical analysis of these surfaces by XPS showed that the C-C bonds in SR were broken, the population of the polar groups such as O-H, C=O, and COOH increased, and the oxygen content increased. The polar groups increased surface energy, and resulted in increased PCB adhesion with the epoxy molding compound (EMC). Mechanical analysis by nano-indentation and nano-scratch test showed that the surface became soft and weak if plasma treatment was too excessive. In this case, a plasma affected zone corresponding to the severe C-C bond breakage was formed near the surface and the adhesion with EMC suffered. Therefore, caution should be exercised in determining the degree of plasma treatment needed.

<div class="section abstract"><div class="htmlview paragraph">High currents flowing through various traces of a printed circuit boards (PCB) causes thermal run away and PCB warpage due to the occurrence of high heat density. The present study discusses on steady state thermal analysis performed in a PCB kept inside an enclosure. Thermal analysis allows PCB designer to quickly move and confirm the component’s placement by examining the temperature plots predicted on the PCB surface. A PCB particularly designed for automated manual transmission (AMT) application employed in Ashok Leyland electric vehicle (EV) trucks is used for this present study. The performed simulations are preliminary level and carried out with commercially available software Altair Simlab ElectroFlo 2022.3. Simlab is a PCB level EDA (Electronic Design Automation) software suite used for design and analysis, and thus helps in minimizing the development cycles. The power dissipation for each and every component and the component analysis power level plays a significant role in deciding the temperature at various components in the PCB. The temperature at various locations of the PCB and enclosure is predicted and compared with some benchmark values presently available and measured at the vehicle level. A good agreement is observed between both the predicted and measured values. Here, the objective is to detect these thermal issues at the initial design level itself, so as to improve reliability of the controller.</div></div>

A holographic pattern measuring system (HPMS) is used to measure the deformation of a PCB (printed circuit board) due to thermal stress. A quantitative displacement of the PCB surface can be measured by analyzing the holographic pattern. The HPMS combines holography and graphic image processing. The distribution of the microscopic displacement of the PCB surface due to thermal stress can be visualized, and a 3-D graphic image of the deformation can be obtained automatically. Experiments were carried out to the temperature on the PCB surface, the fringe pattern, and the relationship between the deformation and with the width of copper foil on the PCB through which the current flows. >

With the miniaturization of the electronic devices, the spacing among the circuit traces on printed circuit boards (PCB) keeps reducing, which increases the risk of insulation failure based on electrochemical migration (ECM), especially for immersion silver (ImAg) plated PCB. Meanwhile, due to the severe air pollution in developing countries, airborne dust can deposit on the PCBs in electronic devices. The soluble salts in the dust can decrease critical humidity and increase the ion concentration in the moisture condensed on the PCB surfaces, so that the failure mechanism based on ECM may be changed and the time to failure (TTF) can be shorten. In this paper, the effect of the soluble salt with various concentrations on the ECM failure on PCB was investigated. The life model of ECM was built up based on the electrochemical reactions on electrodes. Then the ECM of PCB under sodium chloride (NaCl) solution with various concentrations was simulated on Y- pattern PCB by water drop (WD) test method. The failure characteristics of ECM during various stages of migration and under various concentrations of salt solution were analyzed by the morphology and element compositions of dendrite products, as well as real time monitoring of surface insulation resistance (SIR). The TTF of ECM was extracted to fit the life model. Finally, the mechanism and performance of ECM of PCB under salt solution was analyzed. And the application of the life model of the ECM failure of PCB contaminated by soluble salts was discussed.

The conversion to lead-free Ball Grid Array (BGA) packages has raised several new assembly and reliability issues. One reliability concern becoming more prevalent is the increased propensity of pad cratering in Printed Circuit Boards (PCBs) [1, 2]. In general, lead-free solder joints are stiffer than tin-lead solder joints, and some lead-free compatible PCB dielectric materials are more brittle than conventional tin-lead compatible PCB materials. These two factors, coupled with the higher peak reflow temperatures for lead-free assembly, could transfer more strain to the PCB dielectric structure, causing a cohesive failure underneath the BGA corner pads. The likelihood of pad cratering occurring in any given assembly depends on several factors including, but not limited to the BGA package size, construction and surface finish; and the PCB pad size, material and surface finish. Standard assembly level bend and shock tests can be used to determine if the entire assembly can survive a given strain and strain-rate range without having any failures. However, with these standard assembly level tests, it is difficult to determine if the failures occur due to a weaker PCB structure or a stiffer BGA package. It is critical to have a standardized test method that can be used to characterize and rank-order different PCB dielectric materials and PCB pad sizes. In this study, an easy-to-implement test method is presented in detail, along with calibration and test results comparing a broad spectrum of PCB attributes. Different dielectric materials and pad sizes were evaluated to develop a comparative metric that can be used to rank-order different material/pad size combinations. The results were generated over different pull temperatures and multiple reflows, to study the effect of temperature on dielectric mechanical strength characteristics. Ultimately, these metrics can be used to optimize PCB design, thus mitigating pad cratering potential.

Electrochemical dissolution and recovery of tin from printed circuit board in methane–sulfonic acid solution

Defect inspection is essential in the semiconductor industry to fabricate printed circuit boards (PCBs) with minimum defect rates. However, conventional inspection systems are labor-intensive and time-consuming. In this study, a semi-supervised learning (SSL)-based model called PCB_SS was developed. It was trained using labeled and unlabeled images under two different augmentations. Training and test PCB images were acquired using automatic final vision inspection systems. The PCB_SS model outperformed a completely supervised model trained using only labeled images (PCB_FS). The performance of the PCB_SS model was more robust than that of the PCB_FS model when the number of labeled data is limited or comprises incorrectly labeled data. In an error-resilience test, the proposed PCB_SS model maintained stable accuracy (error increment of less than 0.5%, compared with 4% for PCB_FS) for noisy training data (with as much as 9.0% of the data labeled incorrectly). The proposed model also showed superior performance when comparing machine-learning and deep-learning classifiers. The unlabeled data utilized in the PCB_SS model helped with the generalization of the deep-learning model and improved its performance for PCB defect detection. Thus, the proposed method alleviates the burden of the manual labeling process and provides a rapid and accurate automatic classifier for PCB inspections.

In this paper, we propose a hybrid modeling method for analyzing the electromagnetic compatibility characteristics of printed circuit boards (PCBs). The method uses an equivalent magnetic dipole array deduced from near-field scanning results obtained at a certain height over the PCB surface under test and the finite-difference time domain (FDTD) algorithm. The array of dipoles can simulate the PCB electromagnetic emissions, including the ground plane effect at a particular high frequency; the equivalent dipole array can then be imported into the FDTD calculation space for calculating the electromagnetic fields generated by the dipole array. In our experiment, we obtained the tangential magnetic field distribution of the PCB surface using near-field scanning, from where the tangential magnetic field component, orientation, and the magnitude and phase of the dipoles could be deduced. We used the proposed method to model two different modules on a highly integrated circuit. The results of the proposed method and those obtained by near-field scanning are nearly the same, which demonstrates the effectiveness and accuracy of the proposed method. We therefore conclude that the proposed modeling approach presents a new technique for studying the electromagnetic interference of PCBs.

Printed circuit boards (PCBs) are critical for interconnecting various components and allowing them to communicate with each other. It is critical to ensure that there are no small surface defects that can negatively impact PCB production. Therefore, template matching is often used in PCB surface inspection systems. Despite its popularity, this method can be improved because inspecting a PCB with a template is inefficient. Currently, integrating the surface inspection system with the deep learning method is proving to be more effective in solving this problem. This paper examines three popular deep learning object recognition methods in order to determine which one is the most effective in terms of attention. These three models are called Carafe, Empirical Attention, and ResNeSt. The experimental results showed that ResNeSt with split attention networks achieves the greatest accuracy in deep learning PCB surface inspection system with a mean average precision (mAP) of 99.2% and an average recall (AR) of 99.5%. The result of this study would improve the effectiveness of PCB surface inspection in controlling production lines.

Industry 4.0 is currently the goal of many factories, promoting manufacturing factories and sustainable operation. Automated Optical Inspection (AOI) is a part of automation. Products in the production line are usually inspected visually by operators. Due to human fatigue and inconsistent standards, product inspections still have defects. In this study, the sample component assembly printed circuit board (PCB), PCB provided by the company was tested for surface components. The types of defects on the surface of the PCB include missing parts, multiple parts, and wrong parts. At present, the company is still using visual inspection by operators, the PCB surface components are more complex. In order to reduce labor costs and save the development time required for different printed circuit boards. In the proposed method, we use digital image processing, positioning correction algorithm, and deep learning YOLO for identification, and use 450 images and 10500 components of the PCB samples. The result and contribution of this paper shows the total image recognition rate is 92% and the total component recognition rate reaches 99%, and they are effective. It could use on PCB for different light, different color backplanes, and different material numbers, and the detection compatibility reaches 98%.

In this work the scanned contribution of a pseudo random noise signal generated in a printed circuit board (PCB) is correlated with the radiated electromagnetic interference (EMI) in the near-field as well as in the far-field. Far-field measurements were performed inside the anechoic chamber for the DUT installed on a rotating table. The proposed cross-correlation spatial-time analysis allows to localize the path of the generated pseudorandom source over the PCB surface and to predict the angular distribution of the radiated emissions from the electronic devices.

Printed circuit board (PCB) assembly lines consist of a number of different machines for mounting electronic components onto PCBs. While high-speed placement machines are employed to assemble standard components, so-called fine-pitch placement machines are used to mount complex electronic components with high precision and by use of specific nozzles. In this paper, we investigate a typical mass production environment where a single type of PCB is assembled in a line comprising high-speed as well as high-precision placement machines. The PCB assembly line balancing problem consists of assigning component feeders, each holding a specific electronic component type, and the corresponding placement operations to machines in the line so as to minimize the assembly cycle time. To solve this problem, a two-stage solution procedure based on genetic algorithm (GA) is proposed. In the first stage, component feeders are assigned to the placement machines with the objective of balancing the workload within the assembly line. A number of candidate solutions are then transmitted to the second stage, where specific machine optimization algorithms are applied to determine the feeder-slot assignment in the component magazine of the machines and the placement sequence of the various components. As a result, fine-tuned placement operation times are achieved which reflect the individual operation mode and the actual component setup of the placement machines. Finally, from the candidate solutions the one which minimizes the actual PCB assembly time is selected.

Electronic components (EC) detection is relevant for Printed Circuit Board (PCB) manufacturing, quality inspection, and assurance (cyber-security). Moreover, at end-of-life electronic devices, the PCBs become Waste PCBs (WPCBs), the primary source of high-value materials in electronic waste. However, the recycling process is challenging because of the WPCB’s high composition diversity. EC detection in WPCBs can reduce the uncertainty about WPCBs composition and help select a better recycling process. Nevertheless, large fully-annotated datasets for the PCB domain are available at a high cost. For WPCBs, there is only one publicly available dataset, the PCB-DSLR, and it is partially labeled. As for PCBs, the FICS-PCB dataset is available. However, it contains images of modern and clean PCBs, all in good condition, while the first has broken and dirty parts. Thus, we propose a self-training strategy for object detection algorithms without needing a fully labeled dataset. In the strategy, the YOLOv5 model is used to detect the eight types of electronic components present in FICS-PCB in PCB-DSLR, which initially has labels only for integrated circuits. The process occurs through the interaction between a teacher model, trained with the FICSPCB data, and a student model, which is trained by joining the FICS-PCB data and the teacher-generated labels for PCB-DSLR. The results show that the student model performs better in the electronic components detection task, obtaining greater precision and sensitivity when compared to the teacher model. Since we are dealing with partially labeled data, we provide a low-dimensional representation of the detections of both models using t-SNE.

Surface defect detection for printed circuit board (PCB) is indispensable for managing PCB production quality. However, automatic detection of PCB surface defects is still a challenging task because, even within the same category of surface defect, defects present great differences in morphology and pattern. Although many computer vision-based detectors have been established to handle these problems, current detectors struggle to achieve high detection accuracy, fast detection speed and low memory consumption simultaneously. To address those issues, we propose a cost-effective deep learning (DL)-based detector based on the cutting-edge YOLOv4 to detect PCB surface defect quickly and efficiently. The YOLOv4 is improved upon with respect to its backbone network and the activation function in its neck/prediction network. The improved YOLOv4 is evaluated with a customized dataset, collected from a PCB factory. The experimental results show that the improved detector achieved a high performance, scoring 98.64% on mean average precision (mAP) at 56.98 frames per second (FPS), outperforming the other compared SOTA detectors. Furthermore, the improved YOLOv4 reduced the parameter space of YOLOv4 from 63.96 M to 39.59 M and the number of multiply-accumulate operations (Madds) from 59.75 G to 26.15 G.

Flexible electronics and sensors are a key enabling element for the realization of wearables and geometry adaptive devices needed to follow current trends such as the Internet of things or Industry 4.0. Within this paper, we present a new and flexible packaging platform by the fabrication of an ultra-thin and highly flexible printed circuit board (PCB).The thermoplastic polymer Parylene, which combines a variety of unique properties such as optical transparency, biostability and biocompatibility according to ISO 10993, thermal stability as well as low permeability for gases and water, was used as the base for the new PCB.Particularly, its mechanical properties, especially the absence of intrinsic stresses, as well as its low Young’s modulus and good bendability are advantageous when using Parylene films as a free-standing substrate for flexible applications. The chemical inertness of Parylene against all common acids, bases and solvents ensures its compatibility with established standard microsystem technologies.For the realization of ultra-thin flexible PCBs, Parylene was used as a substrate as well as for the encapsulation and protection layer, respectively. Furthermore, Parylene was the dielectric between the metallic conductive layers. These redistribution layers (RDL) were deposited and patterned by standard microsystem technologies, such as sputtering, lithography and wet chemical etching. Hence, structure sizes of down to 10 µm were successfully realized. Different metals, such as gold, copper, and aluminum were tested for the RDL. Alternatively, printing technologies such as screen printing and aerosol jet printing were successfully demonstrated for the if conductive silver layerse. The electrical connection between the various RDL was of special interest throughout the study and was realized by etching vertical vias through the Parylene using oxygen plasma. Due to the low total thickness of the flexible Parylene PCB of 20 µm or even less, the obtained vias through the Parylene feature an advantageous low aspect ratio. For the contact formation through the vias, different methods were investigated, e. g. sputtering, printing and electrochemical deposition.Finally, the fabricated flexible Parylene PCB were characterized with respect to their bendability and electrical properties. Doing so, the resistivity and capacitance were measured as well as the frequency response between 20 kHz and 500 MHz. Particularly, for frequencies below 1 MHz the realized flexible Parylene PCBs show a good electrical performance.A third function of Parylene with respect to the realization of an ultra-thin and flexible PCB is its usage as a barrier or capping layer. Doing so, new approaches such as embedding electronic or sensor components in the flexible PCB can be enabled. Other integration technologies such as wire bonding, printing or gluing were investigated with respect to their usability for the new flexible PCB as well. Besides, also the direct fabrication of sensors on the Parylene flexible PCB was successfully demonstrated by the realization of a flexible potentiometric pH sensor.The presented new type of ultra-thin PCB is a versatile platform for the realization of flexible electronics, sensors and devices. Due to its biocompatible properties, the flexible Parylene PCB can be used for medical applications but also for the integration of MEMS, chemical sensors and optical components, respectively. Doing so, it enables the realization of smart systems for wearable applications and their integration into light weight constructions. Within this paper, the concept of this new approach, the respected fabrication and integration technologies as well as possible applications are presented in detail. Figure 1