- https://doi.org/10.1109/naps50074.2021.9449698
A real-time FPG-embedded faults classification system powered by phasor estimation and supervised learning algorithms
- Apr 11, 2021
- Paola Buendia +3 more
Abstract
This paper specializes in developing a real-time faults classification system powered by phasor estimation and supervised learning algorithms. The classification system is embedded in a low-cost Field-Programmable Gate Array (FPGA) programmed using VHSIC Hardware Description Language (VHDL) code, exploiting the flexibility in its parallel architecture and real-time execution that imply faster processing speeds than microcontrollers. The phasor estimation is driven by a nonrecursive Discrete Fourier Transform (DFT) and the supervised learning-based classifier model is conducted by a Support Vector Machine (SVM). Experimental tests corroborate the system performance and its reliability under different fault conditions.
- # Phasor Estimation
- # VHSIC Hardware Description Language
- # Supervised Learning Algorithms
- # Low-cost Field-Programmable Gate Array
- # Discrete Fourier Transform
- # Real-time Classification
- # Real-time Execution
- # Real-time Faults
- # Hardware Description Language Code
- # Field-Programmable Gate Array
