A Single-Phase Multi-level Inverter Using a Lesser Number of Switching Devices

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The multi-level inverters with the reduced components are becoming prevalent because a higher number of output voltage levels can be achieved using a comparatively lesser number of devices. This paper proposes a generalized configuration of single-phase symmetric multi-level inverter (MLI) topology using lesser number of power electronic switches. The comprehensive study of the proposed inverter has been done through a specimen nine-level inverter. Level-shifted pulse width modulation (LS-PWM) technique is applied to produce the corresponding gate pulses. Modeling and simulation of the proposed inverter are done using MATLAB/Simulink. The proposed structure of the nine-level inverter is experimentally executed in the laboratory to validate the simulation outcomes. Moreover, a comparative study of the recommended configuration of the multi-level inverter is done.