A Symbiotic 5G-IoT Demonstration Platform with Network Slicing and Hardware Simulation Capability

Model quantization is a widely used technique to compress and accelerate deep neural network (DNN) inference.Emergent DNN hardware accelerators begin to support mixed precision (1-8 bits) to further improve the computation efficiency, which raises a great challenge to find the optimal bitwidth for each layer: it requires domain experts to explore the vast design space trading off among accuracy, latency, energy, and model size, which is both timeconsuming and sub-optimal.There are plenty of specialized hardware for neural networks, but little research has been done for specialized neural network optimization for a particular hardware architecture.Conventional quantization algorithm ignores the different hardware architectures and quantizes all the layers in a uniform way.In this paper, we introduce the Hardware-Aware Automated Quantization (HAQ) framework which leverages the reinforcement learning to automatically determine the quantization policy, and we take the hardware accelerator's feedback in the design loop.Rather than relying on proxy signals such as FLOPs and model size, we employ a hardware simulator to generate direct feedback signals (latency and energy) to the RL agent.Compared with conventional methods, our framework is fully automated and can specialize the quantization policy for different neural network architectures and hardware architectures.Our framework effectively reduced the latency by 1.4-1.95×and the energy consumption by 1.9× with negligible loss of accuracy compared with the fixed bitwidth (8 bits) quantization.Our framework reveals that the optimal policies on different hardware architectures (i.e., edge and cloud architectures) under different resource constraints (i.e., latency, energy and model size) are drastically different.We interpreted the implication of different quantization policies, which offer insights for both neural network architecture design and hardware architecture design.* indicates equal contributions.68 69 70 71 72 73 25 44 63 82 101 120 MobileNets (fixed 8-bit quantization) MobileNets (our flexible-bit quantization) Latency (ms) Top-1 Accuracy (%) 1MB 2MB 3MB Model Size:Figure 1: We need mixed precision for different layers.We quantize MobileNets [12] to different number of bits (both weights and activations), and it lies on a better pareto curve (yellow) than fixed bit quantization (blue).The reason is that different layers have different redundancy and have different arithmetic intensity (OPs/byte) on the hardware, which advocates for using mixed precision for different layers.

Prior to operational use, communications hardware and software must be thoroughly tested and verified. In space-link communications, field testing equipment can be prohibitively expensive and cannot test to non-ideal situations. In this paper, we show how software and hardware emulation tools can be used to accurately model the characteristics of a satellite communication channel in a lab environment. We describe some of the challenges associated with developing an emulation lab and present results to demonstrate the channel modeling. We then show how network emulation software can be used to extend a hardware emulation model without requiring additional network and channel simulation hardware.

During the last two decades simulation has become a well established tool for the design and investigation of continuous systems. These types of systems are found throughout the engineering and science disciplines ranging from a simple servo system to very complex systems (as large electronic networks, the dynamics of chemical and transfer processes, nuclear processes, and physiological and environmental processes). Continued developments in simulation hardware and software have permitted the investigation of increasingly complex problems which in turn have stimulated further developments in simulation capabilities.

The Formation Flying Test Bed (FFTB) at NASA Goddard Space Flight Center (GSFC) is being developed as a modular, hybrid dynamic simulation facility employed for end-to-end guidance, navigation, and control (GN&C) analysis and design for formation flying clusters and constellations of satellites. The FFTB will support critical hardware and software technology development to enable current and future missions for NASA, other government agencies, and external customers for a wide range of missions, particularly those involving distributed spacecraft operations. The initial capabilities of the FFTB are based upon an integration of high fidelity hardware and software simulation, emulation, and test platforms developed at GSFC in recent years; including a high-fidelity GPS simulator which has been a fundamental component of the Guidance, Navigation, and Control Center's GPS Test Facility. The FFTB will be continuously evolving over the next several years from a tool with initial capabilities in GPS navigation hardware/software-in-the-loop analysis and closed loop GPS-based orbit control algorithm assessment to one with cross-link communications and relative navigation analysis and simulation capability. Eventually the FFTB will provide full capability to support all aspects of multi-sensor, absolute and relative position determination and control, in all (attitude and orbit) degrees of freedom, as well as information management for satellite clusters and constellations. In this paper we focus on the architecture for the FFTB as a general GN&C analysis environment for the spacecraft formation flying community inside and outside of NASA GSFC and we briefly reference some current and future activities which will drive the requirements and development.

Technological advancements in communication and embedded computing lead to the increasing application of decentralized structures in automation and control. The decentralization adds new behavior in the form of - often non-deterministic - delays to the resulting networked control systems (NCS). To analyze a closed loop control system including network communication, simulation is a viable approach. In this work a library for the simulation of controller and network hardware to be used in combination with process models in closed loop is presented. The library is implemented in the Modelica language. To allow easy application a structure conserving component based modeling approach is followed. The applicability is shown by analyzing the performance of a robotics control system where communication is realized alternatively with Ethernet and CAN bus.

Time synchronization is one of the most fundamental problems on the internet of things (IoT). The IoT requires low power and an efficient synchronization protocol to minimize power consumption and conserve battery power. This paper introduces an efficient method for time synchronization in the IoT called low-power multi-hop synchronization (LPSRS). It employs a reference node scheduling mechanism to avoid packet collisions and minimize the communication overhead, which has a big impact on power consumption. The performance of LPSRS has been evaluated and compared to previous synchronization methods, HRTS and R-Sync, via real hardware networks and simulations. The results show that LPSRS achieves a better performance in terms of power consumption (transmitted messages). In particular, for a large network of 450 nodes, LPSRS reduced the total number of transmitted messages by 53% and 49% compared to HRTS and R-Sync, respectively.

Capacitor-based analog synaptic circuit arrays proposed so far typically required more than three transistors per synapse to enable selective updates for parallel backpropagation updates. For the first time, an innovative update scheme that enables selective updating without requiring additional transistors is demonstrated. This approach is experimentally validated through an all-InGaZnO (IGZO) thin-film transistor (TFT) 3-transistor 1-capacitor (3T1C) synaptic circuit. IGZO TFTs are specifically chosen for their ability to extend retention times due to extremely low leakage currents and their simplified fabrication processes at low temperatures. Fundamental synaptic operations, including controllable weight updates, long data retention, and stable programming endurance, are confirmed experimentally. Additionally, optimizing operational voltage conditions improves weight update behavior, which enhances network training performance. System-level analysis using a neural network hardware simulator with a derived weight update model demonstrates high training accuracy on the MNIST handwritten digit dataset and achieves maximum accuracy over 98%. With the proposed selection method and tunable weight updates, 3T1C synaptic circuit is a promising candidate for scalable large-scale deep neural network accelerators based on analog compute-in-memory technology.

Development and deployment of small-scale nuclear power reactors and their maintenance, monitoring, and control are part of the mission under the Small Modular Reactor (SMR) program. The objectives of this NERI-consortium research project are to investigate, develop, and validate advanced methods for sensing, controlling, monitoring, diagnosis, and prognosis of these reactors, and to demonstrate the methods with application to one of the proposed integral pressurized water reactors (IPWR). For this project, the IPWR design by Westinghouse, the International Reactor Secure and Innovative (IRIS), has been used to demonstrate the techniques developed under this project. The research focuses on three topical areas with the following objectives. Objective 1 - Develop and apply simulation capabilities and sensitivity/uncertainty analysis methods to address sensor deployment analysis and small grid stability issues. Objective 2 - Develop and test an autonomous and fault-tolerant control architecture and apply to the IRIS system and an experimental flow control loop, with extensions to multiple reactor modules, nuclear desalination, and optimal sensor placement strategy. Objective 3 - Develop and test an integrated monitoring, diagnosis, and prognosis system for SMRs using the IRIS as a test platform, and integrate process and equipment monitoring (PEM) and process and equipment prognostics (PEP) toolboxes. The research tasks are focused on meeting the unique needs of reactors that may be deployed to remote locations or to developing countries with limited support infrastructure. These applications will require smaller, robust reactor designs with advanced technologies for sensors, instrumentation, and control. An excellent overview of SMRs is described in an article by Ingersoll (2009). The article refers to these as deliberately small reactors. Most of these have modular characteristics, with multiple units deployed at the same plant site. Additionally, the topics focus on meeting two of the eight needs outlined in the recently published 'Technology Roadmap on Instrumentation, Control, and Human-Machine Interface (ICHMI) to Support DOE Advanced Nuclear Energy Programs' which was created 'to provide a systematic path forward for the integration of new ICHMI technologies in both near-term and future nuclear power plants and the reinvigoration of the U.S. nuclear ICHMI community and capabilities.' The research consortium is led by The University of Tennessee (UT) and is focused on three interrelated topics: Topic 1 (simulator development and measurement sensitivity analysis) is led by Dr. Mike Doster with Dr. Paul Turinsky of North Carolina State University (NCSU). Topic 2 (multivariate autonomous control of modular reactors) is led by Dr. Belle Upadhyaya of the University of Tennessee (UT) and Dr. Robert Edwards of Penn State University (PSU). Topic 3 (monitoring, diagnostics, and prognostics system development) is led by Dr. Wes Hines of UT. Additionally, South Carolina State University (SCSU, Dr. Ken Lewis) participated in this research through summer interns, visiting faculty, and on-campus research projects identified throughout the grant period. Lastly, Westinghouse Science and Technology Center (Dr. Mario Carelli) was a no-cost collaborator and provided design information related to the IRIS demonstration platform and defining needs that may be common to other SMR designs. The results of this research are reported in a six-volume Final Report (including the Executive Summary, Volume 1). Volumes 2 through 6 of the report describe in detail the research and development under the topical areas. This volume serves to introduce the overall NERI-C project and to summarize the key results. Section 2 provides a summary of the significant contributions of this project. A list of all the publications under this project is also given in Section 2. Section 3 provides a brief summary of each of the five volumes (2-6) of the report. The contributions of SCSU are described in Section 4, including a summary of undergraduate research experience. The project management organizational chart is provided as Figure 1. Appendices A, B, and C contain the reports on the summer research performed at the University of Tennessee by undergraduate students from South Carolina State University.

The analysis of existing means of designing and modeling navigation systems of mobile robots was carried out. It is shown that the research of algorithms and equipment for the navigation of mobile robots in the conditions of distance learning using computer simulation can be carried out with the help of the UnoArduSim software simulator. This simulator has extensive hardware simulation capabilities that can be applied to mobile robot navigation. Examples of creating robot models for researching algorithms and equipment for mobile robot navigation, creating stands during laboratory and practical classes are given.

With the swift development of hardware simulation technology, virtual laboratory environment has appealed more and more attention of educators. In this paper, we develop an interactive virtual laboratory environment for hardware chips application experiment. It provides the students with real expression, convenient operation and powerful simulation capability. Furthermore, interactivity and expansibility make this system distinctive under different circumstances. Till now, our virtual laboratory environment has been implemented and successfully applied in a Computer Interface Technology course in Shanghai University and has gained positive appraisal from teachers and students.