A time management optimization framework for large-scale distributed hardware-in-the-loop simulation

This paper presents a Hardware in the loop (HIL) simulation of a microcontroller using non-linear control implemented in PFC (Power Factor Correction) boost, buck and SEPIC converters. This is a non-conventional approach, where libraries are used to directly interface with the Texas's DSP 2812. Initially, the block diagrams that contain the control equations are constructed. Then, the codes are generated automatically. The advantages provided by the proposed method are: security, economy of development cycle time, easy understanding of the control process and programming, standardization and concurrent simulation. Three nonlinear control techniques - state feedback linearization (SFL), passivity based control (PBC) and interconnection and damping assignment passivity-based control (IDA-PBC) has been validated experimentally using HIL simulation for boost, buck and SEPIC converters.

In this paper the operation and control of battery-less hybrid systems for off-grid power supply is investigated. The load demand of the system is covered by a diesel-driven generator (DDG) and photovoltaic (PV) arrays. First, an overview of the features and operation of such systems is provided. Primary control of the system is investigated where the PV inverter curtails its active power in order to respect the minimum load ratio of the DDG and contribute to frequency control. Secondary control of the system is applied using the Hardware in the Loop (HIL) technique, where parts of the real-time simulation are replaced with actual physical components. Hardware controllable loads are activated by a hardware controller in order to respect the minimum load ratio of the DDG. An alternative method is applied where instead of controllable loads a hardware PV inverter curtails its active power production. The HIL simulation results show that both methods are effective to reduce the frequency deviation of the system and maintain the power output of the DDG above the predefined minimum requirement. The tests were performed with a combination of Controller HIL and Power HIL simulation leading to more realistic testing than Controller HIL simulation or pure digital simulation.

In this paper, we deal with the development of a HIL (Hardware-in-the-Loop) simulator for BLDC motor driving using a microcontroller. We propose a modified BLDC model for the simulation of a BLDC motor using a microcontroller. The proposed HIL simulator is developed using various peripherals of STM32F407 (ARM cortex-M4 based microcontroller). The proposed HIL simulator consists of three parts. First, the part simulating the inverter analyzes the input PWM signals to calculate the corresponding input voltage. This part detects wrong PWM signals or shoot-throughs of the half-bridge. Second, the BLDC motor part is implemented by solving the modified model equations in real time. Finally, the third part generates the output of the BLDC motor. The HIL simulator generates the Back Electromotive Force (BEMF) waveform and signals of a rotary encoder and a hall sensor. Sensor signals are generated using a timer interrupt. The BEMF waveform is implemented using DAC. Moreover, a generation method using PWM and RC filter is presented. Through experiments, we illustrate that the developed HIL simulator accurately simulates the BLDC motor. Furthermore, we confirm that the BLDC motor drive algorithm designed with the developed HIL simulator can be successfully applied to real BLDC motor driving systems.

Since a bi-modal tram has an extended wheel base and an articulated chassis, an all-wheel steering system (AWS) is applied to it to satisfy the required steering performance. An AWS electronic control unit (ECU) controls the hydraulic actuator according to the vehicle driving environment, such as the driver steering angle, articulating angle, and vehicle velocity. In this paper, the test platform developed for the AWS ECU test in a hardware in the loop (HIL) environment is explained. Using the developed test platform, the control algorithm of the AWS ECU can be evaluated under the virtual driving condition of the bi-modal tram. Also, vehicle manoeuvrability is investigated using this test platform. The AWS system, including ECU hydraulic system and embedded software, can be verified by the hardware in the loop simulation (HILS) test results.

The Hardware-In-the-Loop (HIL) simulation system for on-orbit docking dynamics is a large-scale complex test equipment. It establishes working conditions for the docking mechanism similar with those on orbit. The kernel of above dynamics HIL simulation system is a mechanical force and movement actions simulator. Besides the mechanical force and movement actions simulator, it also includes an environmental simulator, a microgravity simulator and so on. In a narrow mind, the HIL simulation system for on-orbit docking dynamics refers to the mechanical force and movement action simulator. It is a feedback system which consists of the dynamics simulation model and real-time simulaton computer, the hardwares under test, the force and torque sensor, the motion simulator. The research topic of this paper is limited in above narrow mind. The HIL simulation system for on-orbit docking dynamics is a key technology that played important roles in the lunar excursion of America and in the assembling and re-supplying of Russian MIR space station. Morden space programme enhance the requirements to the HIL simulation for spacecraft docking dynamics. International Space Station (ISS) program also required that the ISS Common Berthing Mechanism (CBM) testing on ground simulator should be performed under operational vacuum and thermal conditions (Office of NRBMP, 1999). In the early days, the physical simulators played main roles in docking dyniamics tests. Because of the development of computor and the complexity of modern docking mechanism, the HIL simulation technology is applied in the docking dynamics simulation. The dynamic docking test system (DDTS) is setup in US (Gates & Graves, 1974), and the integated testing system for docking mechanism was built in former Soviet (Peng et al., 1992). In1980s, docking dynamic test facility (DDTF) was created for testing the handleslatch docking mechanism (Crimbert & Marchal, 1987). National space development agency of Japan built the rendezvous and docking operation test system (RDOTS) testing threepoints handles-latch docking mechanism (Lange & Martin, 2002). The HIL simulation for spacecraft on-orbit docking is a attractive and promising research field. Lim et al. (1989) modeled and simulated the Stewart platform of DDTS. They pointed

Hardware-in-the-loop simulation for estimation of position control performance of machine tool feed drive

Autonomous Underwater Glider (AUG) as a high durability underwater vehicle is typically capable of extremely long missions in the ocean by tracking the desired waypoints using guidance system. Typical AUG's guidance system development requires many costly at-sea trials to evaluate the guidance ability. Simulation provides a cost-effective measure to carry out preliminary component and system testing, thereby reducing the number of potential failures in at-sea trials. This paper presents the Hardware in the Loop (HIL) simulation development of the guidance system for a class of AUG. Guidance through waypoints using Line of Sight (LOS) method guides the AUG to desired waypoints by adjusting the yaw angle. The LOS algorithm was implemented as executable code in BeagleBone Black board. HIL simulation can be simulated using the hardware component (BeagleBone Black) along with AUG's models which were built in MATLAB/SIMULINK. It provides the verification step of the AUG's guidance system before the real deployment in the ocean. The HIL simulation showed that LOS method was able to guide the AUG to desired waypoints despite simulated using some different waypoint schemes and under the effect of ocean currents as a disturbance.

In complex systems, testing each interface of a system separately is not a coherent way of testing and it reduces test quality. Especially in design verification tests, increasing test quality can be achieved by testing system level reactions and responses of all interfaces together simultaneously considering the system as a whole. In this study, a test system created for design verification tests of four different units through Hardware-in-theloop (HIL) simulation is to be explained. Design verification tests covering whole interfaces of Unit Under Test (UUT) are demonstrated with also simulations of units to be connected to UUT. The overall test system is divided into two main parts as automatic test equipment (ATE) design and HIL simulation design. The design process of ATE includes test requirements, specifications and identifications of all interfaces which belong to interconnected units in the system. The hardware selections and connections between them are accomplished for four different UUTs in such a manner that they can be tested together or separately. In the design process of HIL simulation, each sub-system connected to UUTs and UUTs themselves are considered separately. The requirements for each sub-system and each UUT are met within the interface control documents. In order to increase the quality of test, communications and the control of the electrical interfaces between each sub-system are implemented in real time. The communication interfaces consist of RS422, RS485, MILSTD-1553, Telnet and CANopen. The reactions and responses of each UUT are collected and HIL simulation is improved. Finally, the discussions about the approach of design verification tests of four different UUTs within HIL simulation and the improvement of the test quality are revealed. Further in this study, the test approach used by DEICO for HIL is discussed in detail.

This paper presents a numerical impedancemeter which allows the electric impedance of a piezoelectric transducer Z(f) to be estimated both in real time and in situ. Authors’ method is based on SOPC and hardware in the loop (HIL) techniques. The system comprises two principal modules: a direct digital synthesizer (DDS) and a chain actuator with a numerical resistive network and a transducer. Feedback control of the excitation voltage is carried out by regulating the resistive network. Z(f) modulus is estimated from the values obtained by the resistive network during a fast frequential sweep. The analogical part is modeled by using Matlab SimPower Syst and the numerical architecture is built by DSP Builder. The architecture is then implemented in a FPGA Stratix II board and validated by HIL simulation, in which the transducer is modeled by a Butterworth van Dycke structure. The system is tested within the bandwidth 1.8 MHz - 2.8 MHz with a 20 mm square transducer resonant at 2 MHz. We have determined all the relations which allow the parameters of the numerical functions to be set. The parameters take into account the range of excitation, the quality factor of the transducer and the resolution, speed and duration of the analysis. The results show how accurate Z(f) estimation is and the duration of the analysis, which does not exceed 10 ms.

Hardware in the loop simulation for homing missiles

Aiming at the problem that Hardware-In-The-Loop (HITL) simulation still relies on the medium in process industry, this paper designs a new kind of HITL simulation system in which there is no medium and controllers are simulation software, introduces the constitution of the simulation system, studies the key technology both for simulation software and communication design in the no-medium HITL Simulation. There is a full application in the HITL simulation system with the boiler of process industry as the typical target. The practical result shows: the method for No-Medium HITL Simulation is feasible, and completely satisfies practice request. It not only reduces cost of constitution and maintenance, but also has the characteristic of green and environmental protection.

The aim of this paper is to demonstrate the capabilities and potential of a Hardware-In-the-Loop (HIL) simulator for the tuning of closed-loop control strategies used in flexible-links mechanisms. HIL is an increasingly popular methodology used in reducing the design and validation time of complex systems. This approach makes use of a software-programmed hardware prototype of the device under test, which is able to interact with other hardware devices and real-world signals. In this paper a validation of the proposed simulator, named FLiMHILS (Flexible Link Mechanisms HIL Simulator), will be obtained by comparing the dynamic behavior of a real single-link mechanism with the corresponding response of the simulator subject to the same stimuli and controller parameters. The experimental results show how the tuning parameters obtained with the HIL simulator can be successfully used to control the real mechanism. The real-time capable model which constitutes the core of the HIL simulator is a highly accurate FEM-based nonlinear model capable of describing with consistency the dynamics of different planar mechanisms with flexible links.

Hardware in the loop (HIL) simulation, especially power HIL (PHIL) simulation, is a promising tool for motor drive design and prototyping. It inherits both the flexibility of simulation and the authenticity of hardware itself, which therefore allow an actual motor drive design to be thoroughly scrutinized under almost any conceivable condition. In this paper, a unique 5 MW PHIL simulation facility which is in its last stage of commissioning in the Center for Advanced Power Systems (CAPS) is introduced. An illustrative PHIL simulation example based on a similar but downscaled 50 kW test bed is performed. Interesting results very well demonstrates how a PHIL simulation on a motor drive system can expose the hidden problems that are difficult to be identified by other testing methods.

This work describes the practical implementation of two maximum power point tracking (MPPT) algorithms, namely those of perturb and observe, and extremum seeking control. The proprietary dSPACE system is used to perform hardware in the loop (HIL) simulation whereby the two control algorithms are implemented using the MATLAB/Simulink (Mathworks, Natick, MA) software environment in order to control a synchronous buck–boost converter connected to two commercial thermoelectric modules. The process of performing HIL simulation using dSPACE is discussed, and a comparison between experimental and simulated results is highlighted. The experimental results demonstrate the validity of the two MPPT algorithms, and in conclusion the benefits and limitations of real-time implementation of MPPT controllers using dSPACE are discussed.

This article shows how a hardware in the loop (HIL) simulation can be formulated in such a way that the quality of the simulation can be assessed by evaluating the total energy residual (TER). The validity of this approach was checked with the standard co-simulation to show that TER can be used to compare non-iterative Jacobi and Gauss-Seidel co-simulation masters. The given example with the known global error shows that the value of TER can correctly determine which of the co-simulation masters is better. In the experimental part of the article, the example of a HIL simulation with an engine test bench in the loop is presented. The experiments show that such a quality assessment approach can be used to determine the speed controller parameters for the engine test bench.