Accurate communication cost estimation in static task scheduling

Static task scheduling in distributed computing systems is a very complex problem and known to be NP-hard. This problem is even harder when the module execution times become probabilistic. In this paper we study the effect of probabilistic module execution times on the performance of task-scheduling algorithms. We show that in static task scheduling, for probabilistic module execution times, and in the existence of some factors there is no need to use an expensive task-scheduling algorithm. Given any two static task-scheduling algorithms that use deterministic module execution times in assigning task modules to the distributed system, the performance of these two algorithms will not remain the same when these module execution times become probabilistic rather than deterministic. We also study the effects of some factors an our results.

Inline expansion is very important for high performance VLIW, especially for microprocessors with static scheduling. Optimizations in optimizing compilers for VLIW duplicate code aggressively and lead to long compile time. Our inlining algorithm is based on heuristics that takes into account compile time explicitly. This made optimization more balanced and significantly reduced code growth and compile time compared to common inlining approach based on minimization of runtime within constraints. Instead of using hard constraints we are trading run time for compilation time in some proportion. Our heuristics predicts several key optimizations in evaluation of runtime and compile time: code scheduling, global copy propagation, dead code elimination and different loop optimizations. Optimizations prediction reduces the need in profile information which is rarely available in practice. Our implementation of inlining includes cloning, partial inlining and inlining across compilation modules in whole program mode. All this factors make dramatic impact on performance: our inlining implementation in the Elbrus optimizing compiler boost SPEC CPU2006 benchmark performance by factor of 1.41 at the cost of 12% increase of compile time and 7.7% increase of code size on average.

Executing complicated computations in parallel increases the speed of computing and brings user delight to the system. Decomposing the program into several small programs and running multiple parallel processors are modeled by Directed Acyclic Graph. Scheduling nodes to execute this task graph is an important problem that will speed up computations. Since task scheduling in this graph belongs to NP-hard problems, various algorithms were developed for node scheduling to contribute to quality service delivery. The present study brought a heuristic algorithm named looking ahead sequencing algorithm (LASA) to cope with static scheduling in heterogeneous distributed computing systems with the intention of minimizing the schedule length of the user application. In the algorithm proposed here, looking ahead is considered as a criterion for prioritizing tasks. Also, a property called Emphasized Processor has been added to the algorithm to emphasize the task execution on a particular processor. The effectiveness of the algorithm was shown on few workflow type applications and the results of the algorithm implementation were compared with two more heuristic and meta-heuristic algorithms.

The problem of allocating and scheduling real-time tasks, with precedence constraints and communication costs on a multiprocessor architecture in order to meet the timing constraints is known to be NP-complete. Due to the growing complexity of real-time applications there is a need to find scheduling methods that can handle large task sets in a reasonable time. Also, scheduling methods should consider precedence and exclusion relations in order to support parallelism within tasks and to resolve mutual exclusion situations. In this paper four heuristic scheduling algorithms are developed and evaluated. In particular clustering vs. non-clustering techniques are investigated with some interesting results.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

In an attempt to determine if the IBM PL/I (F) programming language could be used effectively in the solution of scientific problems the following questions were raised. Is the compiler relatively error free? Are there great difficulties in training? Will the programmer who is knowledgeable in other higher languages use PL/I? Will PL/I eliminate the need for assembler language? What are the relative efficiencies of PL/I in compile and execution times as compared with Fortran IV (II)?The answers to these questions were quite favorable to PL/I except the last. It was found that PL/I compilation times were roughly twice the Fortran compilation times. The PL/I execution times of various applications ranged from 1.3 to 4.0 times the corresponding Fortran execution times. For the present, applications which use special features of PL/I will be done in PL/I but most problem solving will still be done in Fortran.

Models for energy-efficient static scheduling of parallelizable tasks with deadlines on frequency-scalable parallel machines comprise moldable vs. malleable tasks and continuous vs. discrete frequency levels, plus preemptive vs. non-preemptive task execution with or without task migration. We investigate the tradeoff between scheduling time and energy efficiency when going from continuous to discrete core allocation and frequency levels on a multicore processor, and from preemptive to non-preemptive task execution. To this end, we present a tool to convert a schedule computed for malleable tasks on machines with continuous frequency scaling [Sanders and Speck, Euro-Par (2012)] into one for moldable tasks on a machine with discrete frequency levels. We compare the energy efficiency of the converted schedule to the energy consumed by a schedule produced by the integrated crown scheduler [Melot et al., ACM TACO (2015)] for moldable tasks and a machine with discrete frequency levels. Our experiments with synthetic and application-based task sets indicate that the converted Sanders Speck schedules, while computed faster, consume more energy on average than crown schedules. Surprisingly, it is not the step from malleable to moldable tasks that is responsible but the step from continuous to discrete frequency levels. One-time frequency scaling during a task’s execution can compensate for most of the energy overhead caused by frequency discretization.

Optimizing resource allocation and routing to satisfy service needs is paramount in large-scale networks. Software-defined networking (SDN) is a new network paradigm that decouples forwarding and control, enabling dynamic management and configuration through programming, which provides the possibility for deploying intelligent control algorithms (such as deep reinforcement learning algorithms) to solve network routing optimization problems in the network. Although these intelligent-based network routing optimization schemes can capture network state characteristics, they are prone to falling into local optima, resulting in poor convergence performance. In order to address this issue, this paper proposes an African Vulture Routing Optimization (AVRO) algorithm for achieving SDN routing optimization. AVRO is based on the African Vulture Optimization Algorithm (AVOA), a population-based metaheuristic intelligent optimization algorithm with global optimization ability and fast convergence speed advantages. First, we improve the population initialization method of the AVOA algorithm according to the characteristics of the network routing problem to enhance the algorithm’s perception capability towards network topology. Subsequently, we add an optimization phase to strengthen the development of the AVOA algorithm and achieve stable convergence effects. Finally, we model the network environment, define the network optimization objective, and perform comparative experiments with the baseline algorithms. The experimental results demonstrate that the routing algorithm has better network awareness, with a performance improvement of 16.9% compared to deep reinforcement learning algorithms and 71.8% compared to traditional routing schemes.

Depending on the granularity of the different parts of a program we have low and high level spreading for fine and coarse grain program modules respectively. Most instances of the spreading problem are NP-Complete [GaJo79]. In this chapter we discuss optimal solutions for some instances of high level spreading, and efficient heuristics for the intractable cases.

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This paper is concerned with scheduling when the data are not fully known before the execution. In that case computing a complete schedule off-line with estimated data may lead to poor perfor- mances. Some flexibility must be added to the scheduling process. We propose to start from a partial schedule and to postpone the complete scheduling until execution, thus introducing what we call a stabilization scheme. This is applied to the m machine problem with communication delays: in our model an estimation of the delay is known at compile time; but disturbances due to network contention, link failures, ... may occur at execution time. Hence the processor assignment and a partial sequencing on each processor are determined off-line. Some theoretical results for tree-like precedence constraints and an experimental study show the interest of this approach compared with fully on-line sched- uling.

This paper considers the problem of scheduling tasks on multiprocessors. Two tasks linked by a precedence constraint and executed by two different processors must communicate. The resulting delay depends on the tasks and on the processor network. In our model an estimation of the delay is known at compile time; but disturbances due to network contention, link failures,... may occur at execution time. Algorithms computing separately the processor assignment and the sequencing on each processor are considered. We propose a partially on-line scheduling algorithm based on critical paths to cope with the possible disturbances. Some theoretical results and an experimental study show the interest of this approach compared with fully on-line scheduling.KeywordsCritical PathPrecedence ConstraintTask GraphCommunication DelayList ScheduleThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Improved ant colony-based multi-constrained QoS energy-saving routing and throughput optimization in wireless Ad-hoc networks

A methodology for static and dynamic scheduling of automation tasks in reconfigurable production systems

As SystemC gains popularity as a modeling language of choice for system-on-chip (SOC) designs, heterogeneous modeling in SystemC and efficient simulation become increasingly important. However, in the current reference implementation, all SystemC models are simulated through a non-deterministic Discrete-Event simulation kernel, which schedules events at run-time. This sometimes results in too many delta cycles hindering the simulation performance of the model. The SystemC language also seems to target this simulation kernel as the target simulation engine. This makes it difficult to express different Models Of Computation naturally in SystemC. In an SOC model, different components may need to be naturally expressible in different Models Of Computations. Some of these components may be amenable to static scheduling based simulation or other pre-simulation optimization techniques. Our goal is to create a simulation framework for heterogeneous SystemC models, to gain efficiency and ease of use within the framework of SystemC reference implementation. In this paper, we focus on Synchronous Data Flow (SDF) models, where the rates of data produced and consumed by a data flow node/block are known a priori. In digital signal processing (DSP) applications where relative sample rates are specified for each DSP component, such models are quite common. Compile time knowledge of these rates allow the use of static scheduling resulting in significant improvement in simulation efficiency. We describe an alternate SystemC kernel that exploits such static scheduling of SDF models. Our experiments show improvement in simulation time over the original models and over the latest efficiency results from [20].

When the traditional heterogeneous multi-core scheduling algorithm performs tasks with high resource density, a large amount of idle time often occurs on the processor core. Therefore, based on the environment of heterogeneous multi-core processors, this paper studies the static heuristic table scheduling algorithm, and proposes an optimization approach for the problem of single priority assignment and too simple task assignment. We design optimization in the static heuristic scheduling algorithm list generation phase and task allocation phase, and propose a hybrid task allocation method with three strategies to improve the standby time utilization of processor core. Then, DVFS technology is used to optimize the scheduling results, so that the task can run with lower energy consumption without increasing makespan. Finally, the new algorithm is compared with three traditional scheduling algorithms through design experiments, and it is proved that the new algorithm has better performance when executing more tasks.