Active gate charge control strategy for series-connected IGBTs

Active clamping circuits can effectively suppress the voltage imbalance between series-connected insulated-gate bipolar transistors (IGBTs). However, while the active clamping circuit is conducting, extra current is injected into the gate of the IGBT, the gate voltage increases, and the IGBT operates in the active region. Therefore, long time conduction and frequent actions of the active clamping circuit will lead to extremely high switching loss of the IGBT with high collector-emitter voltage and serious switching loss imbalance between the series-connected IGBTs, which imperils the efficiency and safety of the system, particularly in the applications of high-voltage IGBT (HV-IGBT) series connection. In this paper, a novel active clamping circuit with status feedback is proposed for series-connected HV-IGBTs. A high-speed status feedback subcircuit is designed for transforming the operation status of an active clamping circuit into optical signal and feeding it back to the control system. According to the feedback signals, the microcontroller regulates the switching-on time and switching-off time of the series-connected HV-IGBTs' drive signals timely in order to implement voltage balancing and, thus, to restrain the actions of active clamping circuits. By applying this voltage balancing method to the HV-IGBT series connection circuit, the voltage balancing performance is expected to improve, and high switching loss and serious switching loss imbalance are expected to be suppressed. Experimental results verify the validity and superiorities of the proposed voltage balancing circuit and control strategy.

The increase of the switching speed in power semiconductors leads to converters with better efficiency and high power density. On the other hand, fast switching generates some consequences like overshoots and higher switching transient, which provoke electromagnetic interference (EMI). This paper proposes a new closed-loop gate driver to improve switching trajectory in insulated gate bipolar transistors (IGBTs) at the hard switching condition. The proposed closed-loop gate driver is based on an active gate voltage control method, which deals with emitter voltage (VEe) for controlling diC/dt and gets feedback from the output voltage (vCE) in order to control dvCE/dt. The sampled voltage signals modify the profile of the applied gate voltage (vgg). As a result, the desired gate driver (GD) improves the switching transients with minimum switching loss. The operation principle and implementation of the controller in the GD are thoroughly described. It can be observed that the new GD controls both dvCE/dt and diC/dt accurately independent of the variable parameters. The new control method is verified by experimental results. As a current issue, the known trade-off between switching losses and EMI is improved by this simple and effective control method.

The effect of the gate drive on the power-processing capacity of a hard-switched insulated-gate bipolar transistor (IGBT) in a bridge leg is investigated in this article. The performance of two active gate drive (AGD) techniques [variable ramp (VR) and push-pull (PP)] is compared against a conventional two-level [fast gate drive (FGD)] gate drive method. The two proposed techniques reduce the voltage overshoot, which allows the dc-bus voltage to be increased closer to the IGBT voltage rating, improving the utilization of the device's blocking voltage. Consequently, the safe operating area of the IGBT is extended without exceeding the thermal limit of the device (limited by the maximum junction temperature). An experimental method, the first of its kind in the literature, is developed to determine whether using these AGDs can lead to an increase in the power that the IGBT can process. This article reveals that the PP-AGD technique can increase the IGBT power throughput by approximately 5%-8% across a range of switching frequencies. This better IGBT utilization allows a given device to process more power or may allow the designer to choose lower power rated devices potentially leading to higher converter power density.

The series connection of silicon carbide (SiC) MOSFETs and the cascaded system allows operating at a higher voltage than the rated voltage of devices. However, the unbalancing voltage problem occurs in the series-connected devices. The main reason for the unbalancing voltage problem is the parasitic capacitance of the device's gate to the ground. There are several methods for balancing the series-connected device voltage. The snubber circuits, active clamp circuits and the active gate driver. In this paper, the active gate driver method is proposed to control the unbalanced device voltage. Also, the device voltage sensing circuit and the feedback controller are designed in detail. Finally, the proposed active gate driver is verified with the simulation.

This paper addresses the issues of switching behavior of a high power insulated gate bipolar transistor (IGBT) that works in hard switching conditions. First, the voltage and current switching waveforms of IGBT modules are described for an IGBT phase-leg module with an inductive load, and the associated switching losses, reverse recovery current of free-wheeling diodes, voltage overshoot, and EMI noise are analyzed. Based on the analysis, an actively controlled gate drive circuit is proposed, which provides optimization of the fast driving for low switching losses and short switching time, and slow driving for low noise and switching stress. Compared to a conventional gate drive strategy, the proposed active gate driver (AGD) has the capability of reducing the switching losses, delay time, and Miller plateau duration effectively during both turn-on and turn-off transient. Experimental results verify the validity and effectiveness of the proposed gate driving method.

The insulated gate bipolar transistor (IGBT) is a minority-carrier device with large bipolar current-carrying capability and high input impedance. The IGBT has been used in many applications in power electronics. In this study, pressureless sintering of nanosilver paste has been studied for bonding large area power chips, e.g., 12 kV 100 A IGBT applications. The sintering temperature was reduced to 250 °C for only 10 min. The heating rate was adjusted to 5 °C/min. Void ratio in the bond-line before and after sintering was analyzed by X-ray transmission. It was found that the void ratio before sintering was successfully controlled below 1% of the joint area. X-ray images also showed that the void ratio was lower than 2% after sintering. Such low void ratio should have almost no impact on the thermal and electric properties of the pressureless sintered nanosilver joint. The more the voids before sintering, the more the formation of voids after sintering. Die-shear tests were also performed for the 10 mm × 10 mm sintered joints of bonding dummy dies and substrates at a shear speed of 4 × 10−4 ms−1 at room temperature. Results showed that average shear strength of higher than 40 MPa could be obtained for the pressureless sintered joints. Fracture surfaces of the sintered nanosilver joints were observed by scanning electron microscopy (SEM). SEM images showed that significant plastic flow occurred in the sheared joint because of the presence of dimples and the fracture of the sheared silver joint was a cohesive failure.

This paper presents the use of an Active Voltage Control (AVC) technique for balancing the voltages in a series connection of Insulated Gate Bipolar Transistors (IGBTs). The AVC technique can control the switching trajectory of an IGBT according to a pre-set reference signal. In series connections, every series connected IGBT follows the reference and so that the dynamic voltage sharing is achieved. For the static voltage balancing, a temporary clamp technique is introduced. The temporary clamp technique clamps the collector-emitter voltage of all the series connected IGBTs at the ideal voltage so that the IGBTs will share the voltage evenly.

The trend in power electronic applications is to reach higher power density and higher efficiency. Currently, the wide band-gap devices such as silicon carbide MOSFET (SiC MOSFET) are of great interest because they can work at higher switching frequency with low losses. The increase of the switching speed in power devices leads to high power density systems. However, this can generate problems such as overshoots, oscillations, additional losses, and electromagnetic interference (EMI). In this paper, a novel active gate driver (AGD) for improving the SiC MOSFET switching trajectory with high performance is presented. The AGD is an open-loop control system and its principle is based on gate energy decrease with a gate resistance increment during the Miller plateau effect on gate–source voltage. The proposed AGD has been designed and validated through experimental tests for high-frequency operation. Moreover, an EMI discussion and a performance analysis were realized for the AGD. The results show that the AGD can reduce the overshoots, oscillations, and losses without compromising the EMI. In addition, the AGD can control the turn-on and turn-off transitions separately, and it is suitable for working with asymmetrical supplies required by SiC MOSFETs.

This article shows both theoretical and experimental analyses of a fully integrated CMOS active gate driver (AGD) developed to control the high dv/dt of GaN transistors for both 48 and 400 V applications. To mitigate negative effects in the high-frequency spectrum emission, an original technique is proposed to reduce the dv/dt with lower switching losses compared to classical solutions. The AGD technique is based on a subnanosecond delay feedback loop, which reduces the gate current only during the dv/dt sequence of the switching transients. Hence, the dv/dt and di/dt can be actively controlled separately, and the tradeoff between the dv/dt and EON switching energy is optimized. Since GaN transistors have typical voltage switching times on the order of a few nanoseconds, introducing a feedback loop from the high voltage drain to the gate terminal is quite challenging. In this article, we successfully demonstrate the active gate driving of GaN transistors for both 48 and 400 V applications, with initial open-loop voltage switching times of 3 ns, due to a full CMOS integration. Other methods for dv/dt active control are further discussed. The limits of these methods are explained based on both experimental and simulation results. The AGD showed a clear reduction in the peak dv/dt from -175 to -120 V/ns for the 400 V application.

High power insulated gate bipolar transistors (IGBTs) are integral to modern power conversion systems across railway traction, renewable energy, and HVDC transmission. Traditional gate drivers offer limited adaptability under dynamic conditions, leading to increased switching losses and reduced reliability. This paper proposes a novel current source based active gate driver (CS-AGD) tailored for high-power IGBT modules, enabling dynamic control of transient switching characteristics. We design and prototype a CS-AGD circuit, integrate it within a wide-range double-pulse test platform, and experimentally validate its performance under voltages up to 1000 V and currents up to 600 A. Results demonstrate significant reductions in switching losses and peak voltage/current overshoots compared to conventional gate driving strategies. The proposed solution offers enhanced controllability, opening new pathways for reliability- optimized and high-efficiency power electronic systems.

Application of IGBTs (insulated gate bipolar transistors) to high voltage power electronics systems is today becoming an attractive solution because of low cost and low complexity. Semiconductor manufacturers are making efforts to design chips with higher blocking voltages, but for reliability and cost purposes, an easier solution today would be to use standard IGBTs. This paper describes the behaviour of 3.3 kV, 100 A chips connected in series and driven with an active gate control circuit which balances the voltage during both static and dynamic phase. The first part of the article presents the theoretical description of the principle and some design recommendations. The second part contains experimental results. These tests demonstrated that it is possible to safely turn off two times the nominal current under 4 kV DC link voltage. Finally, short-circuit turn-off has been also successfully tested, showing a good balancing of the overvoltages, even under such emergency conditions.

The power insulated gate bipolar transistor (IGBT) is used in many types of applications. Although the use of the power IGBT has been well characterized for many continuous operation power electronics applications, little published information is available regarding the performance of a given IGBT under pulsed power conditions. Additionally, component libraries in circuit simulation software packages have a finite number of IGBTs. This paper presents a process for characterizing the performance of a given power IGBT under pulsed power conditions. Specifically, signals up to 4.5 kV and 1 kA with approximately a 5 ¿s pulse width will be applied to a given IGBT. This process utilizes curve fitting techniques with collected data to determine values for a set of modeling parameters. These parameters are used in the Oziemkiewicz implementation of the Hefner model for the IGBT that is utilized in some circuit simulation software packages. After the nominal parameter values are determined, they can be inserted into the Oziemkiewicz implementation to simulate a given IGBT.

The safe operating condition for the vacuum tubes is very important and critical since they are very expensive and delicate. Providing limited short circuit energy for the vacuum tube and fast transferring from the short circuit to the nominal operation state are absolutely necessary. Extant protection strategies threat the availability of the vacuum tubes. In addition, they cannot completely protect the tube due to the delay of the fault detection system. This article proposes a high voltage (HV) short circuit fault current limiter which can limit the short circuit energy of the system inherently. The proposed structure activates automatically when the current exceeds the predetermined value. Hence, the need for the fault detection unit is minimized. The proposed short circuit fault current limiter is based on the series insulated gate bipolar transistors (IGBTs). Due to the interesting current limiting feature of the IGBTs, the short circuit current is limited for a definite time. During this time interval, the vacuum arc interrupts and the tube can operate instantaneously. In order to provide a safe operating condition of the series-connected IGBTs in the short circuit fault, several external circuits are suggested. The proper operation of the proposed short circuit fault current limiter is evaluated using simulations and experimental prototyping.

With the development of insulated gate bipolar transistor (IGBT) and pulsewidth modulation control strategy, the voltage source converter (VSC) is getting more and more popular, which can be used in high-voltage frequency converter, VSC-HVDC, FACTS, and custom power. In high voltage and high power applications, serial connection of IGBTs is a good solution to overcome the voltage limitation of the single IGBT. However, for using IGBTs in this way, a comprehensive range of issues need to be addressed, especially the static and dynamic voltage-sharing of each IGBT module. This paper presents the theoretical and practical study on how to use serial-connected IGBTs in a VSC, including adaptive dynamic voltage-balance strategy, voltage-balance circuit, power supply system, and valve vase electronics. A three-phase two-level VSC consisted of 6 arms multiplied by 12 serial-connected 3300 V IGBT modules is also developed. To test the performance of the VSC, pulse test of the one arm and inverter operation test of the whole VSC are carried out. The experimental results show that the maximum voltage imbalance is about 10%, the voltage shoots are less than 12%; and the VSC works stably, which indicates a solid foundation for industrial application.

A practical and accurate parameter extraction method is presented for the Fourier-based-solution physics-based insulated gate bipolar transistor (IGBT) and power diode models. The goal is to obtain a model accurate enough to allow switching loss prediction under a variety of operating conditions. In the first step of the extraction procedure, only one simple clamped inductive load test is needed for the extraction of the six parameters required for the diode model and of the 12 and 15 parameters required for the nonpunch-through (NPT) and punch-through (PT) IGBT models, respectively. The second part of the extraction procedure is an automated formal optimization step that refines the parameter estimation. Validation with experimental results from various structures of IGBT demonstrates the accuracy of the proposed IGBT and diode models and the robustness of the parameter extraction method.