An automated design flow for image processing filter in embedded systems

The MATLAB M language provides constructs for the simple representation of functions, and has been used extensively for algorithm development and verification in embedded system design. The M language processes entire arrays simultaneously, and it is expected that design based on M can be implemented faster and with the same or higher quality as compared with design based on other languages. This paper presents a case study of a design of a filter for signal processing using M-based design flow. The results of the case study demonstrate the high efficiency of the M-based design flow as compared to traditional functional modeling and manual coding using a hardware description language.

Chapter 28 - Case studies in design

In water quality management, pollution control strategies have been sought to accord with the assimilative capacity of water bodies so as to preserve water quality. The waste load allocation (WLA) is a useful approach to determine the allowable loading of pollution sources in water quality management. For any WLA, a particular water body condition is needed as a basic scenario under which the relevant parameters are fixed. The particular flow rate is known as design flow and usually set at low flow in order to be protective. The design flow is traditionally a particular deterministic value, such as Q (75), implying that it is expected that the probability of water quality violation is 25% in the long run. However, this long-term expectation might not be realized in individual years due to variability of natural flow. The flow variability will make a WLA plan overoptimistic or over-conservative in different years, suggesting that the deterministic design flow without uncertainty consideration might lead to an ineffective or inefficient decision-making. To address the problem, we explicate the relationship between flow variability, design flow and water quality with different flow distributions to facilitate the understanding of the process of a WLA. In order to manifest the uncertainty effects of design flow, the results from the annual flow duration curve (AFDC) is compared with the conventional flow duration curve (FDC). The AFDC approach is capable of obtaining the uncertainty level of the design flow by generating the confidence interval rather than a fixed value. The effect of different record lengths on design flow determination is estimated as well. Finally, a refined WLA process is proposed with a re-examination of water quality violation to improve the allocation decision under uncertainty. TaHan River Basin in northern Taiwan is used as a case study.

CA-MPSoC: An automated design flow for predictable multi-processor architectures for multiple applications

A case study in interface design The CHI'89 Information Kiosk

Special Issue on Networks-on-Chips: Design Flows and Case Studies

Chip reliability becomes a great threat to the design of future microelectronic systems with the continuation of the progressive downscaling of CMOS technologies. Hence increasing the robustness of chip implementations in terms of error tolerance becomes an important issue. In this paper we present a case study in reliability-aware design tolerating transient errors. A state-of-the-art WiMAX channel decoder for LDPC codes is investigated on all design levels to increase its reliability for a given system performance with minimum hardware overhead. We show that an efficient exploitation of the algorithmic fault-tolerance yields a fairly small area overhead with nearly no degradation in communications performance even under high error injection rates.

Although originally motivated by applications such as image processing, multidimensional (nD) systems have mainly attracted the attention of the research community due to the richness of new theoretical questions raised by their treatment, and are often replaced by other settings when it comes to modelling, identifying and controlling processes in practical situations. The aim of this special issue is to illustrate the application potential of nD systems by presenting several contributions where the nD framework is successfully used either to deal with practical problems or to solve practically relevant questions that arise in other contexts that are not at first sight related to multidimensional systems. In the paper Multidimensional Control Systems: Case Studies in Design and Evaluation, by Rogers et al., after introducing the most commonly used models for the analysis and control of discrete nD linear systems, a series of case studies is presented with the aim of demonstrating the advantages of the nD systems approach in solving certain control problems. Namely, applications in the fields of sensor grid networks, iterative learning control, civil engineering and agriculture are considered. The paper Two-dimensional Generalized Predictive Control (2D-GPC) Scheme for the Batch Processes with Two-dimensional (2D)Dynamics, Shi et al. studies the problem of iterative learning control (ILC) design for batch processes. Based on 2Dcontrolled auto-regressive moving average (2D-CARMA) model, a novel two-dimensional generalized predictive control (2D-GPC) is proposed. The feasibility and effectiveness of the proposed method is validated by the experimental results on packing pressure control of the injection molding process.

Case study in design and transient analysis of hydrogen-propelled aircraft using direct combustion

This paper summarizes various aspects of identifying and using biological analogies in engineering design. To avoid the immense as well as potentially biased task of creating a database specifically for this purpose, the chosen approach searches biological knowledge in natural language format, e.g., books, papers, etc., for instances of functional keywords describing the engineering problem. Strategies developed to facilitate this search as well how text descriptions of biological phenomena were used in problem solving are summarized. Case studies in design for remanufacture and microassembly are used to provide an overview of the method.

Performance evaluation of collaboration in the design process: Using interoperability measurement

With continuing progress in VLSI and ASIC technologies, digital signal processing (DSP) algorithms have continued to find great use in increasingly wide application areas. DSP has gained popularity also in embedded systems although these systems set challenging constraints for implementations. Embedded systems contain limited resources, thus embedded DSP systems must balance tradeoffs between the requirements on computational power and computational resources. Energy efficiency has been important in batterypowered devices, but nowadays also the limited heat dissipation in small devices calls for low-power consumption. Successful implementation of DSP applications in embedded systems requires tailoring, which in turn sets challenges for design methodologies. For this special issue, we received 14 submissions and a collection of seven papers was finally accepted. The special issue is opened by “Observations on power-efficiency trends in mobile communication devices,” where the authors O. Silven and K. Jyrkka analyze the power consumption in the current mobile communication devices. Several bottlenecks in the current implementation style have been identified, thus the paper provides a good motivation for the following papers. In “The Sandbridge SB3011 platform,” the authors John Glossner et al. describe a system-on-a-chip (SoC) multiprocessor targeted as a software-defined radio platform. The platform provides solutions to the challenges in future mobile devices given in the previous paper. “A shared memory module for asynchronous arrays of processors” authored byMichael J. Meeuwsen et al. considers also chip multiprocessors. The presented shared memory module can be used for interprocess communication or to increase application performance by parallelizing computation. In “Implementing a WLAN video terminal using UML and fully automated design flow” by Petri Kukkala et al., an automated design flow for multiprocessor SoC is presented. The flow is based on UML descriptions and the authors demonstrate their design flow with a design case. Programming of chip multiprocessor platforms is considered in “pn: a tool for improved derivation of process networks” by Sven Verdoolaege et al. The paper discusses conversion of sequential programs to process networks allowing optimization of communication channels and buffers. In “A SystemC-based design methodology for digital signal processing systems,” the authors Christian Haubelt et al. describe a design flow for SoC designs containing automatic design space exploration, performance evaluation, and automatic platform-based system generation. The design flow is based on SystemC descriptions and the presented tools can automatically detect the underlying model of computation. Application-specific implementations are often used to speedup certain DSP tasks in embedded systems. In “Priority-based heading one detector in H.264/AVC decoding,” the authors Ke Xu et al. consider such implementations to speed up video decoding applications. The authors present a low-power decoder implementation for context-adaptive variable length coding defined in H.264 standard.

Chapter 7 - Case Studies in Modulus-Limited Design

A case study for the design of switched-current filters is presented. While the emphasis is on the step-by-step numerical design of a video filter, the design flow is applicable to any switched-current filter. The chosen design example is a low pass elliptic ladder filter with the following specification: passband 0.5 dB equiripple, stop-band attenuation > 30 dB, –3 dB frequency of 8 MHz, sampling frequency of 80 MHz, signal-to-noise ratio of 60 dB. All aspects of the design are covered from filter specification, through filter synthesis, circuit definition and finally transistor sizing for CMOS implementation.

Digital integrated circuits or intellectual property (IP) cores are widely used as computation engines or processors (application-specific and/or hardware accelerators) in sophisticated electronics products such as smartphones, cameras, camcorders, set-top boxes, smart watches, etc. Recently there has been a paradigm shift from the conventional IC/IP design flow to a secured IC/IP design flow that considers security awareness during the design process. Security awareness during the design process includes considering preventive/detective control measures while synthesizing an IC/IP. Security aware design flow is specifically important in this modern era of global design supply chain where trustworthiness of IC/IP has become a serious problem giving rise to hardware threats such as piracy, backdoor Trojan insertion, etc. This chapter will provide a discussion on some of the latest hardware security and IC/IP core protection methodologies integrated within the high-level synthesis design flow, such as structural obfuscation, functional obfuscation and hardware watermarking, including some case study analyses on DSP applications.