• Home
  • Search
  • Analysis of Cache Memory Circuit for Compute In Memory Applications
  • Cite Icon1
  • https://doi.org/10.1109/icspc57692.2023.10125285Copy DOI Icon

Analysis of Cache Memory Circuit for Compute In Memory Applications

  • Mar 23, 2023
  • A Trephena Patricia +2 more
Show More
  • Abstract
  • Literature Map
  • References
  • Citations
  • Similar Papers
Abstract

The rapid development of Artificial Intelligence computations requires efficient SRAMs for Compute In Memory (CIM) implementations. SRAM cells are all that exists in cache memory because that is how cache memory is implemented. The major advantage of in-memory applications is that they can access data much speeder than conventional applications which rely on disk-based storage. Among the cells in SOC, only 15 –20% of cells are functional cells. The remaining cells are memory cells. As the need for frequently accessing the memory for the CIM emerges, the stability of accessing the data in SRAM is in demand. Static Noise margin analyses are commonly employed to access the stability of SRAM. Rechargeable applications require fewer voltages, endangering the stability of memory. The analysis of SRAM with respect to stability checking is performed for CIM applications. The applications of CIM precisely exist in the hardware implementation of deep learning structures.

Cactus Communications logo

Copyright 2026 Cactus Communications. All rights reserved.