ATLAS toward the High Luminosity era: challenges on electronic systems

The design of a radiation-hardened electronic system is in many ways no different from the design of electronic systems which must perform correctly while exposed to the more standard environments, such as temperature, vibration, and humidity. The early recognition of shock, vibration, temperature, humidity, and acceleration as environments which would influence electrical performance of the electronic systems has resulted in a thorough understanding of how to design against these environments. The reader familiar with electronic design in the more standard environments should endeavor to apply good design techniques from these environments to that of nuclear radiation, when the techniques seem applicable. This is seldom possible, since the radiation environment is in most ways quite unique, though there are instances where the approach can be used. For example, the design of electronics for operation in high temperatures (100 to 600°C) will also result in an electronic system which can withstand large integrated particle doses without degradation. The application of failure probability analysis, which is quite common for the more standard environments, has been generally neglected in work associated with the nuclear radiation environment. The importance of the failure probability analysis cannot be stressed enough. The single or few test sample determinations of component radiation sensitivity may be adequate early in the design cycle of a particular electronic system. However, toward the end of the design cycle, large test sample determination is a must in order to establish high confidence in the component selection for production units of the electronic system.

The Voxel Imaging PET (VIP) Pathfinder project intends to show the advantages of using pixelated solid-state technology for nuclear medicine applications. It proposes designs for Positron Emission Tomography (PET), Positron Emission Mammography (PEM) and Compton gamma camera detectors with a large number of signal channels (of the order of 106). For Compton camera, especially with a large number of readout channels, image reconstruction presents a big challenge. In this work, results are presented for the List-Mode Ordered Subset Expectation Maximization (LM-OSEM) image reconstruction algorithm on simulated data with the VIP Compton camera design. For the simulation, all realistic contributions to the spatial resolution are taken into account, including the Doppler broadening effect. The results show that even with a straightforward implementation of LM-OSEM, good images can be obtained for the proposed Compton camera design. Results are shown for various phantoms, including extended sources and with a distance between the field of view and the first detector plane equal to 100 mm which corresponds to a realistic nuclear medicine environment.

The desire to design systems right the first time and to produce designs that are readily manufacturable is a goal passionately pursued by all engineers. Designers of electronic systems are no exception to this rule; the number and sophistication of the computer-aided design tools used daily by chip designers confirm this. Recently, however, designers of larger electronic systems have also been turning to such tools in growing numbers. This article explores how a specific capability, simulation, has contributed to their success.

Simulation studies of tracking systems at very high luminosity

We present details of the design for the CCD readout electronics for the Subaru Telescope Prime Focus Spectrograph (PFS). The spectrograph is comprised of four identical spectrograph modules, each collecting roughly 600 spectra. The spectrograph modules provide simultaneous wavelength coverage over the entire band from 380 nm to 1260 nm through the use of three separate optical channels: blue, red, and near infrared (NIR). A camera in each channel images the multi-object spectra onto a 4k x 4k, 15 um pixel, detector format. The two visible cameras use a pair of Hamamatsu 2k x 4k CCDs with readout provided by custom electronics, while the NIR camera uses a single Teledyne HgCdTe 4k x 4k detector and ASIC Sidecar to read the device. The CCD readout system is a custom design comprised of three electrical subsystems: the Back End Electronics (BEE), the Front End Electronics (FEE), and a Pre-amplifier. The BEE is an off-the-shelf PC104 computer, with an auxiliary Xilinx FPGA module. The computer serves as the main interface to the Subaru messaging hub and controls other peripheral devices associated with the camera, while the FPGA is used to generate the necessary clocks and transfer image data from the CCDs. The FEE board sets clock biases, substrate bias, and CDS offsets. It also monitors bias voltages, offset voltages, power rail voltage, substrate voltage and CCD temperature. The board translates LVDS clock signals to biased clocks and returns digitized analog data via LVDS. Monitoring and control messages are sent from the BEE to the FEE using a standard serial interface. The Pre-amplifier board resides behind the detectors and acts as an interface to the two Hamamatsu CCDs. The Pre-amplifier passes clocks and biases to the CCDs, and analog CCD data is buffered and amplified prior to being returned to the FEE.

The Compact Muon Solenoid (CMS) experiment is operating at the Large Hadron Collider (LHC) with proton–proton collisions at 13-TeV center-of-mass energy and at a bunch spacing of 25 ns. Challenging running conditions for CMS are expected after the High-Luminosity upgrade of the LHC (HL-LHC). We review the CMS ECAL crystal calorimeter upgrade and present results from the first test beam studies. Particular challenges at HL-LHC are the harsh radiation environment, the increasing data rates, and the extreme level of pile-up events, with up to 200 simultaneous proton–proton collisions. Precision timing can be exploited to reduce the effect of the pileup. We report on the timing resolution studies performed with test beams. We discuss the new readout and trigger electronics, which must be upgraded due to the increased trigger and latency requirements at the HL-LHC.

The Large Hadron Collider (LHC) [1] is a two-ring superconducting hadron accelerator and collider located at the European Organization for Nuclear Research (CERN) center at the French-Switzerland border. The LHC is installed in the 27 km tunnel constructed for the Large Electron Positron Collider (LEP) experiment [2] which lies between 45 and 170 m below ground. In 1996, the construction of a 14 TeV LHC was approved [3]. The LEP experiment ran from 1989 to 2000 when it was closed to liberate the tunnel for the LHC. While the LEP experiment collided electrons and positrons, the LHC primarily collides bunches of protons at four interaction points around the ring where four independent experiments are located: ATLAS [4], CMS [5], LHCb [6], and ALICE [7]. ATLAS and CMS are general purpose detectors aiming to run at high luminosities, with peak luminosity of \(L = 2\times 10^{34} \text { cm}^{-2}\text { s}^{-1}\). LHCb is designed to study b-hadrons with peak luminosity of \(L = 2\times 10^{32} \text { cm}^{-2}\text { s}^{-1}\) and ALICE is designed to study heavy ion collisions with peak luminosity of \(L = 2\times 10^{27} \text { cm}^{-2}\text { s}^{-1}\). The LHC complex and the four experiments are shown in Fig. 3.1.

The future of connectivity is wireless and in that context the High Energy Physics (HEP) community is no exception. The volume of data produced at the Large Hadron Collider (LHC) is immense and represent a considerable processing challenge. Moreover the LHC HEP detector environment is one of the most demanding working environments with respect to ultra-low latencies, ultra-high data rate, reliable indoor coverage and harsh radiation environment in the world. Together with the standard requirements to be energy efficient, low cost and secure. Today, the data transmission in HEP experiments is based on wire and optical readout architecture. We propose the use of wireless data transmission described here as a third option. This paper present the motivation and overview of the status of our ASIC development and first ideas for wireless read out and control. In this first phase of development, we will focus on the 60 GHz band, which provide high bandwidth, small form factor and is a mature technology. Open issues and future strategy are also briefly discussed.

The Triple Gas Electron Multiplication (GEM) technology has been adopted for the upgrade of the forward muon detector system at the CMS experiment for the future High-Luminosity phase of the Large Hadron Collider (LHC) at CERN. The GE2/1 subdetector comprises 72 chambers that will be in stalled after the second LHC Long Shutdown. The main goal of these chambers is to improve muon momentum measurements and triggering capabilities in the 1.6 < |η| < 2.4 pseudo-rapidity region. The GE2/1 chambers are segmented in 4 modules with 12 sectors in each module, and each sector is composed of 128 radial strips. The strips are read out by the front-end VFAT3 ASIC. It has 128 channels, each with a charge sensitive preamplifier, shaper and a discriminator. Each module is equipped with the OptoHybrid (OH) board that provides the readout and trigger interfaces for 12 VFAT3 ASICs. The OH board uses CERN designed GigaBit Transceivers (GBT) for the readout path. VFAT3 ASICs also provide trigger information that allows the OH to build trigger clusters using the Xilinx Artix-7 FPGA and to transmit these clusters to the back-end Trigger Processor and to the local Cathode Strip Chamber Trigger Motherboard to improve local trigger efficiency at an early stage of the trigger processing. The back-end electronics will use the ATCA Trigger Processor farm; it will send the data to the Endcap Muon Track Finder and to the CMS DAQ system. In this presentation, we report on progress on the GE2/1 electronics and results from the first demonstrator tests performed at CERN in 2019, and we outline our future design and production plans.

This report presents the results of the work of Russian institutes in the processing of ALICE experiment data during the last 3 years of the operation of the Large Hadron Collider (LHC) including the end of the LHC Run2 and the 1st year of the COVID-19 pandemic. The main problems and tasks facing both ALICE Grid Computing and its Russian segment before the LHC Run3 including the problems of support and modernization of existing resources are considered. Also, plans for the preparation for the operation of the LHC in the HL (High Luminosity) mode are presented.

With the advent of radioactive beams there is a quest for developing novel experimental methods and instruments able to cope with beam characteristics to extract spectroscopic information and to study novel nuclear reaction mechanisms. The tendency is towards Digital Pulse Shape Acquisition since it allows one to fully profit of the information encoded in the detector output response. Even if the convenience of driving the signals over differential pairs to preserve signal integrity in noise environment when long cables are used is evident, there is a lack of digitizing electronics that features a differential input. To this aim we designed, build and qualified an antialiasing module that provides 256 channel antialiasing filter with selectable parameters and differential input to be coupled with the GET – Generic Electronic System for TPCs - backend electronics. The contribution focuses on the board design, layout and performance measured both as a standalone circuit and during on-beam experiments.

We have developed the back-end readout electronics (BEE) for Hyper Suprime-Cam (HSC). HSC is the next generation wide-field camera to be mounted on the 8.2-meter diameter Subaru Telescope in Hawaii. It employs 116 pieces of 2k × 4k Charge Coupled Devices (CCDs) to cover a 1.5 degrees diameter field of view. The electronics system for HSC can be divided into two parts: the front-end electronics (FEE) in which analog signals from CCDs are processed and the BEE which is a digital component of the readout electronics. The BEE sends a readout clock to the CCD and FEE, receives the image data from the FEE and sends them to the data acquisition computers. The electronics are required to read the CCDs at the rate of 243k pixel/sec/CCDoutput while suppressing the readout noise smaller than about 4 electrons, so that the 2.3G byte of an image data can be read within about 10 seconds. We designed the BEE as 3U Euro-card system with seven slots (140 mm × 180 mm × 130 mm) to achieve all the requirements for HSC. The maximum readout speed was 265k pixel/sec/CCDoutput and the readout noise was smaller than 3 electrons, including the clock jitter noise of 0.1 electrons. We concluded that our back-end readout electronics have sufficient performance for HSC.

In this paper, it will be tried to briefely talk about electronic system design. In these 20 years, electronic system such as other sciences has improved. From analog and digital circuits toward nano bio systems. It will be discussed the main methods of electronic system design not only in analog and digital systems but also about nano and bio electronics systems.

A prospective analysis for the discovery of a light Higgs boson in the Compact Muon Solenoid (CMS) experiment at the Large Hadron Collider (LHC) is presented. The associated production channels WH and ZH of a Higgs boson decaying into a photon pair are studied using a full detector simulation. The method of analysis here employed should permit the utilization of real data once they become available in order to optimize the analysis performance and to estimate background rates. Minimizing in this way reliance on simulated data should allow a significant reduction in systematic errors. One year of LHC running at high luminosity (integrated luminosity of 100 fb−1) should allow an observation at 3σ of the Standard Model Higgs boson from the LEP lower limit of 114.4 GeV/c2 up to 146 GeV/c2. Three years of running at high luminosity should allow a 5σ discovery from the LEP lower limit up to 148 GeV/c2. In the context of supersymmetric models, the dominant gluon fusion Higgs boson production process could be strongly suppressed. This light Higgs gluophobic scenario could occur when the mixing in the stop sector is maximal. In such a case, the associated production channels WH and ZH may be recovery channels.

The Large Hadron Collider (LHC) is one of the largest scientific instruments ever built. Since opening up a new energy frontier for exploration in 2010, it has gathered a global user community of about 7,000 scientists working in fundamental particle physics and the physics of hadronic matter at extreme temperature and density. To sustain and extend its discovery potential, the LHC will need a major upgrade in the 2020s. This will increase its luminosity (rate of collisions) by a factor of five beyond the original design value and the integrated luminosity (total collisions created) by a factor ten. The LHC is already a highly complex and exquisitely optimised machine so this upgrade must be carefully conceived and will require about ten years to implement. The new configuration, known as High Luminosity LHC (HL-LHC), will rely on a number of key innovations that push accelerator technology beyond its present limits. Among these are cutting-edge 11-12 tesla superconducting magnets, compact superconducting cavities for beam rotation with ultra-precise phase control, new technology and physical processes for beam collimation and 300 metre-long high-power superconducting links with negligible energy dissipation. The present document describes the technologies and components that will be used to realise the project and is intended to serve as the basis for the detailed engineering design of HL-LHC.