Automatic Multi-Thread Code Generation for Monitoring Signature-based Control Flow

Control flow monitoring using a watchdog processor is a well-known technique to increase the dependability of a microprocessor system. Most approaches embed reference signatures for the watchdog processor into the processor instruction stream. These signatures contain the information required to detect control flow errors during program execution by the main processor. This paper proposes an architecture that offers both fault-tolerance and dynamic cache locking combined. This combination is achieved taking advantage of the fact that watchdog processor signatures are inserted along the program code. Then cache locking information is incorporated into these signatures. And also the required circuitry to inform the cache controller whether to lock or not the instructions fetched by the main processor is added into the watchdog processor. With this approach both fault-tolerant and real-time features are supported by the same hardware, therefore saving room on the silicon die or FPGA size. Results from experiments show that in most cases this approach reaches the same performance than previous, hardware-costly proposals.

The low-code approach is an important area of research being developed to improve the rapid creation and performance of software applications. This approach allows developers and users to easily create software applications through an interactive interface. Existing research shows that the low-code approach accelerates the development process in innovative ways, saves effort and time, and reduces code complexity. This study analyses and compares automatic code generation and transformation techniques in low-code platforms. The study analyses the contributions of automatic code generation and transformation to software engineering processes and evaluates the impact of these techniques on software product quality and development speed. The importance of the Model-Based Development (MBD) approach in automated code generation processes is highlighted. It is stated that MBD provides benefits such as speeding up the software development process and reducing errors by enabling automatic code generation from high-level abstract models. In the study, various literature studies were evaluated to examine the impact of automatic code generation and transformation techniques on the application development process. These studies have shown how automatic code generation and transformation techniques are applied, what results are achieved and what contributions these techniques make to the software development process. The results of the study show that automatic code generation and transformation techniques have a great impact on the application development process. In particular, the acceleration of the software development process, the reduction of errors and the ability to produce more effective and efficient software products are important benefits of these techniques. In addition, it has been found that this approach increases the success of software projects by enabling software developers to produce fast and accurate solutions in complex systems. In this context, the importance of automatic code generation and transformation techniques plays an important role in software development processes.

Automatic code generation for production automotive powertrain applications introduces many challenges for the tool vendor. Resource efficiency, reliability, and product process development issues need to be addressed. Automatic code generation used for rapid prototyping systems usually will not satisfy the requirements necessary for production oriented code generation. Some of the requirements critical to automatic code generation are not immediately obvious to a tool vendor who is not active in the user's industry. The purpose of this paper is to address some of the most common requirements for production automotive powertrain code generation.

Computer architectures are using increased degrees of instruction-level machine parallelism to achieve higher performance, e.g., superpipelined, superscalar and very long instruction word (VLIW) processors. Full utilization of such machine parallelism is difficult to achieve and sustain, resulting in the occurrence of idle resources at run time. This work explores the use of such idle resources for concurrent error detection in processors employing instruction-level machine parallelism. The Multiflow TRACE 14/300 processor, a VLIW machine, is chosen as an experimental vehicle. Experiments indicate that significant idle resources are likely to exist across a wide range of scientific applications for the TRACE 14/300. A methodology is presented for detecting transient control-flow errors, called available resource-driven control-flow monitoring (ARC), whose resource use can be tailored to the existence of idle resources in the processor. Results of applying ARC to the Multiflow TRACE 14/300 processor show that >99% of control-flow errors are detected with negligible performance overhead. These results demonstrate that ARC is highly effective in using the idle resources of a processor to achieve concurrent error detection at a very low cost. >

Model-Based Design with automatic flight code generation is used to develop a variety of aerospace electronic systems including integrated avionics, jet engine controls, and flight control systems. The software deployed in these systems undergoes rigorous verification and validation because the consequences of software failure are severe. New code checking and analysis tools have recently emerged with tight integrations to the modeling and code generation environment provided by Simulink.

The digital signal processing (DSP) processor-in-the-loop tests based on automatic code generation technology are studied. Firstly, the idea of model-based design is introduced, and the principle and method of embedded code automatic generation technology are analyzed by taking the automatic code generation of the DSP control algorithm for pulse width modulation (PWM) output as an example. Then, the control system model is established on MATLAB/Simulink. After verifying the model through simulation, the target board platform is established with DSP as the core processor, and the automatically generated code is tested by the processor-in-the-loop (PIL). The results show that the technology greatly shortens the development cycle of the project, improves the robustness and consistency of the control code, and can be widely used in the complex algorithm development process of the controller, from intelligent design and modeling to implementation.

Basically, aircraft engines can be divided into a control embedded system and a controlled system with its environment. The behaviour of the controlled system is given a priori, while the control system still needs to be designed in a way guaranteeing the correct overall behaviour under all operational conditions depending on the flight domain. A large quantity of functions in control systems can be described by a formal system expressed in block diagrams and state-based representations. These representations can be translated to formal based tools relying on the synchronous languages Signal and Statecharts. SACRES is a tool set supporting the design of safety-critical embedded control systems. It integrates the tools and specification techniques Statemate, Sildex, and Timing Diagrams with tool components for automatic code generation, formal verification based on model checking techniques, and an innovative approach for automatic code validation for target code generated from DC+. Technical achievements are The main benefits of the SACRES approach are reduced risks for design errors and decreased design times and costs for the development of dependable (safety critical) embedded systems. SACRES is an attempt to avoid unpredictability (particularly that arising from late feedback from testing) associated with development of safety critical systems, through the use of the maximum degree of automation, especially in respect of code generation and verification. An outstanding property of SACRES is the combination of specification styles and specification tools being applied in practice with automatic tools to establish provable correctness with respect to required properties. Both dependability and productivity are increased by automatic code generation from high-level specifications such that the generated code can be validated against higher levels by rigorous proofs. These techniques allow traditional tests by sampling to be replaced by rigorous checking techniques which correspond to 100% coverage of test cases. In order to address a global innovative approach in the near future which match the whole software configuration, the SACRES tool set should be interfaced with asynchronous techniques matching the operating system development. This raises an open question in the software development future new process.

In emergency response environments, variant entities with specific behaviors and interaction between them form a complex system that can be well modeled by multi-agent systems. To build such complex systems, instead of writing the code from scratch, one can follow the model-driven development approach, which aims to generate software from design models automatically. To achieve this goal, two important prerequisites are: a domain-specific modeling language for designing an emergency response environment model, and transformation programs for automatic code generation from a model. In addition, for modeling with the language, a modeling tool is required, and for executing the generated code there is a need to a platform. In this paper, a model-driven framework for developing multi-agent systems in emergency response environments is provided which includes several items. A domain-specific modeling language as well as a modeling tool is developed for this domain. The language and the tool are called ERE-ML and ERE-ML Tool, respectively. Using the ERE-ML Tool, a designer can model an emergency response situation and then validate the model against the predefined constraints. Furthermore, several model to code transformations are defined for automatic multi-agent system code generation from an emergency response environment model. For executing the generated code, an extension of JAMDER platform is also provided. To evaluate our framework, several case studies including the Victorian bushfire disaster are modeled to show the ability of the framework in modeling real-world situations and automatic transformation of the model into the code.

This article presents the process Automatic source code generation for ChatBot using the Model Driven Development (MDD) for Facebook Messaging platform. We propose the use of metamodel to define the ChatBot, including the option of consuming external REST services. Two test scenarios are presented: the first one is a ChatBot oriented to the sales of pizzas and hamburgers, which requires to obtain external information (REST services) on the ingredients and the search for commercial establishments that satisfy the options defined by the user. Our second test scenario is aligned with elements of IoT (Internet Of Things), specifically manages the sensors of a Sense Hat on a RaspBerry Pi 3 card, considering sensors such as: humidity, temperature, pressure, accelerometer and an actuator represented by a Led matrix. Finally, the results of each of the ChatBot are shown. these are automatically generated from the conceptual specification. The Chatbots are deployed on the Facebook platform validating the consumption of information from external REST services.

In this paper a software engineering concept is described which permits the automatic solution of a nonlinear set of network equations. The power flow equation set can be seen as a defined subset of a network equation set. The automated solution process is the numerical Newton-Raphson solution process of the power flow equations where the key code parts are the numeric mismatch and the numeric Jacobian term computation. It is shown that both the Jacobian and the mismatch term source code can be automatically generated in a conventional language such as Fortran or C. Thereby one starts from a high level, symbolic language with automatic differentiation and code generation facilities. As a result of this software engineering process an efficient, very high duality Newton-Raphson solution code is generated which allows easier implementation of network equation model enhancements and easier code maintenance as compared to hand-coded Fortran or C code.

This chapter demonstrates how high-level code is automatically generated for multi-core processors. The code generation capability of the Verifiable Embedded Real-Time Application Framework (VERTAF) was extended to support multi-core processors in the new VERTAF/Multi-Core (VMC) framework for embedded systems. After users specify embedded software requirements via SysML models along with parallel task, parallel data, and parallel dataflow specifications, the code generator automatically generates parallel code. Using the digital video recording (DVR) system as a case study, we show the correctness and advantages of the VMC code generator. The main inputs of VMC code generator include the block definition diagrams, state machine diagrams, and requirement diagrams of the system to be designed. The proposed code generation in VMC not only significantly decreases the amount of manually-written code, but also provides a formal procedure for model-conforming code generation of multi-core embedded software.

Automatic code generation has been around for a long time, and the core technologies used are constantly evolving. Around application development work in the demand for high quality code generated rapidly, this paper proposes a automatic code generation method based on sequence generative adversarial network, the method adopts the adversarial learning thought, using LSTM as a generator, CNN as a discriminator, both through against each other to generate higher quality code samples. Experiment results show that this method can generate code automatically at the second level, and is significantly better than the existing methods in terms of generation rate and accuracy, which explores a new way of automatic code generation.

The development of avionics software demands more and more human intervention. The software development process is rather highly expensive and risky since it must undergo certification. Automation of such a process can reduce errors and human interaction. Automated development tools usually deal with automatic code generation. These approaches are actually based on pre-defined fixed rules and policies to automatically generate software code which still demands considerable hand-coded software. This paper presents a self-directed development process that is able to make decisions by its own to generate software code. The automated decision-making process relies on a reasoner, and an ontological database that captures development skills from human developers as well as the dynamic configurations and capabilities of the system under development. The knowledge captured enables highlevel reasoning to automatically generate the control software code. A case study based on the development of Embedded Control Software (ECS) for Distributed Aircraft Fuel Management (DAFM) is presented. Details of the reasoning ontology to develop ECS, and experimental results from ECS for DAFM automatically generated are presented.

This paper presents the rationale behind DIALOG: a formal framework for interaction protocol (IP) modeling that considers all the stages of a protocol engineering process, i.e. the design, specification, validation, implementation and management of IPs. DIALOG is organized into three views. The modeling view allows visual IP design. The specification view automatically outputs, from the design, the syntactic specification of the IPs in a declarative-type language called ACSL. This improves IP publication, localization and communication on the Web, as well as IP machine learning by agents. Finally, the implementation view provides a formal structural operational semantics (SOS) for the ACSL language. The paper focuses on the developed SOS, and shows how this semantics allows protocol property verification and eases automatic rule-based code generation from an ACSL specification for the purpose of simulating IP code execution at design time, as well as improving and assuring correct IP compliance at run time.

Run-time code generation (RTCG) enables program optimizations specific to values that are unknown until run time and improves the performance. This paper shows that object-oriented languages allow RTCG from a simple analysis of source programs. It also proposes an automatic, safe, and efficient RTCG system implemented as a preprocessor of a C++ compiler. It can inline virtual member functions combined with other optimizations. Increases in speed have ranged from 1.2 to 2.3 times.KeywordsSource ProgramIntermediate RepresentationGraphic ObjectInstance VariableMachine CodeThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.