16- https://doi.org/10.1109/iccd.1993.393328
Beyond superscalar using FPGAs
- Oct 3, 1993
- C Iseli +1 more
Abstract
A superscalar processor with three execution units is described in details in this paper. The execution units are implemented using reprogrammable field-programmable gate array (FPGA) chips, allowing the user to configure them to best fit the application. Each instruction, composed of 128 bits, directly controls all the processor resources, in a horizontal microprogramming way.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">></ETX>
- # Reprogrammable Field-programmable Gate Array
- # Execution Units
- # Horizontal Microprogramming
- # Superscalar Processor
- # Field-programmable Gate Array Chips
- # Field-programmable Gate Array
- # Processor Resources
- # Gate Array Chips
- # Array Chips
