Bridgeless high power factor Buck-converter operating in discontinuous capacitor voltage mode

In this paper, a series-capacitor-based interleaving buck power factor correction (PFC) converter is proposed, the intermediate energy storage capacitance of which is operated at discontinuous capacitor voltage mode (DCVM), and automatic power factor (PF) correction for this converter is obtained. Moreover, the voltage across the series capacitor of the proposed PFC converter is clamped at the input voltage, and thus peak voltage stress existed in the traditional DCVM buck PFC could be relieved. By effectively regulating the charge/discharge time for the series capacitor, ultrahigh step-down conversion ratio of the proposed converter is achieved, the conversion ratio of which is independent of the duty cycle and only related to the switching frequency and circuit parameters. Therefore, high PF can be obtained due to very narrow deadtime of the input current. Meanwhile, the proposed PFC converter can realize the soft turn- on of part power switch and soft turn- off of part power diodes. In addition, comparing with the traditional discontinuous inductor current mode PFC, the input current of the proposed PFC converter is continuous so that the peak value and root-mean-square value of input current can be reduced. The operational principle, performance analysis, and parameter design principle are given in this paper. The analysis results show that the PF and total harmonic distortion are also independent of the duty cycle. Finally, a 220-Vac input, 60 W/15 V output experimental prototype is built to verify the validity of the theoretical analysis.

The buck converter with LC input filter operating in discontinuous capacitor voltage mode has inherent power factor correction properties and continuous input current. The paper presents a detailed analysis of the converter operating in this mode, leading to design criteria. Finally, experimental results for a 48 V/sub dc//100 W converter are presented.

A LC filter can be added to the input of the conventional buck converter to make the converter operate in discontinuous capacitor voltage mode. In this mode, the converter obtains the inherent power factor correction. Besides, both the input and output current will be continuous. This makes it possible for the converter operating at a high power level range. The input current will follow the input voltage automatically by a simple constant duty cycle control. This paper presents a detailed operation analysis of the converter operating in discontinuous capacitor voltage mode. And a 36V/100W prototype was built to verify the theoretical results.

To reduce total harmonic distortion (THD) and improve the power factor (PF) of a boost power factor correction (PFC) converter, here, the authors propose a non‐linear control algorithm that includes the feedforward correction (FC) algorithm in the continuous conduction mode (CCM) and the non‐linear frequency variation (FV) algorithm in the mixed conduction mode (MCM). The proposed FC algorithm achieves current out of distortion through zero crossing with a lower current loop bandwidth. The proposed non‐linear FV algorithm achieves high PF and low THD under minimal load conditions. The non‐linear FV algorithm comprises a third harmonic extraction algorithm, a harmonic control loop for reducing THD and a frequency production algorithm. By using this non‐linear FV algorithm, the inductor size is reduced, which leads to lower cost and also achieves better THD and PF. The proposed algorithms are verified experimentally in terms of current tracking, current THD, PF, heating and loss on a 2000‐W boost PFC converter hardware prototype.

A new single‐switch, single‐stage power factor correction (PFC) converter based on discontinuous capacitor voltage mode (DCVM) is presented in this study. The conventional single‐stage PFC converters have high voltage across their bulk capacitor which imposes high voltage stress on the switch and also the bulk capacitor voltage stress increases at light load condition. The most important advantage of the proposed topology is that the voltage across the bulk capacitor is low and the input current is continuous. Furthermore, this topology does not have high voltage stress across the bulk capacitor at light loads. The proposed topology is derived from a DCVM buck converter integrated with a flyback converter. The proposed PFC topology contains low number of passive components and employs only one switch, resulting in reduced complexity and cost. The presented simulation and experimental results of the proposed converter justify the theoretical analysis.

This paper introduces a novel algorithm for implementing the digital control method for the single power factor correction (PFC) rectifier. The switching frequency of power semiconductor is variable under different load conditions. The duty cycle is calculated based on digital non-linear control (DNLC) method without the input voltage-sensing circuit. Simulation results of a boost power PFC prototype point out that high power factor and low input current total harmonic distortion (THD) are achieved using proposed control strategy.

The duality principle is applied to derive new single‐stage power‐factor‐correction (PFC) voltage regulators. This paper begins with an application of duality transformation to conventional discontinuous‐conduction‐mode buck, buck‐boost and boost converters. The resulting dual converters operate in the discontinuous capacitor voltage mode. These new converters provide the same PFC property, but in the dual manner. It is proved that in the practical case of the input being a voltage source, the mandatory insertion of inductance between the voltage input and the ‘dual PFC converter’ does not affect the power‐factor‐correcting property. A new single‐stage PFC regulator is derived by taking the dual of a well‐known circuit based on a cascade of conventional boost and buck converters. Analytical design expressions are derived, illustrating the relation between current stress and component values. Experiments are performed to confirm the operation of the circuit and its power‐factor‐correcting capability. Copyright © 2003 John Wiley & Sons, Ltd.

A variable on-time (VOT) control strategy for boundary conduction mode (BCM) single-ended primary inductor converter (SEPIC) power factor correction (PFC) converter with high power factor (PF) and low total harmonic distortion (THD) is proposed. By utilising output voltage and input voltage to modulate the turn-on time of the switch of BCM SEPIC PFC converter, the unity PF and lower THD can be achieved. The operating principles of the VOT controlled BCM SEPIC PFC converter are analysed. The experimental results based on 100 W prototype demonstrate that the PF and THD of proposed VOT controlled BCM SEPIC PFC converter are better than those of traditional BCM SEPIC PFC converter.

This paper presents a single-stage, low-frequency, square-wave-driven electronic ballast for supplying high-intensity-discharge (HID) lamps with interleaved power-factor-corrections (PFC) features and a constant lamp-power control scheme. The proposed ballast integrates into a single stage an interleaved PFC converter with a high-frequency interleaving low-frequency square-wave-driven full-bridge inverter; it is able to not only offer input utility-line current shaping, but also supplies the lamp with low-frequency square-wave sources without accompanying acoustic resonance. The features of the presented ballast are cost-effectiveness, low total harmonic distortion (THD), high power factor (>0.99) and high efficiency (>90%). Theoretical analysis and experimental results of a prototype ballast for a 70 W HID lamp are demonstrated.

There is a need to improve the power quality of the grid as well as the power factor implied on the grid due to the nonlinear loads connected to it. A new single phase bridgeless AC/DC power factor correction (PFC) topology to improve the power factor as well as the total harmonic distortion (THD) of the utility grid is proposed in this research. By eliminating the input bridge in conventional PFC converters, the control circuit is simplified; the total harmonics distortion THD and power factor PF are improved. The controller operates in multi loop fashion as the outer control loop calculates the reference current through innovative filtering and signal processing. Inner current loop generates PWM switching signals through the PI controller. Analytical derivation of the proposed converter is presented in detail. Performance of the proposed PFC topology is verified for prototype using PSIM circuit simulations. The experimental system is developed, and the experimental results agree with simulation results.

Wireless power transfer (WPT) systems are power electronic converters which can be installed under the road and charge the butteries of the electric vehicles. High total harmonic distortion (THD) of the input current is an important challenge in WPT system design. In this paper a new topology is proposed for WPT systems to reduce their input current THD. In the proposed topology, a quasi-Z-source inverter (QZSI) is used in series with a LLC resonant network. In addition to the DC voltage boosting, QZSI shapes the input current. The simulation results verify the performance of the proposed structure in THD reduction and power factor correction in comparison with the conventional Z-source resonant converter.

This paper presents the design guidelines of electronic ballast for HID lamps. High efficient electronic ballast with high power factor and low THD (total harmonic distortion) is presented. The use of input current shaper converters (ICSC) working in Discontinuous-Conduction Mode (DCM) to stabilize the discharge arc in High Intensity Discharge (HID) lamps is proposed. The analysis of how the ICSC stabilizes the lamp current through the analysis of the output capacitor Co and model lamp is presented. The results indicated the feasibility to stabilize the lamp and obtaining high efficiency, high power factor and low THD in a single stage is presented.

This paper presents a multi-cell single-phase high power factor boost rectifier in interleave connection, operating in critical conduction mode, employing a soft-switching technique, and controlled by field programmable gate array (FPGA). The soft-switching technique is based on zero-current-switching (ZCS) cells, providing ZC (zero-current) turn-on and ZCZV (zero-current-zero-voltage) turn-off for the active switches, and ZV (zero-voltage) turn-on and ZC (zero-current) turn-off for the boost diodes. The disadvantages related to reverse recovery effects of boost diodes operated in continuous conduction mode (additional losses, and electromagnetic interference (EMI) problems) are minimized, due to the operation in critical conduction mode. In addition, due to the interleaving technique, the rectifier's features include the reduction in the input current ripple, the reduction in the output voltage ripple, the use of low stress devices, low volume for the EMI input filter, high input power factor (PF), and low total harmonic distortion (THD) in the input current, in compliance with the IEC61000-3-2 standards. The digital controller has been developed using a hardware description language (VHDL) and implemented using a XC2S200E-SpartanII-E/Xilinx FPGA device, performing a true critical conduction operation mode for all interleaved cells, and a closed-loop to provide the output voltage regulation, like as a pre-regulator rectifier. Experimental results are presented for a implemented prototype with two and with four interleaved cells, 400 V nominal output voltage and 220 Vrms nominal input voltage, in order to verify the feasibility and performance of the proposed digital control through the use of a FPGA device

This paper presents a bridgeless power factor correction (PFC) buck converter for high frequency AC systems. This PFC converter utilizes series resonant circuit at the AC-side to perform the PFC and buck topology at the DC-side to regulate the output voltage. In order to reduce the number of components and to improve the efficiency of the converter, a bridgeless topology is proposed. A detailed circuit analysis has been done. The AC to DC voltage conversion ratio and boundary of the converter operation are explicitly expressed. Afterwards, experimental results are provided to verify the operation of the topology. The converter prototype operates at 100 kHz with an output power of 10 W. Its efficiency is over 90 %. The total harmonic distortion of the input AC current at full load condition is less than 20 %.

The authors propose a simple and robust voltage controller to improve voltage dynamics in power factor corrected (PFC) converters. The conventional control of the PFC converters requires filtering of twice-the-line-frequency voltage ripples present on the DC bus voltage to reduce the total harmonic distortion (THD) in the input current. This filtering action significantly reduces the effective voltage regulation bandwidth, resulting in slow voltage dynamics. The proposed scheme cancels the voltage ripple on the DC bus voltage feedback path without any filtering action and thereby allows design of large bandwidth voltage control loop. This eliminates large overshoots and undershoots in output voltage during transients, which are prevalent in conventionally designed PFC converters. The controller design and implementation are described and simulation results are presented for single-phase boost PFC converter as well as single-phase voltage source PFC converter to demonstrate the feasibility of the proposed technique.