Cache tiling for high performance morphological image processing

Morphological image processing is a relatively mature image processing method in classical image processing. However, in quantum image processing, the related results are still quite scarce. In this paper, we first design the quantum circuits of the two basic operations of dilation and erosion for binary images and grayscale images. On this basis, for binary image, the quantum circuits of three morphological algorithms (noise removal, boundary extraction and skeleton extraction) are designed in detail. For grayscale image, the quantum circuits of three morphological algorithms (i.e., edge detection, image enhancement and texture segmentation) are also designed. In the design of these circuits, the parallelism of quantum computation is considered. The analysis of the circuits complexity shows that all the six morphological algorithms can speed up their classic counterparts.

Performance of applications running on GPUs is mainly affected by hardware occupancy and global memory latency. Scientific applications that rely on analysis using unstructured grids could benefit from the high performance capabilities provided by GPUs, however, its memory access pattern and algorithm limit the potential benefits.In this paper we analyze the algorithm for unstructured grid analysis on the basis of hardware occupancy and memory access efficiency. In general, the algorithm can be divided into three stages: cell-oriented analysis, edge-oriented analysis and information update, which present different memory access patterns. Based on the analysis we modify the algorithm to make it suitable for GPUs. The proposed algorithm aims for high hardware occupancy and efficient global memory access. Finally, through implementation we show that our design achieves up to 88 times speedup compared to the sequential CPU version.

The growing demand for intelligent processing on edge devices calls for a flexible and efficient neural network inference accelerator. This paper proposes RINE—a lightweight and customizable RISC-V-based inference engine. By integrating specialized instruction set extensions optimized for core neural network operations such as matrix multiplication, activation functions, and memory access patterns, and combining hardware-software co-optimization, the engine significantly improves performance-per-watt. Experiments demonstrate that RINE can efficiently run mainstream lightweight models, providing an ideal real-time AI solution for resource-constrained platforms.

Data sets in large applications are often too massive to fit completely inside the computers internal memory. The resulting input/output communication (or I/O) between fast internal memory and slower external memory (such as disks) can be a major performance bottleneck. In this article we survey the state of the art in the design and analysis of external memory (or EM) algorithms and data structures, where the goal is to exploit locality in order to reduce the I/O costs. We consider a variety of EM paradigms for solving batched and online problems efficiently in external memory. For the batched problem of sorting and related problems such as permuting and fast Fourier transform, the key paradigms include distribution and merging. The paradigm of disk striping offers an elegant way to use multiple disks in parallel. For sorting, however, disk striping can be nonoptimal with respect to I/O, so to gain further improvements we discuss distribution and merging techniques for using the disks independently. We also consider useful techniques for batched EM problems involving matrices (such as matrix multiplication and transposition), geometric data (such as finding intersections and constructing convex hulls), and graphs (such as list ranking, connected components, topological sorting, and shortest paths). In the online domain, canonical EM applications include dictionary lookup and range searching. The two important classes of indexed data structures are based upon extendible hashing and B-trees. The paradigms of filtering and bootstrapping provide a convenient means in online data structures to make effective use of the data accessed from disk. We also reexamine some of the above EM problems in slightly different settings, such as when the data items are moving, when the data items are variable-length (e.g., text strings), or when the allocated amount of internal memory can change dynamically. Programming tools and environments are available for simplifying the EM programming task. During the course of the survey, we report on some experiments in the domain of spatial databases using the TPIE system (transparent parallel I/O programming environment). The newly developed EM algorithms and data structures that incorporate the paradigms we discuss are significantly faster than methods currently used in practice.

Mathematical morphology is a powerful tool for image processing and analysis of binary, greyscale and colour images. In the paper, an efficient new fuzzy model for morphological colour image processing is introduced. A new vector-ordering scheme that uses fuzzy if–then rules is proposed, and then the basic morphological operations of erosion and dilation are defined. The morphological operators presented, which are vector preserving, are less sensitive to image distortion and perform significantly better in noise removal problems than other reported morphological operators. Experimental results demonstrate these advantageous characteristics on real images. Additionally, illustrative examples that exhibit the applicability of the proposed framework to edge-detection problems are given.

Mathematical morphology is one of the data processing methods that is extremely useful for image processing and has many applications, such as, noise elimination, shape description, texture analysis, and so on. The mathematical base of morphological processing is dilation and erosion which are described by set analysis and can be expressed in logical AND, OR notation.Localized parallel processing including morphological processing is not suitable to Neumann architecture because of the memory access bottleneck which makes it hard to achieve the high throughout data processing required in applications such as video image processing. Also the cytocomputer aimed at fast image processing has a drawback in that it can handle only very small structuring elements.In this paper, first, an algorithm is presented which accelerates morphological image processing. Next, the algorithm to design a specialized hardware which processes the real‐time video image is implemented and finally, an application of this specialized hardware for medical use is described.

Flow of cut tobacco is an important processing parameter of high speed cigarette machine. In order to meet the demand of cut tobacco flow statistics in the whole sealing pipes, this paper shares a machine vision based on-line statistical system of cut tobacco flow. Besides the introduction of the system's hardware, this paper focuses on the image processing algorithms such as cut tobacco image preprocessing, thresholding and morphological processing. Firstly, after the preprocessing of image denoising, the cut tobacco color image is transformed into gray-scale image by weighted average method. Secondly, the gray-scale image is converted into to binary image by the maximum entropy threshold method. Finally, the binary cut tobacco image is processed by dilation and erosion of the morphological image processing, which lay the foundation for the on-line statistic process of cut tobacco flow. The practical engineering application of the system shows that the on-line statistic of cut tobacco flow is real-time with high reliability, which can meet the requirements of the production process of tobacco companies and greatly improve the automation and intelligentization of high-speed cigarette machine, resulting in certain generalization value in the industry.

A new type of nonlinear image processor based on morphological processing is demonstrated. Morphological image processing is based on the successive binary convolution of an image with a selectable convolution kernel. Its field of application includes numerical optical computing and binary image processing. Simple serial commands from a small electronic computer control the selection of the convolution kernels for a given iteration and consequently the parallel processing of very large optical data planes. 1.

In this paper, a novel image denoising method with a morphological opening is proposed. In many image recovery, the regularization has been introduced to prevent overfitting between a recovered image and a noisy observation. In the regularization of an image, the smoothness of the image is assumed. The cost function, which is minimized during the regularization, is defined as a sum of the approximation error term and the smoothness penalty of the image. In morphological image processing, an image is approximated as a union of structuring elements (SEs) by the morphological image opening. In the approximation with the opening, the SE represents the local intensity surface of the image. We hence impose the smoothness penalty on the SE, instead of the recovered image itself, and propose an image opening method with the regularization penalty for the SE. In denoising, the approximation error is minimized under the constraint of the penalty for the SE. In experiments, we show that the proposed filtering method has ability to remove impulsive noises from degraded texture images.

Fast parallel processing of gray-scale images and exact hard-clip thresholding are two important functionalities necessary in optoelectronic implementations of structural processors. The parallel nature of processing stems from optical implementation of local operations with arrays of active smart pixels. We have demonstrated a morphological image processor composed of arrays of bistable optoelectronic transceivers which are connected in differential pairs and work as comparators. The use of differential pairs of optical thyristors fabricated in GaAs technology allows to realize a dual rail architecture for this photonic morphological image processor. The processor consists of a thresholding module and a binary morphological processing module. The thresholding module decomposes gray level images into series of binary slices. In the binary morphological processing module operations are performed within a neighborhood defined by a structuring element implemented as a diffractive fan-out element. In the prototype set-up we demonstrate median filtering, dilation and erosion operations performed for an image of 8x8 pixels and threshold decomposition of 6 gray level images. In principle all rank order as well as morphological filters can be optically calculated in the set-up. Additional functionality of the processor is achieved with use of the electronic layer with digital cellular processors. The electronic layer, designed as an array of simple digital processors, realizes a set of operations on binary images using 4 bit programmable weights. Simulation results for 0.8 µm CMOS technology are presented. We discuss the limitations of the photonic morphological image processing with respect to bandwidth, parallelism and architecture of the processor.

The leaf is extremely important in plant species. There are some leaves that have medicinal properties. Identification of leaf with look-alike is becoming a major task in day to day life. To overcome this, a computer vision technique that includes an image processing algorithm is used. The features and texture of the leaf are extracted using this technique, and the closest match is used to determine which class it belongs to. This paper discusses a morphological processing algorithm in which the signature parameter serves as the vein. Morphological processing includes the structuring element, that is a dilation and erosion process. Authenticating an image with its signature parameter will be the most efficient technique in terms of accuracy, outperforming other methods.

The content of impurities in a batch of grain is an important index for grain storage and grain quality standard evaluation. In order to improve the measurement reliability and real-time capability, one new impurity separating and counting system is presented, which integrates the image enhancement, image segmentation and morphological image processing algorithm for impurity separation in doped grain. Firstly, histogram equalization and Gauss-Laplacian operator are used to enhance the gray difference between grains and impurities; then the parameters of expansion and area of impurities are introduced to remove false points, and each impurity edge is extracted by Roberts operator; finally, all the impurities are labeled and counted. Experimental analysis shows the effectiveness of the proposed algorithm.

Applications in the Internet of Video Things (IoVT) domain have very tight constraints with respect to power and area. While neuromorphic vision sensors (NVS) may offer advantages over traditional imagers in this domain, the existing NVS systems either do not meet the power constraints or have not demonstrated end-to-end system performance. To address this, we improve on a recently proposed hybrid event-frame approach by using morphological image processing algorithms for region proposal and address the low-power requirement for object detection and classification by exploring various convolutional neural network (CNN) architectures. Specifically, we compare the results obtained from our object detection framework against the state-of-the-art low-power NVS surveillance system and show an improved accuracy of 82.16% from 63.1%. Moreover, we show that using multiple bits does not improve accuracy, and thus, system designers can save power and area by using only single bit event polarity information. In addition, we explore the CNN architecture space for object classification and show useful insights to trade-off accuracy for lower power using lesser memory and arithmetic operations.

The technology for scraped surface detection remains experimental. It is mainly performed visually by experienced technicians, which is neither objective nor standardized. Since the scraping technique is the key to the accuracy and the performance of the machine, a method to determine the characteristics of the scraping surface in a quick, objective way is proposed, in order to ensure the quality of scraping. The scraping surface is photographed using a smartphone, and an Android application is developed using a Java image processing algorithm. A square inch of image is then captured on the screen, the RGB image is isolated, and its histogram is read. Using a watershed algorithm, the background image is calculated from the boundary, and then binary, filter and morphological image processing algorithms are used. If the light is uniform, a split binary technique is used. The scraping appearance is then calculated and analyzed in points per inch (PPI) and percentage of points (POP). The experimental results indicated that the total area for recognition was approximately 1-in2; PPI = 13; and POP = 30.9%, and recognition time was less than 1 sec. The experimental analysis results in this study were compared to those of two scraping experts; the two errors were both lower than 5%.

High-performance computing (HPC) has enabled advancements in computation speed and resource cost by utilizing all available server resources and using parallelization for speedup. This computation scheme encourages simulation model development, massive data collection, and AI computation models, all which store and compute on massive amounts of data. Data compression has enhanced the performance of storing and transferring this HPC application data to enable acceleration, but the benefits of data compression can also be transferred to the active allocated memory used by the application. In-line compression is a compression method that keeps the application memory compressed in allocated memory, decompressing memory as its data is needed by the algorithm. The actively decompressed data size in allocated memory can be limited by grouping and compressing the data into blocks informed by the application's computational kernel's data access patterns and a selected compressor. This research explores factors such as block size and compressor choice on the runtime and memory usage of the Matrix Multiplication kernel. Matrix multiplication (MM) is a fundamental HPC algorithm that exemplifies the memory access patterns and use cases present in other HPC kernels. MM kernels provide a baseline for evaluating in-line compression due to MM's row-based data access patterns and the usage of several matrices to compute the resulting matrix. Trade-offs between memory size and the compression runtime necessitate tuned parameters for each in-line compression-enabled kernel. The results of this research demonstrate essential parameter trends, trade-offs, and the importance of locality in the kernel's data access patterns.