Canonical piecewise-linear networks

The recurrent canonical piecewise linear (RCPL) network is applied to nonlinear blind equalization by generalizing Donoho's minimum entropy deconvolution approach. We first study the approximation ability of the canonical piecewise linear (CPL) network and the CPL based distribution learning for blind equalization. We then generalize these conclusions to the RCPL network. We show that nonlinear blind equalization can be achieved by matching the distribution of the channel input with that of the RCPL equalizer output. A new blind equalizer structure is constructed by using RCPL network and decision feedback. We discuss application of various cost functions to RCPL based equalization and present experimental results that demonstrate the successful application of RCPL network to blind equalization.

To take advantage of the remarkable computational efficiency of the canonical piecewise-linear approach for dc nonlinear electronic circuit analysis, the devices must be modeled by a canonical piecewise-linear model. This paper presents a unified parameter optimization algorithm for constructing such models. This algorithm is then applied to derive prototype canonical piecewise-linear models of p-n junction diodes, bipolar transistors, MOSFET's, and GaAs FET's. The canonical piecewise-linear model can be regarded as a universal model since its form remains unchanged for all devices. Only the coefficients differ from one device to another. For large-scale circuits, the canonical piecewise-linear representation has a decisive advantage over other representations in regard to the number of memory locations needed to specify the equations.

In this paper, a two-dimensional (2-D) fast adaptive filtering algorithm based on the exponentially weighted least squares errors is developed for the non linear canonical piecewise quadratic (CPWQ) model. This algorithm take advantages of the non linear CPWQ modeling and the fast convergence of the exponentially weighted least squares adaptive algorithm. The simulation results show that the proposed method gives good results in image restoration. Experimental comparison with the canonical piecewise linear (CPWL) model shows the superiority of the non linear filter in term of image enhancement.

In this study, we apply the canonical piecewise-linear (PWL) model to the modeling of super-resolution near-field structure (super-RENS) read-out signals because reliable and accurate channel modeling is essential for performance analysis and development of equalizers for super-RENS disc systems. To mitigate the nonlinear inter symbol interference (ISI), furthermore, we propose a canonical PWL model-based equalizer (PWLEQ) for super-RENS discs. The validity of the model and the equalizer is tested using radio frequency (RF) signal samples obtained from a super-RENS disc. The modeling experiment results verified that the canonical PWL model can be efficiently utilized for the nonlinear modeling of super-RENS systems. The raw bit error rate (BER) performance with the proposed equalizer is measured for various delays and step sizes of the canonical PWL model. We observe a marked improvement in raw BER when using the proposed equlaizer.

In this paper we analyze the collective behaviors of networks of Hindmarsh-Rose (HR) neurons and compare them with the behaviors of networks of piecewise-linear (PWL) approximations of the HR neurons. In all cases, the neurons are assumed to be symmetrically and diffusively coupled, with different topologies. The analysis is based on the master stability function (MSF) approach. The obtained results are verified by numerical time domain simulations of networks of 100 neurons. The synchronization properties of the PWL networks turn out to be very similar to those of the HR networks, as well as the dynamical properties of the single neurons (analyzed elsewhere).

A linearization method suitable for smart sensors and intelligent transducers with highly nonlinear transfer curve of sensors is proposed here. The first, abscissa, is transformed by one piece-wise linear approximation, and then the standard piece-wise approximation of attained function is performed. The method is compared with the standard piece-wise polynomial and linear approximation, based on the example of the negative temperature coefficient sensor.

The preservation of ambient isotopic equivalence under piecewise linear (PL) approximation for smooth knots are prominent in molecular modeling and simulation. Sufficient conditions are given regarding: Hausdorff distance, and a sum of total curvature and derivative. High degree Bezier curves are often used as smooth representations, where computational efficiency is a practical concern. Subdivision can produce PL approximations for a given B\'ezier curve, fulfilling the above two conditions. The primary contributions are: (i) a priori bounds on the number of subdivision iterations sufficient to achieve a PL approximation that is ambient isotopic to the original B\'ezier curve, and (ii) improved iteration bounds over those previously established.

This paper presents an error compensated piecewise linear logarithmic arithmetic unit for Phong lighting hardware acceleration. Two novel error compensation techniques have been applied to differentiate finer bounds within piecewise linear (PWL) approximation intervals to achieve a lower absolute mean error rate with minimal increment in resource costs. Area/power/error performances of the logarithmic unit designs are presented for the proposed topologies applied to a five-interval base-2 PWL logarithm approximation circuit in comparison to its baseline counterpart. In addition, the design is applied to a single-cycle Phong lighting hardware accelerator and evaluated for graphical estimation accuracy at the system-level.

An essential challenge in generation scheduling (GS) problems of hydrothermal power systems is the inclusion of adequate modeling of the hydroelectric production function (HPF). The HPF is a nonlinear and nonconvex function that depends on the head and turbined outflow. Although the hydropower plants have multiple generating units (GUs), due to a series of complexities, the most attractive modeling practice is to represent one HPF per plant, i.e., a single function is built for representing the plant generation instead of the generation of each GU. Furthermore, due to the computation time constraints and representation of nonlinearities, the HPF must be given by a piecewise linear (PWL) model. This paper presented some continuous PWL models to include the HPF per plant in GS problems of hydrothermal systems. Depending on the type of application, the framework allows a choice between the concave PWL for HPF modeled with one or two variables and the nonconvex (more accurate) PWL for HPF dependent only on the turbined outflow. Basically, in both PWL models, offline, mixed-integer linear (or quadratic) programming techniques are used with an optimized pre-selection of the original HPF dataset obtained through the Ramer-Douglas-Peucker algorithm. As a highlight, the framework allows the control of the number of hyperplanes and, consequently, the number of variables and constraints of the PWL model. To this end, we offer two possibilities: (i) minimizing the error for a fixed number of hyperplanes, or (ii) minimizing the number of hyperplanes for a given error. We assessed the performance of the proposed framework using data from two large hydropower plants of the Brazilian system. The first has 3568 MW distributed in 50 Bulb-type GUs and operates as a run-of-river hydro plant. In turn, the second, which can vary the reservoir volume by up to 1000 hm3, possesses 1140 MW distributed in three Francis-type units. The results showed a variation from 0.040% to 1.583% in terms of mean absolute error and 0.306% to 6.356% regarding the maximum absolute error even with few approximations.

In this paper is presented a model description for the representation of two dimensional piecewise-linear (PWL) characteristics. The description is denoted as an Iterative and Decomposed (ID) model. It is described as a decomposed one, because the independent and dependent variables in the formulation, that describes an arbitrary two-dimensional PWL characteristic, are treated separately. It is also denominated as iterative, because the particular representation of each PWL plane depends only on the value of one parameter included in the mathematical model. An example is presented and it illustrates the potential application of this kind of representation on the modeling of nonlinear devices.

Global Optimization of Bilinear Programs by Elementary Functions Substitutions

Development and evaluation of a micro–macro algorithm for the simulation of polymer flow

Estimates for piecewise linear approximations of implicitly defined manifolds

The development of mixed signal modelling languages such as VHDL-AMS and Verilog-A allows the behaviour of analogue and mixed signal circuits to be described at a higher level than is possible with conventional circuit-level (e.g. SPICE type) simulators. Mixed-signal simulators for these new languages can process such behavioural models far more efficiently than was previously possible. The non-linear characteristics of many circuits require differential equations to be used in the behavioural descriptions. Unfortunately, the methods used to solve these equations in a mixed-signal simulator are more computationally demanding than those required to evaluate the logic expressions used to describe digital circuits. Consequently, the simulation of analogue and mixed-signal circuits is still far less efficient than the simulation of a pure digital circuit. This paper presents an alternative approach to modelling the behaviour of analogue and mixed-signal circuits based upon piecewise linear (PWL) waveforms. Since the signals processed by these models are linearised, direct methods (i.e. non-iterative) can be used to simulate their behaviour. Several alternative methods are discussed. Examples showing the application of this approach to commonly used circuits are developed and the results compared against corresponding models written for conventional simulators. Finally, suggestions are given for implementing these techniques in a VHDL simulators. (6 pages)

Look ahead dynamic security-constrained economic dispatch considering frequency stability and smart loads