Chapter 1 - Flexible Organic Single-Crystal Field-Effect Transistors

Progress in flexible organic thin-film transistors and integrated circuits

Due to their high thermal conductivity, stability, light weight, and low cost, graphite products are widely used as thermally conductive materials in current electronic devices and are promising materials for future flexible electronics. However, the intrinsic high rough surface of graphite severely impedes the fabrication of thermal transistors based on graphite products. On the other hand, most of the flexible thermal transistors reported to date are based on polymer substrates, whose thermal conductivities are extremely low for thermal sensing. To address these issues herein, a flexible commercial graphite paper with high thermal conductivity was used as both the substrate and the back gate of thermal transistors. Fluorinated polyimide was also synthesized as a high performance dielectric material and was skillfully blade-coated on a flexible graphite paper to reduce the surface roughness. As a result, the as-fabricated flexible device exhibits extremely low hysteresis, wide operating temperature range (20–100 °C), high stability, and temperature sensing performance. Moreover, the as-fabricated pentacene device reached the mobility of 0.146 cm2 V−1 s−1, which is highly competitive among the reported flexible organic thermal transistors. Such thermal transistors are promising for integration in current electronic devices and promote the diversity of the flexible transistor substrates.

The contact resistance in organic thin-film transistors (TFTs) is the limiting factor in the development of high-frequency organic TFTs. In devices fabricated in the inverted (bottom-gate) device architecture, staggered (top-contact) organic TFTs have usually shown or are predicted to show lower contact resistance than coplanar (bottom-contact) organic TFTs. However, through comparison of organic TFTs with different gate-dielectric thicknesses based on the small-molecule organic semiconductor 2,9-diphenyl-dinaphtho[2,3-b:2’,3’-f]thieno[3,2-b]thiophene, we show the potential for bottom-contact TFTs to have lower contact resistance than top-contact TFTs, provided the gate dielectric is sufficiently thin and an interface layer such as pentafluorobenzenethiol is used to treat the surface of the source and drain contacts. We demonstrate bottom-contact TFTs fabricated on flexible plastic substrates with record-low contact resistance (29 Ωcm), record subthreshold swing (62 mV/decade), and signal-propagation delays in 11-stage unipolar ring oscillators as short as 138 ns per stage, all at operating voltages of about 3 V.

Streched organic transistors maintain mobility on flexible substrates

A process for the fabrication of organic thin-film transistors (TFTs) with channel lengths as short as 0.5 μm on flexible plastic substrates has been developed. The TFTs are fabricated in the bottom-gate, top-contact (inverted staggered) architecture and employ vacuum-deposited small-molecule organic semiconductors and a low-temperature-processed gate dielectric that is sufficiently thin to allow the TFTs to operate with voltages of about 2 to 3 V. For a channel length of 0.5 μm, the TFTs have effective field-effect mobilities of 0.08 cm2/Vs (p-channel TFTs) and 0.03 cm2/Vs (n-channel TFTs), on/off current ratios of at least 106, and subthreshold swings of about 140 mV/decade. For 11-stage complementary and unipolar ring oscillators based on TFTs with a channel length of 1 μm, signal propagation delays per stage as short as 6.6 μs and 420 ns have been measured at a supply voltage of 3 V.

Vertical ZnO nanorods (NRs) were grown on flexible plastic substrates using the hydrothermal synthesis method. An energy scavenging piezoelectric device was developed by integrating two flexible substrates with the NR sides facing each other. With an applied mechanical compressive force, a maximum open-circuit voltage of 2.5 V (p-p) was measured. The ZnO piezoelectric device was also utilized to monitor human heartbeats that generated an output voltage of 150 mV per pulsation. The frequency response of the fabricated ZnO NR piezoelectric device was measured over a frequency range extending from 50 Hz to 20 kHz. The device exhibited a voltage ratio of 0.113 over the frequency range from 50 Hz to 800 Hz followed by a gradual decrease to 0.08 at 20 kHz. This is approximately eight times more sensitive at higher frequencies compared to commercial microphones.

Using organic transistors with a floating gate embedded in hybrid dielectrics that comprise a 2-nanometer-thick molecular self-assembled monolayer and a 4-nanometer-thick plasma-grown metal oxide, we have realized nonvolatile memory arrays on flexible plastic substrates. The small thickness of the dielectrics allows very small program and erase voltages (< or = 6 volts) to produce a large, nonvolatile, reversible threshold-voltage shift. The transistors endure more than 1000 program and erase cycles, which is within two orders of magnitude of silicon-based floating-gate transistors widely employed in flash memory. By integrating a flexible array of organic floating-gate transistors with a pressure-sensitive rubber sheet, we have realized a sensor matrix that detects the spatial distribution of applied mechanical pressure and stores the analog sensor input as a two-dimensional image over long periods of time.

We explore for the first time the direct growth of high quality InAs nanowires (NWs) on flexible plastic substrates by MOVPE. We have recently reported on self-catalyzed growth of InAs NWs using a new low-temperature growth regime, where NWs were obtained at temperatures as low as 280°C. We showed that low-temperature growth is beneficial for a variety process flows and growth substrates where excessive heat is detrimental, particularly for plastic substrates. In this work, we synthesize InAs nanowires in-situ on flexible polyimide substrates without any need for transfer techniques. Presently semiconductor nanowires are routinely grown on high-priced crystalline substrates as it is extremely challenging to grow directly on plastics and flexible substrates due to high temperature requirements and substrate preparation. At the same time plastic substrates can offer many advantages such as extremely low price, light weight, mechanical flexibility, shock and thermal resistance and biocompatibility. We show that the fabricated NWs are optically and electrically active with strong light emission in the infrared range. Overall, we demonstrate that light-emitting InAs nanowires can be synthesized directly on flexible plastic substrates inside a MOVPE reactor, and we believe that our results will further advance the development of the nanowires-based flexible electronic devices.

We develop an "acceptor dimerization" strategy by a bis-diketopyrrolopyrrole (2DPP) for an ambipolar organic semiconductor. Copolymers of 2DPP and benzothiadiazole (BTz) derivatives, P2DPP-BTz and P2DPP-2FBTz, are designed and synthesized. Both of the polymers exhibit narrow optical bandgaps of ca. 1.30 eV. The strong electron-withdrawing property of 2DPP results in low-lying lowest unoccupied molecular orbital (LUMO) energy levels of the polymers, improving the electron mobilities. 2D grazing incident X-ray diffraction and atomic force microscopy indicate that the P2DPP-BTz exhibits a small π-π stacking distance of 3.59 Å and a smooth interface, thus promoting high mobility. To take full advantage of the flexibility of organic semiconductors, flexible field-effect transistors (FETs) were fabricated on poly(ethylene terephthalate) (PET) substrates. The FETs based on P2DPP-BTz show high performance with hole and electron mobilities of 1.73 and 2.58 cm2 V-1 s-1, respectively. Our results demonstrate that the 2DPP acceptor is a promising building block for high-mobility ambipolar polymers.

Modeling of bias-induced changes of organic field-effect transistor characteristics

I NTRODUCTION Germanium-rich silicon-germanium (Ge-rich SiGe) (Ge fraction: 50−100%) provides higher carrier mobility and superior optical properties compared with Si. In the field of large-scale integrated circuits, Ge-rich SiGe devices are being employed to break through the scaling limit. Such an approach is also very useful in the fields of advanced thin-film electronics, such as system-in-displays. In addition, to improve the usability of the system-in-displays, Ge-rich SiGe-based high-performance thin-film devices should be integrated on flexible plastic substrates (softening temperature: ~350°C). For this purpose, a technique for low-temperature (≤300oC) growth of orientation-controlled large-grain (≥10 μm) Ge-rich SiGe on insulator should be developed. In addition, position control of the orientation-controlled large-grains is useful to obtain high-performance devices without degradation by grain boundaries. Various growth techniques were investigated to achieve SiGe on insulator. For example, solid-phase crystallization enables growth of poly-SiGe films on insulator. However, high-temperature annealing at a temperature above 500oC is necessary to induce crystallization of SiGe.For low-temperature growth of SiGe on insulator, we have been investigating metal-induced crystallization using gold as catalyst [1-4]. These efforts enable low-temperature growth of orientation-controlled large-grain Ge-rich SiGe on insulator at controlled-positions. LOW-TEMPERATURE GROWTH OF ORIENTATION-CONTROLLED LARGE-GRAIN BY INTERFACE-NUCLEATION In order to obtain poly-SiGe films on insulator at low temperatures, we have developed gold-induced crystallization (GIC), where a-SiGe/Au stacked structures are employed, as shown Fig. 1 [1]. Owing to bond-modulation by catalysis, GIC proceeds at ~250oC for SiGe with the whole Ge fractions (0−100%). However, for these samples, layer-exchange of the stacked structures results in formation of randomly-oriented poly-SiGe films on insulator.To achieve orientation-controlled large-grains by GIC, randomly-oriented bulk nucleation in Au layers should be suppressed and instead, preferentially-oriented nucleation at Au/insulator interfaces should be dominated. This domination of interface nucleation can be achieved through retarding Si and Ge supply into Au layers by introducing diffusion barrier between a-SiGe and Au layers, because interface nucleation is energetically favorable compared to bulk nucleation. Use of anisotropy of free energy of SiGe nuclei is a key for orientation control. Based on these ideas, we have examined control of nucleation site by modulating atomic diffusion in the layer-exchange process, as shown in Fig. 2(a). As a result, orientation-controlled large-grain Ge-rich SiGe crystals are realized on amorphous insulator at a low temperature (≤300oC) [2]. The growth of orientation controlled large-grains (≥50 μm) on flexible substrates becomes possible, as shown in Figs. 2(b)-2(d) [3]. The large grains provide high carrier mobility (160 cm2/Vs) [3]. POSITION CONTROL BY SPATIALLY-MODULATED NUCLEATION In order to control the positions of large grains, micro-opening in diffusion barrier is examined, as shown in Fig. 3(a) [4]. By decreasing the diameter of the micro-opening below 3 μm, a single interface-nucleus is selectively generated. This enables growth of orientation-controlled large-grains (≥10 μm) at controlled positions, as shown in Figs. 3(b) and 3(c). This technique will facilitate fabrication of high-performance Ge-rich SiGe thin-film devices for flexible electronics.

Methods used to deposit and integrate solution-processed materials to fabricate thin film transistors by ink-jet printing are presented. We demonstrate successful integration of a complete additive process with the fabrication of simple prototype TFT backplanes on glass and on flexible plastic substrates, and we discuss the factors that make the process possible. Surface energy control of the gate dielectric layer allows printing of the metal source-drain contacts with gaps as small as 10 um as well as the polymer semiconductor whose electronic properties are very sensitive to surface energy. Silver nanoparticles are used as gate and data metals, and a polythiophene derivative (PQT-12) is used as the semiconducting layer, and the gate dielectric is a polymer. The maximum processing temperature used is 150&deg;C, making the process compatible with flexible substrates. The I_ON/I_OFF ratio is 10⁵-10⁶, and TFT mobilities of 0.05 cm²/Vs were obtained. The electrical stability of the all-printed transistors was compared to conventional fabrication methods and it is shown to be acceptable for array operation. Here we discuss the yield of the printing process and show arrays that are integrated with E-ink media to form flexible paper-like displays.

Solar cells on lightweight and flexible substrates have advantages over glass- or wafer-based photovoltaic devices in both terrestrial and space applications. Here, we report on development of amorphous silicon thin film photovoltaic modules fabricated at maximum deposition temperature of 150 °C on 100 μm thick polyethylene-naphtalate plastic films. Each module of 10 cm × 10 cm area consists of 72 a-Si:H n-i-p rectangular structures with transparent conducting oxide top electrodes with Al fingers and metal back electrodes deposited through the shadow masks. Individual structures are connected in series forming eight rows with connection ports provided for external blocking diodes. The design optimization and device performance analysis are performed using a developed SPICE model.

Chemiresistor-based vapour sensors made from network films of single-walledcarbon nanotube (SWNT) bundles on flexible plastic substrates (polyethyleneterephthalate, PET) can be used to detect chemical warfare agent simulants for thenerve agents Sarin (diisopropyl methylphosphonate, DIMP) and Soman (dimethylmethylphosphonate, DMMP). Large, reproducible resistance changes (75–150%),are observed upon exposure to DIMP or DMMP vapours, and concentrations aslow as 25 ppm can be detected. Robust sensor response to simulant vapours isobserved even in the presence of large equilibrium concentrations of interferentvapours commonly found in battle-space environments, such as hexane, xylene andwater (10 000 ppm each), suggesting that both DIMP and DMMP vapours arecapable of selectively displacing other vapours from the walls of the SWNTs.Response to these interferent vapours can be effectively filtered out by using a2 µm thick barrier film of the chemoselective polymer polyisobutylene(PIB) on the SWNT surface. These network films are composed of a1–2 µm thick non-woven mesh of SWNT bundles (15–30 nm diameter), whose sensor response isqualitatively and quantitatively different from previous studies on individualSWNTs, or a network of individual SWNTs, suggesting that vapour sorptionat interbundle sites could be playing an important role. This study also showsthat the line patterning method used in device fabrication to obtain any desiredpattern of films of SWNTs on flexible substrates can be used to rapidly screensimulants at high concentrations before developing more complicated sensor systems.

ZnO nanowire field effect transistors were fabricated on flexible substrates of poly(ether sulfone) (PES) by bottom-up and photolithographic processes and their electrical characteristics were investigated. The fabrication of the flexible devices was achieved at a processing temperature of 150 °C. A representative top-gate ZnO nanowire field effect transistor (FET) on a flexible substrate exhibits a peak transconductance of 179 nS, a field effect mobility of 10.7 cm2 V-1 s-1, and an Ion/Ioff ratio of 106. When the PES substrate is bent under a strain of 0.77%, the decrement of the drain current for the FET at VGS=10 V is less than 3%.