Chapter 3 - Random Number Generation

We present a cascaded chaotic system as a hardware-efficient way of elevating the entropy in the chaotic behavior of CMOS-based chaotic maps. The chaotic performance of the proposed scheme is evaluated using the bifurcation plot, Lyapunov exponent, Kolmogorov entropy, and correlation coefficient. The improved entropy in the chaotic region benefits many security applications and is demonstrated experimentally in a new random number generator (RNG) design based on the proposed map. Unlike conventional mathematical chaotic map-based digital pseudo-random number generators (PRNG), the proposed design is not completely deterministic due to the high susceptibility of the core analog circuit to inevitable noise which renders this design closer to a true random number generator (TRNG). By leveraging the improved chaotic performance of the transistor-level cascaded map, significantly low area and power overhead are achieved in the RNG design and it passes three statistical tests namely, NIST, Diehard, and TestU01.

Pseudo random number generators (PRNG) play a key role in various security and cryptographic applications where the performance of these applications is directly related to the quality of generated random numbers. The design of such random number generators is a challenging task. In this paper, we propose an application of Hopfield Neural Networks (HNN) as pseudo random number generator. This is done based on a unique property of HNN, i.e., its unpredictable behavior under certain conditions. We compare the main features of ideal random number generators with those of PRNG based on Hopfield Neural Networks. We use a battery of statistical tests developed by National Institute of Standards and Technology (NIST) to measure the performance, and to evaluate the quality of the proposed Hopfield random number generator.

The design of integrated-circuit random number generators is receiving increased attention for the purpose of secure communications. Many high-speed cryptographic circuit-systems require a nondeterministic source of random bits. The security of these systems depends on the predictability or level of randomness of the generated bit stream. One popular method of generating random bits is to use the random frequency variations of free-running ring oscillators. This paper presents a behavioral model for the simulation of oscillator-based random number generators. The method of random number generation using oscillators is described and important design issues are stated. A model is developed and simulation results are presented for the purpose of addressing these design issues.

Random number generation is a fundamental aspect of computer science, cryptography, simulations, and statistical sampling. This paper explores the definitions, classifications, and implementations of random and pseudo-random number generators (RNGs and PRNGs). We examine true random number generators (TRNGs), which derive randomness from physical phenomena, and pseudo-random number generators (PRNGs), which use deterministic algorithms to produce sequences that mimic randomness. Case studies, including Random.org, HotBits, laser-based RNGs, and the Linux random number generator, illustrate practical implementations. We also discuss vulnerabilities, security considerations, and the importance of entropy in generating unpredictable sequences.

This paper presents the FPGA (Field Programmable Gate Array) implementation and the coupling analysis of a metastability-based random number generator (RNG). The metastability is acquired through exploiting transient effect ring oscillators (TEROs) and the random bit generation is accomplished through irregular sampling of regular waveform method. As the proposed RNG is made up of only digital logic gates, it is prototyped on a Xilinx ZedBoard Zynq-7000 evaluation platform. It is demonstrated that the RNG output bitstream satisfies NIST 800-22 statistical tests of randomness without any need for post-processing and the proposed RNG can provide high data throughput. Furthermore, the proposed RNG uses less number of components compared to previously reported TERO based RNGs, thus enabling lower power consumption and smaller footprint. Additionally, the proposed RNG is subjected to correlation based cryptanalysis study. In classical ring oscillator (RO) based RNGs, the ring oscillators are required to be placed at a distance from each other to avoid locking phenomenon that may occur due to coupling between adjacent ROs. This study demonstrates that unlike classical RO based RNGs, the proposed RNG is insensitive to locking phenomenon and TERO structures are not required to be placed way from each other. Therefore, the proposed method lead to a more compact RNG design compared to classical RO based RNGs.

The cryptographic security provided by various techniques of random number generator (RNG) construction is one of the developing research areas today. Among various types of RNG, the true random bit generator (TRBG) can be considered as the most unpredictable and most secure because its randomness seed is generated from chaotic sources. This paper proposes a design of TRBG model based on double-scroll attractors circuits with GST memristor. After implementation and simulation of the chaotic circuit with GST memristor emulator, the chaotic behavior of the output voltage and inductor current were received. Moreover, their dependence on the input voltage revealed the close to double-scroll form. The randomness generated from the proposed circuit was tested by analysis of the Fast Fourier Transform (FFT) and Lyapunov exponents of the output voltage.

There is a wide range of problems devoted to the possibility of traversing the maze by finite automatons. They can differ as the type of maze (it can be any graph, even infinite), and the automata themselves or their number. In particular, a finite state machine can have a memory (store) or a random bit generator. In the future, we will assume that the robot — is a finite automaton with a random bit generator, unless otherwise stated. In addition, in this system, there can be stones-an object that the finite state machine can carry over the graph, and flags-an object whose presence the finite state machine can only observe. This topic is of interest due to the fact that some of these problems are closely related to problems from probability theory and computational complexity. This paper continues to address some of the open questions posed in Ajans’s thesis: traversal by a robot with a random bit generator of integer spaces in the presence of a stone and a subspace of [4] flags. Such problems help to develop the mathematical apparatus in this area, in addition, in this work we investigate the almost unexplored behavior of a robot with a random number generator. It is extremely important to transfer combinatorial methods developed by A. M. Raigorodsky in the problems of this topic. This work is devoted to the maze traversal by a finite automaton with a random bit generator. This problem is part of the actively developing theme of traversing the maze by various finite automata or their teams, which is closely related to problems from the theory of complexity of calculations and probability theory. In this work it is shown what dimensions a robot with a generator of random bits, and you can get around stone integer space with flag subspace. In this paper, we will study the behavior of a finite automaton with a random bit generator on integer spaces. In particular, it is proved that the robot bypasses Z 2 and cannot bypass Z 3 ; the c ++ robot bypasses Z 4 and cannot bypass Z 5 ; a robot with a stone and a flag bypasses Z 6 and cannot bypass Z 7 ; a robot with a stone and a flag plane bypasses Z 8 and cannot bypass Z 9 .

Much scientific work has focused on the generation of random numbers as well as the distribution of said random numbers for use as a cryptographic key. However, emphasis is often placed on one of the two to the exclusion of the other, but both are often simultaneously important. Here we present a simple hybrid free-space link scheme for both the generation and secure distribution of (pseudo-)random numbers between two remote parties, drawing the randomness from the stochastic nature of atmospheric turbulence. The atmosphere is simulated using digital micro-mirror devices for efficient, all-digital control. After outlining one potential algorithm for extracting random numbers based on finding the centre-of-mass (COM) of turbulent beam intensity profiles, the statistics of our experimental COM measurements is studied and found to agree well with the literature. After implementing the scheme in the laboratory, Alice and Bob are able to establish a string of correlated random bits with an 84% fidelity. Finally, we make a simple modification to the original setup in an attempt to thwart the hacking attempts of an eavesdropper, Eve, who has access to the free-space portion of the link. We find that the fidelity between Eve’s key and that of Alice/Bob is 54%, only slightly above the theoretical minimum. Atmospheric turbulence could hence be leveraged as an added security measure, rather than being seen as a drawback.

Security and privacy problems in communication systems and social media platforms where digital image/video are shared almost always, have attracted researchers interest on information security. Starting from this point of view, a novel one-dimensional chaotic maps based pseudo random bit generator is proposed to make a significant contribution to the literature about protection of personal data in any network. Electronic circuit realizations of Logistic and Tent maps as entropy source are designed on Orcad-Pspice environment and state variables are inputted to novel post-processor algorithm. The rest of main blocks of proposed pseudo random bit generator design are built up fixed-point binary conversion algorithm, XOR processor and H function post-processor. The generated pseudo random bit series are tested by using NIST 800.22 statistical test suite and applied to color image encryption in order to show the effectiveness of proposed design. Cryptanalysis processes such as histogram, NPCR-UACI and correlation analysis are demonstrated. Analysis results show that the proposed design can be used successfully in many secure communication and media transmission applications.

Random bit generation (RBG) with chaotic semiconductor lasers has been extensively studied because of its potential applications in secure communications and high-speed numerical simulations. Researchers in this field have mainly focused on the improvement of the generation rate and the compactness of the random bit generators. In this paper, we experimentally demonstrate the existence of two regimes of fast RBG using a single chaotic laser subjected to delayed optical feedback: the first one is based on the extraction of all min-entropy contained in each random sample, and the second one is to demonstrate a possibility of increasing the generation rate by extracting 55 bits from each variable.

The strength of a cryptographic function depends on the amount of entropy in the cryptovariables that are used as keys. Using a large key length with a strong algorithm is false comfort if the amount of entropy in the key is small. Unfortunately the amount of entropy driving a cryptographic function is usually overestimated, as entropy is confused with much weaker correlation properties and the entropy source is difficult to analyze. Reliable, high speed, and low cost generation of non-deterministic, highly entropic bits is quite difficult with many pitfalls. Natural analog processes can provide non-deterministic sources, but practical implementations introduce various biases. Convenient wide-band natural signals are typically 5 to 6 orders of magnitude less in voltage than other co-resident digital signals such as clock signals that rob those noise sources of their entropy. To address these problems, we have developed new theory and we have invented and implemented some new techniques. Of particular interest are our applications of signal theory, digital filtering, and chaotic processes to the design of random number generators. Our goal has been to develop a theory that will allow us to evaluate the effectiveness of our entropy sources. To that end, we develop a Nyquist theory for entropy sources, and we prove a lower bound for the entropy produced by certain chaotic sources. We also demonstrate how chaotic sources can allow spurious narrow band sources to add entropy to a signal rather than subtract it. Armed with this theory, it is possible to build practical, low cost random number generators and use them with confidence.

A semiconductor laser with distributed feedback from a fiber Bragg grating (FBG) is investigated for random bit generation (RBG). The feedback perturbs the laser to emit chaotically with the intensity being sampled periodically. The samples are then converted into random bits by a simple postprocessing of self-differencing and selecting bits. Unlike a conventional mirror that provides localized feedback, the FBG provides distributed feedback which effectively suppresses the information of the round-trip feedback delay time. Randomness is ensured even when the sampling period is commensurate with the feedback delay between the laser and the grating. Consequently, in RBG, the FBG feedback enables continuous tuning of the output bit rate, reduces the minimum sampling period, and increases the number of bits selected per sample. RBG is experimentally investigated at a sampling period continuously tunable from over 16 ns down to 50 ps, while the feedback delay is fixed at 7.7 ns. By selecting 5 least-significant bits per sample, output bit rates from 0.3 to 100 Gbps are achieved with randomness examined by the National Institute of Standards and Technology test suite.

In this paper, we propose a new HW (hardware)-based truly random bit sequence generation method and show its experimental results. The method can be used in a personal computer and ensures the randomness of the obtained bit sequence. We can generate a HW-based truly random bit sequence at high speed based on the realtime clock deviation which is unpredictable. Also, the random bit sequences generated by this method have passed ldquoA Statistical Test Suite for Random and Pseudorandom Number Generators for Cryptographic Applications (NIST Special Publication 800-22)rdquo with appropriate parameters. The proposed random bit sequence generation method can be used in many cryptographic applications.

Pseudo random number generators (PRNGs) are crucial for numerous applications in HPC ranging from molecular dynamics to quantum chemistry, and hydrodynamics. These applications require high throughput and good statistical quality from the PRNGs - especially for parallel computing where long pseudo-random sequences can be exhausted rapidly. Although a handful PRNGs have been adapted to parallel computing, they do not fully exploit the features of wide-SIMD many-core processors and GPU accelerators in modern supercomputers. Multiple Recursive Generators (MRGs) are a family of random number generators based on higher order recursion, which provide statistically high-quality random number sequences with extremely long-recurrence lengths, and deterministic jump-ahead for effective parallelism. We reformulate the MRG8 (8th-order recursive implementation) for Intel's KNL and NVIDIA's P100 GPU - named MRG8-AVX512 and MRG8-GPU respectively. Our optimized implementation generates the same random number sequence as the original well-characterized MRG8. We evaluated MRG8-AVX512 and MRG8-GPU together with vender tuned random number generators for Intel KNL and GPU. MRG8-AVX512 achieves a substantial 69% improvement compared to Intel's MKL, and MRG8-GPU shows a maximum 3.36x speedup compared to NVIDIA's cuRAND library.

Today, cryptographic security depends primarily on having strong keys and keeping them secret. The keys should be produced by a reliable and robust to external manipulations generators of random numbers. To hamper different attacks, the generators should be implemented in the same chip as a cryptographic system using random numbers. It forces a designer to create a random number generator purely digitally. Unfortunately, the obtained sequences are biased and do not pass many statistical tests. Therefore an output of the random number generator has to be subjected to a transformation called post-processing. In this paper the hash function SHA-256 as post-processing of bits produced by a combined random bit generator using jitter observed in ring oscillators (ROs) is proposed. All components – the random number generator and the SHA-256, are implemented in a single Field Programmable Gate Array (FPGA). We expect that the proposed solution, implemented in the same FPGA together with a cryptographic system, is more attack-resistant owing to many sources of randomness with significantly different nominal frequencies.