Chapter 8 - Interface Design

Interface design, as a medium of communication between human and computer, transmits information through design semantics and makes the user generate corresponding emotional changes, which affects the user experience. This paper explores the shape semantic and color semantics of the interface design by referring to the product semantics, and by using the theory of Kansei engineering, analyzes the influence of design semantics on the users’ emotional images. Experimental results show that the design semantics affect the user’s emotional image, and the influence of color semantics on the user’s emotional image in the interface design is greater than that of the shape semantics. Therefore, in the interface design process, according to different product positioning, select the appropriate graphic elements and color collocation, can accurately convey the information expressed by the designer, and match the emotions generated by the user.

Today, the embedded systems field is growing rapidly, ranging from low-end systems such as cellular phones, PDAs, smart cards to high-end systems such as gateways, firewalls, storage servers, and web server. Security of embedded system becomes a paramount issue in embedded system design. Compared to an embedded system's functionality and other design metric (e.g., area, performance, power), security is currently specified by system architects in a vague and imprecise manner. This paper proposes a fuzzy integrated security evaluation method based on man-computer combined data collection and fuzzy expert evaluation in Delphi method. The method could reduce the subjectivity of expert evaluation and alleviate the difficulty of data collection and makes possible a better combination of qualitative and quantitative evaluations. Firstly, the hierarchy structure model of embedded system security is constructed. Secondly, according to data collected and the evaluation comment of each expert, the subjection degree matrix is constructed. Finally, a new concept of ldquodegree of assurancerdquo is presented for the quantificational evaluation of embedded system security. In this paper a study of a wireless biometric authentication device is also shown. The case illustrates that the method can be easily used and its results conform to the actual situation.

Since the latest IC technology supports the integration of soft or hard CPU cores with dedicated logic on a single silicon chip, it leads FPGA into embedded system design and arouses the innovation of design methodology. In this paper, a general introduction of embedded system and the FPGA-based SOPC development are discussed. The FPGA-based embedded system can contain microprocessor IP cores and support embedded operating system. The mixed design flow is illustrated and a data transmitting/receiving converter between serial port and network interface is taken as a design example.

This chapter will address the issues of interface design and incorporation of human behavior factors into the design process. The traditional process engineering approach to software development embeds interface design as a task component. However, the interface design process has grown as a discipline and is beyond the single process within a larger scheme that may be lost on the priority list. The functionality and specifications for software developers tend to focus on the project and less on the product. In addition, bridging the gap of the design process to include global elements of the software is an issue for products that are internationally distributed. It is something that the computer industry must address and has been historically unsuccessful at doing. Incorporating human interactivity and screen design requires an understanding of the user and their behavior that is not part of the traditional tasks of most designers and programmers. This chapter presents the importance of human interactivity and interface design as an embedded process.

A user interface is a point in the system where a human being interacts with a computer. This chapter discusses several different types of direct interfaces and the interface design process. It introduces some important principles of user interface design. The chapter focuses on certain general principles associated with direct user interface design. The interface can incorporate hardware, software, procedures, and data. Some user interfaces rely on abbreviated commands or acronyms. Command-based interfaces require considerable user training, however, and it is unreasonable to expect users to memorize all the commands without referencing a command template. Object-oriented interfaces, also called icon-based interfaces or graphic user interfaces, have become increasingly common since the introduction of the Apple Macintosh and Microsoft’s Windows operating systems. Expert system interfaces utilize natural language processing. The chapter also discusses strengths, weaknesses, and limitations associated with specific interfaces or interface design techniques.

Interface design and interaction testing is not a completely robust or scientific process. Rather, it is an artful, iterative, social process regulated by inter- or multi-disciplinary design teams. Lamentably, the design trajectory and iterations are often left out or partially communicated in the description of a published design. We offer display design considerations considering AI and propose a modular structure for the interface design and interaction testing process of teams. The key feature of the structure is that it considers display design and display interaction testing and general experimental design and enables teams to transparently communicate how they start, traverse, and end their design cycles. The system can be accessed via an established Industrial Engineering Society on the world wide web. Such a structure would enable studying where innovation and failure happen through iterations of steps taken by different design teams. Subsequently, the information can be used to enrich future research.

Background: In order to better realize the real-time on-line monitoring of the working state of the coal mill and determine the status of the equipment used in the coal mill, the intelligent embedded system of the coal mill based on DSP was studied. Methods: Firstly, the working requirement of the coal mill and the task of data acquisition system have been briefly introduced, and the requirement of the overall embedded system design has been put forward. Then, the structure design was analysed including both hardware and software, and the embedded system design including digital signal processing, and data acquisition was completed. All patents related to intelligent embedded data acquisition and storage system are described in detail. Results: After that, the function test of the actual coal mill embedded system was carried out, which proved the practicability and reliability of the designed embedded system for coal mill and based on DSP. Conclusion: The embedded system improves the automation level of coal mill, and is of great significance to the on-line monitoring and research of large-scale machinery and equipment in the future.

With regard to performance well established SW-only design methodologies proceed by making the initial specification run first, then by enhancing its functionality and finally by optimizing it. When designing Embedded Systems (EbS) this approach is not viable since decisive design decisions like e.g. the estimation of required processing power or the identification of those parts of the specification which need to be delegated to dedicated HW depend on the fastness and fairness of the initial specification. We here propose a sequence of optimization steps embedded into the design flow, which enables a structured way to accelerate a given working EbS specification at different layers. This sequence of accelerations comprises algorithm selection, algorithm transformation, data transformation, implementation optimization and finally HW acceleration. It is analyzed how all acceleration steps are influenced by the specific attributes of the underlying EbS. The overall acceleration procedure is explained and quantified at hand of a real-life industrial example.

The steady increase in complexity of high-end embedded systems goes along with an increasingly complex design process. We are currently still in a transition phase from Hardware-Description Language (HDL) based design towards virtual-platform-based design of embedded systems. As design complexity rises faster than developer productivity a gap forms. Restoring productivity while at the same time managing increased design complexity can also be achieved through focussing on the development of new tools and design methodologies. In most application areas, high-level modelling languages such as SystemC are used in early design phases. In modern software development Continuous Integration (CI) is used to automatically test if a submitted piece of code breaks functionality. Application of the CI concept to embedded system design and testing requires fast build and test execution times from the virtual platform framework. For this use case the ability to save a specific state of a virtual platform becomes necessary. The saving and restoring of specific states of a simulation requires the ability to serialize all data structures within the simulation models. Improving the frameworks and establishing better methods will only help to narrow the design gap, if these changes are introduced with the needs of the engineers and developers in mind. Ultimately, it is their productivity that shall be improved. The ability to save the state of a virtual platform enables developers to run longer test campaigns that can even contain randomized test stimuli. If the saved states are modifiable the developers can inject faulty states into the simulation models. This work contributes an extension to the SoCRocket virtual platform framework to enable snapshotting. The snapshotting extension can be considered a reference implementation as the utilization of current SystemC/TLM standards makes it compatible to other frameworkds. Furthermore, integrating the UVM SystemC library into the framework enables test driven development and fast validation of SystemC/TLM models using snapshots. These extensions narrow the design gap by supporting designers, testers and developers to work more efficiently.

Welcome to the DATE 08 Conference Proceedings. DATE combines the world's favourite electronic systems design conference and Europe's leading international exhibition for electronic design, automation and test, from system level hardware and software implementation right down to integrated circuit design. The DATE 08 event features a technical program with 77 sessions covering the latest developments in system design and embedded software, IC design/test methodologies and EDA tools, together with an exhibition with the leading EDA, silicon and IP providers showing their new products and services. Challenges that you all face or soon will face in your daily practice are the increasing design complexity of highly integrated systems, the introduction of reconfigurability and embedded software, and the control of power and variability in nanometer IC designs. All these issues will be addressed in this year's DATE event. For the 11th successive year DATE has prepared an exciting technical programme, with the help of the more than 400 members of the Technical Programme Committee, who dedicated their time to thoroughly review the 839 submissions in 37 topics, ranging from system level down to circuit design and covering all the most relevant application domains. The submissions are organised in 4 major areas: D --- Design Methods, Tools, Algorithms and Languages A --- Application Design T --- Test Methods, Tools and Innovative Experiences E --- Embedded Software After a thorough review and selection process (with an average of 5 reviews per paper), finally 198 regular papers were selected for presentation at the conference. Additionally, there are 46 Interactive Presentations that are organised in 5 IP sessions. Together with the invited special sessions (panels, embedded tutorials and hot topic sessions), this has resulted in a high-quality technical program. The technical program provides a wide but high-quality coverage of design, design automation and test topics, from the system level to the integrated circuit level. Compared with previous years, submissions in the Embedded Software track has increased by 50%, showing a clear trend towards a comprehensive system design focus with integrated hardware and software solutions. DATE has established itself firmly as a true Electronic System Design Conference. This year the conference is held in Germany, at the ICM in Munich and spans an entire working week from Monday March 10 to Friday March 14. On Monday, eleven pre-conference tutorials will be given. The three-full day tutorials cover topics of great interest for system design. The first tutorial deals with techniques to automatically realising embedded system from high-level functional models. The second tutorial addresses the different issues related to communication based design and architectures in automotive electronic systems. The third tutorial discusses several key concepts on system-level design and application mapping for wireless and multimedia MPSoC architectures. Furthermore, eight half-day tutorials are also given, which cover a wide spectrum of topics on specification, modelling, design and test. The main conference opens on Tuesday March 11, with two very interesting and complementary keynote speeches. Dominique Vernay, Chief Technical Officer for Thales, will talk about the challenges of embedded systems design, and Giovanni de Micheli, Professor at EPFL, will present his views on designing micro/nano systems for a safer and healthier tomorrow. On the same day, the Executive Track offers a series of business panels with executives discussing hot topics in design: the perils of 45 nanometers, the changes in EDA strategies from IDM, to fablite to fabless, and embedded systems level design strategies. DATE 08 will again offer two specific days related to special themes. On Wednesday March 12, a special full-day track is devoted to Automotive Electronics---Software and Architecture. This special-day track will focus on the challenges faced by the automotive supply chain with particular attention to system and software architecture design. It provides a comprehensive analysis of the evolution of automotive architectures, including ECUs, sensors and communication standards and discusses how new methods, tools and standards for interoperability and component-based design can deal with the increasing complexity of software systems and their need for reliability and guaranteed timely behaviour. In addition, it addresses to what degree existing standards, including AUTOSAR and FLEXRAY and model-based development, can support the development of safety and time-critical software. On Thursday March 13, a second special full-day track focuses on Dependable Embedded Systems. This track will address both conceptual and applied issues for design, analysis and validation of dependable embedded systems. The utility of embedded systems and services is based, in large part, on our depending on their sustained functionality in spite of the encountered operational or malicious disruptions. As the number of transient and also permanent disruptions (given the decreasing device geometries, higher device density, lower voltage latching, faster clocks etc) is expected to increase substantially, this will not only be a key issue for the hardware community but also the systems community in general. Solutions using a combination of hardware and software might be more effective than hardware-only or software-only solutions. This track focuses on both conceptual and applied issues for design, analysis and validation of dependable embedded systems. Besides these special tracks, the main conference is organized in six parallel tracks of sessions, three devoted to design methods, tools, algorithms and languages, one to application design, one to test methods, tools and innovative experiences, and finally one to embedded software. The presentations of the selected regular papers in these parallel tracks are complemented by nine Special Sessions and two Invited Industrial Sessions. The special sessions are organized in the form of panels, hot topics, and embedded tutorials. The topics to be covered include quantitative evaluation for embedded systems design, design and manufacturing at 32 and 22nm, software for wireless networked embedded systems, test challenges for low power devices, quantitative productivity measurement in IC design, and 3D Integration. The two invited industrial sessions deal with industrial system designs in transportation and information technologies. To emphasise that DATE is the major event for the designers, DATE 08 features also invited sessions where Europe's famous consumer industry presents their best designs and design practices. Friday March 14 is the day for the DATE workshops. DATE 08 offers workshops on current and emerging important issues in design, test, EDA and software to complement the regular conference. They provide a unique opportunity for the various research and design communities to spend a day discussing the latest and the best, sharing their experiences and visions. This year's workshop program includes eight workshop themes. Four workshops are related to software engineering, ranging from dependable software to modelling, analysis and development tools. Four other workshop themes cover a variety of topics such as the impact of process variations on design and test, the merging world of Nano-Electro-Mechanical Systems, new directions in high level synthesis, and heterogeneous reconfigurable hardware. Each workshop features presentations, invited or submitted, from highly distinguished academic and industrial researchers. Finally, throughout the conference days, DATE offers a comprehensive overview of commercial design and verification tools in its large exhibition hall. Exhibitors include EDA vendors, silicon, FPGA and IP providers showing their new products and services. In addition, there is an Exhibition Theatre featuring talks from engineering managers of the leading electronic manufacturers on first-hand design experiences of commercial EDA tools. New this year is the European projects village where different European and large government funded projects will be able to show their ongoing research and results to the design community and have the opportunity for internal meetings and discussions. The DATE week will be also an opportunity for students and universities to show their research work, through the PhD Forum on Monday evening and the University Booth where hardware and software demonstrations will be shown by different universities on a rotation schedule. The DATE 08 event's program will be particularly attractive to industrial designers, at analog, IC, FPGA and embedded system level, as well as software designers, to researchers and academics as well as to design managers, and an increasing attendance is expected. We therefore invite you to take full advantage of the many opportunities offered to you by DATE 08, to extend your knowledge and/or business in electronic system's design and to exploit the abundant networking possibilities offered to socialise with colleagues, including fringe meetings and a memorable social party with bands and dancing. We hope that you will all enjoy the DATE 08 Conference and Exhibition.

Objectives: After reading this chapter, the reader should be able to do the following: Define an embedded system. List all aspects related to the design of an embedded system. Provide a step-by-step approach to embedded system design. Discuss design tools and practices related to embedded systems design. Apply embedded system design practices in the design of an Arduino-based microcontroller system employing several interacting subsystems. Provide a detailed design for an autonomous maze navigating robot controlled by the Arduino processing board including hardware layout and interface, structure and UML activity diagrams, and coded algorithm.

Power consumption is a subject of serious consideration in embedded systems design because embedded systems are constrained to stringent power and energy requirements. The mission of lowering power consumption and energy usage of such systems is an important task to prolong their usage in real time situations. In this paper, we study the effects of compiler optimisations on embedded systems energy usage and power consumption in real time situations and the importance of running efficient binary codes in realising a more power efficient and better performing embedded system. Compiler optimisations at various levels involving different architectural features have been experimented and it is shown that architecture driven compiler optimisations have a better impact on reducing power consumption and energy usage in embedded system than blind code optimisations.

In software development, the user interface(UI) design process involves the part from an imagination that begins on a piece of paper where designers share thoughts to the final prototype that is ready to implement. UI designers use a technique of paper prototyping in low-fidelity sketches to implement the conceptual design. Once a design is drawn, it is usually captured within a photograph, then converted to a high-level mockup, and manually translated into a working client-side code by developers. The process consumes considerable effort and also delays the design process. Recently, researchers attempted to recreate UI from their sketches using code generation techniques. In this paper, we present a system for automatic code generation that combines recent advances in computer vision and deep learning for translating a sketched wireframe into a UI skeleton code. The proposed system has two main components: component recognition and code generation. The component recognition learns to extract visual features and their spatial layouts from sketched UI images. The code generator creates the equivalent UI skeleton codes based on the information from the detection model. A layout algorithm has been developed to resolve the overlapping of components and structure the layout. The evaluation result of the component recognition model indicates that the Faster R-CNN with Inception ResNet v2 backbone model achieved a mean average precision (mAP) of 95.5 %, among the other trained models. To evaluate the generator, we conducted a user study based on visual similarities between input image and the rendered UI.

Memory is a scarce resource during embedded system design. Increasing memory often increases packaging costs, cooling costs, size, and power consumption. This article presents CRAMES, a novel and efficient software-based RAM compression technique for embedded systems. The goal of CRAMES is to dramatically increase effective memory capacity without hardware or application design changes, while maintaining high performance and low energy consumption. To achieve this goal, CRAMES takes advantage of an operating system's virtual memory infrastructure by storing swapped-out pages in compressed format. It dynamically adjusts the size of the compressed RAM area, protecting applications capable of running without it from performance or energy consumption penalties. In addition to compressing working data sets, CRAMES also enables efficient in-RAM filesystem compression, thereby further increasing RAM capacity. CRAMES was implemented as a loadable module for the Linux kernel and evaluated on a battery-powered embedded system. Experimental results indicate that CRAMES is capable of doubling the amount of RAM available to applications running on the original system hardware. Execution time and energy consumption for a broad range of examples are rarely affected. When physical RAM is reduced to 62.5% of its original quantity, CRAMES enables the target embedded system to support the same applications with reasonable performance and energy consumption penalties (on average 9.5% and 10.5%), while without CRAMES those applications either may not execute or suffer from extreme performance degradation or instability. In addition to presenting a novel framework for dynamic data memory compression and in-RAM filesystem compression in embedded systems, this work identifies the software-based compression algorithms that are most appropriate for use in low-power embedded systems.

RETRACTED: Computer aided art design Ps course teaching based on FPGA and embedded system graphics processing