Compensation of Long-Term Memory Effects on GaN HEMT-Based Power Amplifiers

With the increased power density of gallium nitride (GaN) high electron mobility transistors (HEMTs), effective cooling is required to eliminate the self-heating effect. Incorporating diamond into GaN HEMT is an alternative way to dissipate the heat generated from the active region. In this review, the four main approaches for the integration of diamond and GaN are briefly reviewed, including bonding the GaN wafer and diamond wafer together, depositing diamond as a heat-dissipation layer on the GaN epitaxial layer or HEMTs, and the epitaxial growth of GaN on the diamond substrate. Due to the large lattice mismatch and thermal mismatch, as well as the crystal structure differences between diamond and GaN, all above works face some problems and challenges. Moreover, the review is focused on the state-of-art of polycrystalline or nanocrystalline diamond (NCD) passivation layers on the topside of GaN HEMTs, including the nucleation and growth of the diamond on GaN HEMTs, structure and interface analysis, and thermal characterization, as well as electrical performance of GaN HEMTs after diamond film growth. Upon comparing three different nucleation methods of diamond on GaN, electrostatic seeding is the most commonly used pretreatment method to enhance the nucleation density. NCDs are usually grown at lower temperatures (600–800 °C) on GaN HEMTs, and the methods of “gate after growth” and selective area growth are emphasized. The influence of interface quality on the heat dissipation of capped diamond on GaN is analyzed. We consider that effectively reducing the thermal boundary resistance, improving the regional quality at the interface, and optimizing the stress–strain state are needed to improve the heat-spreading performance and stability of GaN HEMTs. NCD-capped GaN HEMTs exhibit more than a 20% lower operating temperature, and the current density is also improved, which shows good application potential. Furthermore, the existing problems and challenges have also been discussed. The nucleation and growth characteristics of diamond itself and the integration of diamond and GaN HEMT are discussed together, which can more completely explain the thermal diffusion effect of diamond for GaN HEMT and the corresponding technical problems.

The high frequency capability and low on-state losses of Gallium Nitride (GaN) transistors offer the potential to increase converter efficiency and/or reduce heatsink and passive component size. This paper investigates the use of GaN technology to enhance the performance of power factor correction (PFC) and LLC converters for battery charging applications. First the efficiency performance of non-isolated PFC converters using GaN transistors is compared by simulation, the asymmetric bridgeless PFC converter is shown to achieve the best efficiency, with a predicted figure of 99% in a 1MHz, 200W design. The predictions are validated by an experimental prototype using a GS66502B, GaN Systems E-mode GaN transistor. Then the efficiency comparison of the PFC and LLC converter using GaN devices for battery charging applications is included in the paper. The experimental results of the PFC converter with GaN devices are also included. Additionally, this paper includes the analysis and design of a common mode input filter for the GaN-based high frequency converters for battery charging application. The size of both the converters using GaN devices is reduced by 40% than the converters based on Si devices. The switching loss comparison of GaN and Si devices are also included in the paper.

AlGaN/GaN high-electron-mobility transistors (HEMTs) for applications in radiation environments has required the exact determination of their radiation hardness. Although bulk GaN is the preferred substrate for the epitaxial growth of GaN and AlGaN, (111) silicon is a possible substrate for HEMT devices. The stability of electrical parameters of enhancement-mode (E-mode) GaN HEMTs under gamma irradiation is an essential characterization for reliability. The present work reports the transfer characteristics degradation of E-mode GaN HEMTs under various total dose irradiation from 5krad up to 60Mrads. This represents the first comprehensive total dose study ranging from a few krads up the tens of Mrads. The measured device-to-device variations within groups of devices are presented. The evolutions of critical DC parameters with accumulated total dose is found to be significant at low doses and saturates at high dose levels. The degradation mechanism is very similar to the reported radiation-induced shallow electron traps that trap and release electrons in the near surface GaN and AlGaN layers. Due to the unique properties including high breakdown voltage, high electron mobility and high thermal stability, wide-bandgap semiconductor power electronic devices, especially Gallium Nitride (GaN) high-electron-mobility transistors (HEMTs), have shown great promise in space, defense and nuclear applications, which often involve radiation-hardened electronics that require high radiation tolerance to fluxes of neutrons or gamma ray of devices. To turn the promising potential of GaN HEMTs into reality, investigations on the influence of irradiation on the device performance and reliability are essential. Many studies have investigated the radiation hardness of group III–nitride compound semiconductor devices under various irradiation types, such as electrons, protons, neutrons, and X-rays and at various total irradiation doses. They generally showed higher radiation tolerance compared with Si because of high displacement energy of GaN, demonstrating the favorability of GaN devices in hard radiation environments. Many studies have investigated the influence of 60Co gamma radiation on the device electrical characteristics. However, they were all focusing on depletion mode (D-mode) devices. Enhancement mode (E-mode) GaN-on-Si transistors have been commercially available for years. Their major advantages over D-mode devices are elimination of negative voltage supply and the enabling of direct-coupled FET logic (DCFL) for digital circuits. They also improve the efficiency of commercial DC-DC converters in various power levels and topologies. A previous work on gamma radiation of E-mode GaN-on-Si HEMTs only reported cumulative total doses of up to 1 Mrads (Si). The present work provides a complete coverage of low-to-high irradiation doses from 5krads up to 60Mrads (Si), for commercially available E-mode GaN HEMTs and the devices are characterized to gauge variations in the critical DC parameters. To the best of the author’s knowledge, the present work is the first to investigate the gamma radiation tolerance of E-mode GaN HEMTs covering such a wide range of total doses. This facilitates the observation of the complete degradation behavior of DC parameters in hard radiation applications of the E-mode GaN HEMTs. The devices were supplied in the form of 0.9mm square passivated die with round solder bumps for contacts. They have a rated continuous drain-to-source voltage VDS of 60V, and a rated continuous drain current ID of 1A. These GaN-on-Si devices were fabricated on Si wafers considering process compatibility and cost. An aluminum nitride (AlN) thin layer was grown on the Si wafer to be a seed layer for the AlGaN/GaN heterostructure. Subsequently, the AlGaN/GaN heterostructure was grown on the AlN layer, with a thin AlGaN layer grown above the highly resistive GaN serving as a strained interface between the GaN and AlGaN crystal layers, allowing the creation of a two-dimensional electron gas (2DEG) filled with abundant free electrons with ultra-high mobility. The gate electrode was processed subsequently forming a depletion region under the gate. As an E-mode transistor, the device is turned on by applying a positive bias to the gate. All the irradiations were conducted at room temperature by 60Co gamma-rays with a flux of 318.5Rads (Si)/s, at the dry-cell panoramic gamma irradiator in the University of Maryland Radiation Facilities. The entire irradiation procedure consists of two parts. The first part is higher-dose irradiation with total doses of up to 60Mrads based on two stages. At the first stage, the devices were irradiated at 10Mrads, while at the second stage, the devices were irradiated for another 50Mrads, with three of them taken out after 25Mrads during the second stage. The second part is lower-dose irradiations with total doses of up to 2Mrads. The temperature throughout the irradiation process was monitored to be below 30°C.

Fifth generation communication networks promise extremely high data throughputs, low latencies, and ultra-high reliability by employing small cells in high density networks. This will increase the use of highly inefficient microwave power amplifiers, that exhibit efficiencies sometimes as low as 10% for advanced multi-carrier waveforms. To overcome these inefficiencies and enable next generation technology development, the internal distributed behaviour of the packaged microwave power transistor has to be fully characterised, which is impossible using conventional port-based measurements. In this dissertation, the development of a set of multiphysics measurement techniques that capture the distributed electrical, electromagnetic, and thermal device behaviour is described. These new multiphysics measurement techniques enable the characterisation and direct visualisation of the inefficient device performance, providing a basis for future design optimisation. The techniques combine a non-linear vector network analyser, electro-optic, load-pull and thermoreflectance measurement systems that enable large signal time-domain electrical, distributed multi-harmonic vector electric field (E-field), and transient and steady-state thermal measurements. The multiphysics measurement set-up was used to characterise various transistors and PAs including 260 W silicon (Si) laterally diffused metal oxide semiconductor (LDMOS) field effect transistors in both air-cavity ceramic and plastic packages, 25 W gallium nitride (GaN) on silicon carbide high electron mobility transistors (HEMTs), 250 W GaN HEMT and 360 W Si LDMOS Doherty power amplifiers. The E-field measurements enabled the first ever imaging of parametric odd-mode oscillations within multi-die packaged high-power microwave transistors. Additionally, the measurement system was used to verify the effectiveness of in-package oscillation suppression circuits. As high-resolution E-field measurements can be slow, a surrogate modelling-based measurement algorithm was implemented to accelerate measurements 10-fold. Transient thermal measurements helped to identify abnormal transistor finger-to-finger heating in GaN HEMTs and revealed thermal differences along the gate width in GaN-based asymmetric transistors for Doherty power amplifier applications.

The ever increasing demand for high power levels at higher frequencies from the industry has stimulated extensive research in gallium nitride (GaN) transistor technology over the past two decades. This has led to significant advances of the technology, but the degradation in the device performance due to device self-heating and trap generation in the device epilayers during device operation is still a major challenge with the current GaN high electron mobility transistor (HEMT) technology. This thesis focuses on minimising device self-heating effects by means of efficient heat distribution within the device. Two approaches are analysed in this work. Firstly, the impact on the device DC performance of improved wafer growth conditions by using method called hot-wall MOCVD (metal organic chemical vapour deposition) are investigated. It was found that 2 µm × 100 µm devices on this wafer exhibit only 4% degradation in the saturated output current density at 20 V compared with 13% for devices fabricated on a wafer grown by standard MOCVD growth. This improved performance was attributed to lower thermal boundary resistance achieved by improved growth quality of the epitaxial material layers. In the second approach, the impact on self-heating was investigated through the use of a distributed device channel, i.e. introducing inactive regions along the device channel to distribute the hot spots in the device. Here a planar isolation method was used to achieve planar distributed gate devices that led to low leakage currents below 200 nA/mm at gate voltage of -20 V. A decrease in the peak channel temperature of 30°C was found through thermal simulations over a single 100 µm wide gate finger. Moreover, these distributed channel devices with gate periphery of 10 ×100 µm showed 13 % higher saturated current density than standard devices with the same active device area. The other major issue addressed in this thesis is the so-called current collapse which is a degradation in the output current caused by electron trapping in the device structure. An alternative solution to the conventionally used dielectric passivation is proposed and it entails the use of a thick undoped GaN cap layer to reduce the surface effects by moving the surface further away from the device channel. Drain lag measurements show 15% and 35% decrease in the current at quiescent bias decrease points of [-7 V; 10 V] and [-7 V; 20 V] respectively for the proposed structure compared with 80% decrease and complete current collapse at these quiescent bias points in the same geometry devices on a standard wafer with 2 nm GaN cap layer and a thin 10 nm thin SiNx passivation, respectively. The 10 nm thin passivation layer does not minimise the surface effects, but it protects the devices from oxidation. Finally, a single stage class A amplifier was demonstrated using the developed technology exhibiting peak output power of 30 dBm at 10 GHz and associated power added efficiency of 44% and gain of 10 dB. Also, gain of at least 9.4 dB was shown over 8-13 GHz bandwidth.

본 논문은 GaN(Gallium Nitride) HEMT(High Electron Mobility Transistor) die를 이용하여 S-대역 내부 정합형 전력 증폭기 설계, 제작 그리고 실험 결과에 대해 기술하였다. S-대역 내부 정합형 전력 증폭기를 설계하기 위하여 고유전율을 가지는 기판과 알루미나 기판을 이용하여 입/출력단 정합 회로를 설계 및 제작하였다. 측정 결과로는 펄스 모드로 동작시켰을 때 3 GHz에서 55.4 dBm의 출력 전력, 78 % 드레인 효율 그리고 11 dB의 전력 이득을 얻었다. This paper presents the design, fabrication and measurement results of a S-band internally-matched power amplifier using Gallium Nitride High Electron Mobility Transistor(GaN HEMT) die. In order to fabricate the S-band internally-matched power amplifier, a high dielectric substrate and alumina were used for input/output matching circuits. The measured output power is 55.4 dBm, the drain efficiency is 78 % and the power gain is 11 dB under pulse operation at the frequency of 3 GHz.

Featuring broadband operation and high efficiency, gallium nitride (GaN)-based radio frequency (RF) power amplifiers are key components to realize the next generation mobile network. However, to fully implement GaN high electron mobility transistors (HEMT) for such applications, it is necessary to overcome thermal reliability concerns stemming from localized extreme temperature gradients that form under high voltage and power operation. In this work, we developed a deep-ultraviolet thermoreflectance thermal imaging capability, which can potentially offer the highest spatial resolution among diffraction-limited far-field optical thermography techniques. Experiments were performed to compare device channel temperatures obtained from near-ultraviolet and deep-ultraviolet wavelength illumination sources for the proof of concept of the new characterization method. Deep-ultraviolet thermoreflectance imaging will facilitate the study of device self-heating within transistors based on GaN and emerging ultra-wide bandgap semiconductors (e.g., β-Ga2O3, AlxGa1-xN, and diamond) subjected to simultaneous extreme electric field and heat flux conditions.

Background: The upsurge in the field of radio frequency power electronics has led to the involvement of wide bandgap semiconductor materials because of their potential characteristics in achieving high breakdown voltage, output power density, and frequency. III-V group materials of the periodic table have proven to be the best candidates for achieving this goal. Among all the available combinations of group III-V semiconductor materials, gallium nitride (GaN), having a band gap of 3.4eV, has gradually started gaining the confidence to become the next-generation material to fulfill these requirements. Objective: Considering the various advantages provided by GaN, it is widely used in AlGaN/GaN HEMTs (High Electron Mobility Transistors) as their fundamental materials. This work aimed to review the structure, operation, and polarization mechanisms influencing the HEMT device, different types of GaN HEMT, and the various process technologies for developing the device. Methods: Various available methods to obtain an enhancement type GaN HEMT are discussed in the study. It also covers the recent developments and various techniques to improve the performance and device linearity of GaN HEMT. Conclusion: Despite the advantages and continuous improvement exhibited by the GaN HEMT technology, it faces several reliability issues, leading to degradation of device performance. In this study, we review various reliability issues and ways to mitigate them. Moreover, several application domains are also discussed, where GaN HEMTs have proven their capability. It also focuses on reviewing and compiling the various aspects related to the GaN HEMT, thus providing all necessary information.

On paper, Gallium nitride (GaN) transistor promises exceptional performance when used in converters operating at high switching frequency; nonetheless, reduction in their performance when used in real circuits have been observed. Previous experiments show that tested GaN transistors can display excessive loss of up to three times their predicted values under certain test conditions. This paper evaluates power losses in GaN transistors when used in class Φ 2 resonant soft-switching inverter topologies at MHz frequencies. Thermometric loss calibration technique is used to calculate the power losses. To gain better insight, experiments are set up to subdivide these losses into two components, one associated with on-state transistors and one associated with off-state transistors. Two GaN devices from two different companies were selected for the study. Further, a control study with a silicon (Si) transistor is also done to confirm the validity of the test method, and to compare the performance of GaN transistors to an existing Si transistor. The following paper presents the loss separation method, and the resulting loss breakdown for the tested devices. The tested operating frequency ranges from 3.39 MHz to 27.12 MHz.

The development of high-quality gallium nitride (GaN) high electron mobility transistors (HEMTs) has provided opportunities for the next generation of high-performance radio frequency and power electronics. Operating devices with smaller length scales at higher voltages result in excessively high channel temperatures, which reduce performance and can have detrimental effects on the device's reliability. The thermal characterization of GaN HEMTs has traditionally been captured from either the top or bottom side of the device. Under this configuration, it has been possible to map the lateral temperature distribution across the device with optical methods such as infrared and Raman thermometry. Due to the presence of the gate metal, however, and often also the addition of a metal air bridge and/or field plate, the temperature of the GaN channel under the gate is typically inferred by numerical simulations. Furthermore, measuring the vertical temperature gradient across multiple epitaxial layers has shown to be challenging. This study proposes a new cross-sectional imaging technique to map the vertical temperature distribution in GaN HEMTs. Combining advanced cross-sectioning processing with the recently developed near bandgap transient thermoreflectance imaging technique, the full transient thermal distribution across a GaN HEMT is achieved. The cross-sectional thermal imaging of the GaN channel is used to study the effects of biasing on the Joule heating profile. Overall, the direct measurement of the GaN channel, capturing both the vertical and lateral gradient, will provide deeper insight into the device's degradation physics and supply further experimental data to validate previously developed electrothermal models.

This paper reports a high-performance microwave receiver protector (RP) based on a single gallium nitride (GaN) high electron mobility transistor (HEMT) at an operation frequency of 30 to 3000 MHz. The HEMT-based RP exhibits multi features: high power compression, constant output power, tunable threshold power level, and insensitivity to frequency variation. With a low drain voltage (Vds) of 3 V, constant output power of 9.9 dBm was acquired for input power over its threshold power of 3.2 dBm. Power compression of 13.3 dB was achieved at the input power of Pin = 20 dBm. In addition, adjustable threshold power level Pth could be obtained by merely tuning drain voltage. Transducer gain measurement results were employed to explain the occurrence of output power saturation. Relatively higher Pth was linked to wider gate voltage swing which extended the linear region of the Pout-Pin characteristic. In addition, the GaN HEMT’s power compression capability shows great immunity to frequency variation, which is promising for protecting sensitive receiver components at both low and high frequencies. Finally, the phase shift of the GaN HEMT RP at high input power was measured and analyzed by the nonlinear behaviors of input capacitance Cgs.

Dynamic ON-resistance ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}{)}$ </tex-math></inline-formula> or threshold voltage ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}{)}$ </tex-math></inline-formula> instability caused by charge trapping is one of the most crucial reliability concerns of some gallium nitride (GaN) high-electron mobility transistors (HEMTs). It has been unclear if this issue can be resolved using an alternative GaN device architecture. This work answers this question by characterizing, for the first time, the dynamic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R} _{\text {ON}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> stability of an industrial vertical GaN transistor-NexGen’s 1200-V/70- <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\text{m}\Omega $ </tex-math></inline-formula> fin-channel junction-gate field-effect transistor (JFET), fabricated on 100-mm bulk GaN substrates. A circuit setup is deployed for the in situ measurement of the dynamic <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}$ </tex-math></inline-formula> under steady-state switching. The longer term stability of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}$ </tex-math></inline-formula> and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> is tested under the prolonged stress of negative gate bias and high drain bias. The vertical GaN JFET shows nearly no <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${R}_{\text {on}}$ </tex-math></inline-formula> or <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {TH}}$ </tex-math></inline-formula> shift in these tests, which could be attributed to the low defect density of the GaN-on-GaN homoepitaxial growth, the absence of electric field ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${E}$ </tex-math></inline-formula> -field) crowding near the surface, and the minimal charge trapping in the native junction gate. These results present a critical milestone for vertical GaN devices toward power electronics applications.

With Gallium Nitride (GaN) device technology for power electronics applications being ramped up for volume production, an increasing amount of research is now focused on the performance of GaN power devices in circuits. In this study, an enhancement mode GaN high electron mobility transistor (HEMT) is switched in a clamped inductive switching configuration with the aim of investigating the source of oscillatory effects observed. These arise as a result of the increased switching speed capability of GaN devices compared to their silicon counterparts. The study identifies the two major mechanisms (Miller capacitance charge and parasitic common source inductance) that can lead to ringing behaviour during turn-off and considers the effect of temperature on the latter. Furthermore, the experimental results are backed by SPICE modelling to evaluate the contribution of different circuit components to oscillations. The study concludes with good design techniques that can suppress the effects discussed.

The single event effect (SEE) and the total ionizing dose (TID) effect of a commercial enhancement mode gallium nitride (GaN) high electron nobility transistor (HEMT) with p-type gate structure and cascode structure are studied by using the radiation of heavy ions and &lt;sup&gt;60&lt;/sup&gt;Co gamma in this paper. The safe operating areas ofSEE, the sensitive parameters degradation of TID effect and the SEE and TID characteristics of GaN HEMT device are respectively presented. The experimental results show that the SEE and TID effect have less influence on the p-type gate GaN device. The linear energy transfer (LET) threshold of the single event Burnout effect (SEB) is higher than 37 MeV·cm&lt;sup&gt;2&lt;/sup&gt;/mg and the failure threshold of TID effect is above 1M rad (Si) for p-type gate GaN device. However, the GaN HEMT device with cascode structure is much more sensitive to SEE and TID effect than p-type gate GaN device. Under heavy ions at LET of 22 MeV·cm&lt;sup&gt;2&lt;/sup&gt;/mg and a cumulative dose of 200 krad (Si), the SEB phenomenon and parameters-degradation of cascode-type GaN HEMT are respectively observed. Besides, the circuit structure of the cascode-type GaN HEMT device is analyzed by using metallographic microscope imaging and focused ions beam technology. It reveals the possible reason why it is sensitive to SEB and TID for cascode-type GaN HEMT. These results show that the extra carriers caused by heavy ion radiation can tunnel the Schottky barrier formed by gate metal and AlGaN layer, leading to a large source-drain current in GaN HEMT device. Meanwhile, it is shown that the metal oxide semiconductor field-effect transistor in cascode circuit for TP90H180PS GaN HEMT may be the main reason why the cascode-type GaN HEMT is sensitive to TID.

Embedding is a technology which permits to build highly integrated, compact power sections. It also helps to minimise parasitic elements within the power sections, this way facilitating the use of novel, fast switching devices like gallium-nitride (GaN) high electron mobility transistors (HEMTs). This paper deals with required processes and the development of a power section with GaN HEMTs for a three phase drive inverter with a nominal power in the lower kW range; a version with discrete devices has also been built as a benchmark for the embedded solution.