Design and Analysis of Synchronizable Error-Resilient Arithmetic Codes

The track misregistration (TMR) required to achieve gigabit areal densities is calculated for a set of components based on the average bit error rate for a file. The average error rate is a statistical average, based on the TMR of the file, of the on-track and off-track error rate. The on-track and off-track error rates are dependent on squeeze from adjacent tracks. In this analysis, the average error rate is calculated using measured error rate profiles of the center track. For a file average soft error rate of 1*10/sup -6/, the results show, for a particular head/disk combination designed for gigabit recording and operating at a linear density of 158 kbpi, that a track pitch of 4.0 mu m (3.35 ktpi) can be achieved with a TMR of 0.635 mu m. Obtaining this TMR value in a file is one of the challenges to recording of 1 Gb/in/sup 2/ in magnetic storage products. >

Timeliness of information transfer is critical in real-time applications. Prioritizing timeliness, however, often comes at the cost of rate inefficiency, especially in block coding. In this work, motivated by the sequential nature of encoding and decoding in arithmetic source coding, the timeliness of arithmetic coding is investigated. For a generate-at-will source model, an upper bound is provided on the average peak age of information (PAoI). This upper bound builds on the arithmetic coding scheme of Shayevitz et al. (2007) which has a finite look-ahead parameter <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$d$</tex> . It captures interesting trade-offs between PAoI, compression rate, and the look-ahead parameter <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$d$</tex> . For periodic sources, rate efficiency is argued to be less critical than the look-ahead parameter <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$d$</tex> in minimizing the peak age, especially when the traffic load is moderate and small. Through simulations, two observations are made: (i) the optimal look-ahead parameter <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$d$</tex> is an increasing function of the traffic load, and (ii) asymptotically, as the traffic load gets close to its limit 1, the classical arithmetic coding (without a finite bound on <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$d$</tex> ) performs better than the state-of-the-art age-optimal block codes.

In interactive coding, Alice and Bob wish to compute some function $f$ of their individual private inputs $x$ and $y$. They do this by engaging in a non-adaptive (fixed order, fixed length) protocol to jointly compute $f(x,y)$. The goal is to do this in an error-resilient way, such that even given some fraction of adversarial corruptions to the protocol, both parties still learn $f(x,y)$. In this work, we study the optimal error resilience of such a protocol in the face of adversarial bit flip or erasures. While the optimal error resilience of such a protocol over a large alphabet is well understood, the situation over the binary alphabet has remained open. In this work, we resolve this problem of determining the optimal error resilience over binary channels. In particular, we construct protocols achieving $\frac16$ error resilience over the binary bit flip channel and $\frac12$ error resilience over the binary erasure channel, for both of which matching upper bounds are known. We remark that the communication complexity of our binary bit flip protocol is polynomial in the size of the inputs, and the communication complexity of our binary erasure protocol is linear in the size of the minimal noiseless protocol computing $f$.

Block coding based on the discrete cosine transform (DCT) is very popular in image and video compression. Pre/post-filtering can be attached to a DCT-based block coding system to improve coding efficiency as well as to mitigate blocking artifacts. Previously designed pre/post-filters are optimized to maximize coding efficiency solely. For image and video communication over unreliable channels, those pre/post-filters are sensitive to transmission errors. This paper addresses the problem of designing pre/post-filters which are more error resilient. Reconstruction performance is measured by how low the average reconstruction error is, and how uniformly the reconstruction error is distributed. A family of pre/post-filters is designed to provide desired tradeoffs between coding efficiency and robustness to transmission errors. Experiments show that these filtering operators can achieve superior reconstruction performance without sacrificing much coding performance.

As a typical high-order modulation format optimization technology, constellation probability shaping enhances generalized mutual information (GMI) by optimizing the probability distribution of each constellation point of the signal. It can improve the transmission capacity of the same order M Quadrature Amplitude Modulation (QAM) signal under the condition of limited average transmission power, and further narrow the gap with the Shannon limit capacity. The distribution matcher is a key part of constellation probability shaping since it not only ensures the one-to-one mapping of input and output sequences but also realizes the function of probability shaping. The constant composition distribution matcher (CCDM) structure is a widely utilized distribution matcher in the current probability shaping technology. Based on CCDM, a parallel distribution matcher scheme is proposed in this paper. It has a lower rate loss than CCDM for short output lengths (n is less than 100). Block lengths can be reduced by up to 30% with the same rate loss. When the GMI is the same as for the probability shaping (PS) 64QAM signal using CCDM, the OSNR required by the PS-64QAM signal using this scheme can be enhanced by 0.12dB, the block length can be reduced by 40%, and the transmission distance in a standard single-mode fiber can be slightly extended.

Here we propose and verify the feasibility of a new keyboard structure for keyboard-mounted mouse. Reducing the distance that fingers move while typing within a three-dimensional (3-D) key arrangement that fits along the fingers is effective for keyboard-mounted mouse, provided that each finger can separately press three different keys. Our objective was to design and test a method for separately being able to press three keys with a single finger, and in the process, reduce finger-moving distance. We analyzed 3-D finger motion while participants typed on a standard keyboard, and used this data to develop a 3-D layout for keys that are arranged along the fingers. Analysis of 3-D finger motion while using our new keyboard showed that the distance fingers traveled was 74 % less than that when using a standard keyboard (p < 0.05). Moreover, this did not result in typing mistakes caused by interference between the keys and finger movements. After typing 30 characters 20 times, the average input error rate in the 20th trial was 18 %, while the average error rate across all trials for the standard keyboard was 9.5 %. We conclude that our proposed 3-D keyboard can be used accurately with one finger while reducing the distance fingers must move. However, input mistakes were caused by finger linkage motion. In the future, we must devise a character-input algorithm that eliminates such erroneous input. We must also include the mouse function and evaluate the operability of the device in tasks that require keyboard and mouse use.

The problem of generating a random number with an arbitrary probability distribution by using a general biased M-coin is studied. An efficient and very simple algorithm based on the successive refinement of partitions of the unit interval (0, 1), which we call the interval algorithm, is proposed. A fairly tight evaluation on the efficiency is given. Generalizations of the interval algorithm to the following cases are investigated: (1) output sequence is independent and identically distributed (i.i.d.); (2) output sequence is Markov; (3) input sequence is Markov; (4) input sequence and output sequence are both subject to arbitrary stochastic processes.

It is shown how to encode and transmit binary Markov sources using a set of block codes called MELCODE. Fill symbol control is used to manage the transmission order of codewords with limitation of memory size. MELCODE is extended to arithmetic-type code, and the calculation accuracy of coding address is clarified. Block codes and arithmetic codes are compared in terms of memory size and coding efficiency through the simulation of bilevel image coding, showing an improvement in coding efficiency. >

Bluetooth is a short‐range wireless system using the 2.4‐GHz band, but has the problem of degradation of communication quality caused by the noise radiated by microwave ovens which share the same frequency band. In this paper, we theoretically and experimentally study the impact of microwave oven noise on Bluetooth. Time variations in the bit error rate with a fixed channel frequency are theoretically evaluated applying the time domain oven noise model represented by frequency and amplitude modulated wave to the theoretical equation of the bit error probability for frequency shift keying (FSK). The average bit error rate and the average packet error rate with the frequency hopping spread spectrum (FH‐SS) scheme are also evaluated. The results of theoretical study show that (1) microwave oven noise using an inverter power supply (inverter‐type) degrades average packet error rate more seriously than does a microwave oven not using an inverter power supply (transformer‐type), and that (2) FH‐SS is less effective in mitigating interference from inverter‐type oven noise compared with transformer‐type oven noise. Experiments are conducted using Bluetooth terminals. Error rates are measured using actual ovens and oven noise simulator based on the noise model. The effectiveness of the noise model applied in this paper in the evaluation of the Bluetooth transmission characteristics during microwave oven noise interference is demonstrated. © 2006 Wiley Periodicals, Inc. Electron Comm Jpn Pt 1, 89(11): 24–34, 2006; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecja.20275

A very tight approximate results of MRC receivers over independent Weibull fading channels

Sources of intratrial interference in immediate recall of paired associates

Arithmetic coding is a form of entropy encoding used in lossless data compression. In this article, new technique for image compression/decompression based on arithmetic coding decoding was used. The input image is divided into blocks, each block is 32 x 32 , 64 x 64, and 128 x 128 pixels. If the image is not multiple of the block size , the size of what remains of the image is calculated and columns and rows of zero values are added(padding) up to be all the blocks are 32 x 32,64 x 64..etc . The blocks are separated first as a stream for processing. The result is a stream of compressed tables after do arithmetic coding process and the store bytes are calculated during this process. Then compression ratio is calculated. Finally the stream of the compressed tables is recollected for decompressing (reconstruction image after decoding process) and this is done for each block. The algorithm is tested on different images and the results show a high space saving (88-90%), the process is fast, and it is easy to decode the binary bits to recover the original image exactly without any lose.

The block coder, which is a key module in the JPEG2000 image compression system, presents challenges for realization of a high-throughput, low-hardware-cost VLSI architecture. Though efficient architectures have been proposed for a block coder operating in specific modes, existing generic block coder architectures have low throughput versus hardware cost performance. In this paper, we present a low-cost, high-throughput VLSI architecture for a generic block coder. Concurrent symbol processing (CSP) is used to improve throughput of the block coder's submodules, the bit plane coder (BPC) and arithmetic coder (AC). The proposed BPC processes one stripe-column/clock-cycle during every coding pass and generates up to 10 context-data (CxD) pairs/clock-cycle. The proposed AC processes two CxD/clock-cycles. Throughput is then further increased by using column speedup and novel run-mode skipping techniques at the BPC module. Hardware cost for the proposed block coder is reduced by using an optimal two-subbank BPC memory architecture. Additionally, image statistics are used to choose efficient configuration parameters for the VLSI architecture. The proposed block coder is implemented on Altera stratix FPGA and TSMC ASIC 0.18-mum platforms. Implementation results show that our block coder has average throughputs of 16.23 and 73.42 Msamples/s, respectively, on the FPGA and ASIC platforms. The block-coder test chip has 22515 gates and 2.33 mm 2 chip area. In comparison with similar existing architectures, it has the highest throughput versus hardware cost performance

Methods are developed to illustrate whether or not it is possible to determine the final state of a finite automaton when 1) the initial state of the automaton is unknown and the input sequence and its corresponding output sequence are given and 2) both the initial state and the input sequence are unknown and only the output sequence is given.

We address an important problem in sequence-to-sequence (Seq2Seq) learning referred to as copying, in which certain segments in the input sequence are selectively replicated in the output sequence. A similar phenomenon is observable in human language communication. For example, humans tend to repeat entity names or even long phrases in conversation. The challenge with regard to copying in Seq2Seq is that new machinery is needed to decide when to perform the operation. In this paper, we incorporate copying into neural network-based Seq2Seq learning and propose a new model called CopyNet with encoder-decoder structure. CopyNet can nicely integrate the regular way of word generation in the decoder with the new copying mechanism which can choose sub-sequences in the input sequence and put them at proper places in the output sequence. Our empirical study on both synthetic data sets and real world data sets demonstrates the efficacy of CopyNet. For example, CopyNet can outperform regular RNN-based model with remarkable margins on text summarization tasks.