Design and implementation of parallel algorithms for automata

We present a parallel algorithm for the minimization of deterministic finite state automata (DFAs) and discuss its implementation on a connection machine CM-5 using data parallel and message passing models. We show that its time complexity on a p processor EREW PRAM (p/spl les/n) for inputs of size n is O([n log/sup 2/ n/p]+log n log p) uniformly on almost all instances. The work done by our algorithm is thus within a factor of O(log n) of the best known sequential algorithm. The space used by our algorithm is linear in the input size. The actual resource requirements of our implementations are consistent with these estimates. Although parallel algorithms have been proposed for this problem in the past, they are not practical. We discuss the implementation details and the experimental results.

A Simple Parallel Algorithm for the Single-Source Shortest Path Problem on Planar Digraphs

Data partitioning algorithms aiming to minimize the execution time and the energy of computations in self-adaptable data-parallel applications on modern extreme-scale multicore platforms must address two critical challenges. First, they must take into account the new complexities inherent in these platforms such as severe resource contention and non-uniform memory access. Second, they must have low practical runtime and memory costs. The sequential data partitioning algorithms addressing the first challenge have a theoretical time complexity of O( $m * m * p * p$ ) where $m$ is the number of points in the discrete speed/energy function and $p$ is the number of available processors. They, however, exhibit high practical runtime cost and excessive memory footprint, therefore, rendering them impracticable for employment in self-adaptable applications executing on extreme-scale multicore platforms. We present, in this paper, the parallel data partitioning algorithms that address both the challenges. They take as input the functional models of performance and energy consumption against problem size and output workload distributions, which are globally optimal solutions. They have a low time complexity of O( $m * m * p$ ) thereby providing a linear speedup of O( $p$ ) and low memory complexity of O( $n$ ) where $n$ is the workload size expressed as a multiple of granularity. They employ dynamic programming approach, which also facilitates the easier integration of performance and energy models of communications. We experimentally study the practical cost of application of our algorithms in two data-parallel applications, matrix multiplication and fast Fourier transform, on a cluster in Grid’5000 platform. We demonstrate that their practical runtime and memory costs are low making them ideal for employment in self-adaptable applications. We also show that the parallel algorithms exhibit tremendous speedups over the sequential algorithms. Finally, using theoretical analysis for a forecast exascale platform, we demonstrate that the parallel algorithms have negligible execution times compared to the matrix multiplication application executing on the platform.

In this book chapter, the authors discuss some important communication issues to obtain a highly scalable computing system. They consider the CGM (Coarse-Grained Multicomputer) model, a realistic computing model to obtain scalable parallel algorithms. The communication cost is modeled by the number of communication rounds and the objective is to design algorithms that require the minimum number of communication rounds. They discuss some important issues and make considerations of practical importance, based on our previous experience in the design and implementation of parallel algorithms. The first issue is the amount of data transmitted in a communication round. For a practical implementation to be successful they should attempt to minimize this amount, even when it is already within the limit allowed by the CGM model. The second issue concerns the trade-off between the number of communication rounds which the CGM attempts to minimize and the overall communication time taken in the communication rounds. Sometimes a larger number of communication rounds may actually reduce the total amount of data transmitted in the communications rounds. These two issues have guided us to present efficient parallel algorithms for the string similarity problem, used as an illustration.

Yet another canonical nondeterministic automaton

A digital electromagnetic model of electric power system is suggested. The parallel and the sequential algorithms to solve the equation set are described. Implementation of the parallel algorithm on k processors provides more then k times speedup.

This paper presents a mathematical framework for a family of discrete-time discrete-frequency transforms in terms of matrix signal algebra. The matrix signal algebra is a mathematics environment composed of a signal space, a finite dimensional linear operators and special matrices where algebraic methods are used to generate these signal transforms as computational estimators. The matrix signal algebra contribute to analysis, design and implementation of parallel algorithms in multi-core proccesors. In this work, an implementation and experimental investigation of the mathematical framework are performed using MATLAB r with the Parallel Computing Toolbox TM . We found that there is advantage to use multi-core processors and a parallel computing environment to minimize the high execution time. Also, speedup and efficiency increases when the number of logical processor and length of the signal increase. Moreover, a superlinear speedup is obtained in this ex perimental investigation.

Electronic circuits: by E. J. Angelo, Jr. 450 pages, diagrams, 6 × 9 in. New York, McGraw-Hill Book Co. Inc., 1958.Price, $9.00.

Parallel algorithms developed for CAD problems today suffer from three important drawbacks. First, they are machine specific and tend to perform poorly on architectures other than the one for which they were designed. Second, they cannot use the latest advances in improved versions of the sequential algorithms for solving the problem. Third, the quality of results degrade significantly during parallel execution. We address these three problems for an important CAD application: standard cell placement. We have developed a parallel placement algorithm that is portable across a range of MIMD parallel architectures. The algorithm is part of the ProperCAD project which allows the development and implementation of a parallel algorithm such that it can be executed on a wide variety of parallel machines without any change to the source. The parallel placement algorithm is based on an existing implementation of the sequential simulated annealing algorithm, TimberWolfSC 6.0 (C. Sechen and A. Sangiovanni-Vincentelli, 1985).< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Mainly designed for simulating the fluid motion, Smooth Particle Hydrodynamics (SPH) SPH has been widely applied to many fields, such as aerospace aircraft design and ship design. First, this paper presents an implementation of serial SPH method algorithm using the reflection method as the boundary condition. This paper describes entire process of SPH and gives detailed descriptions of some important procedures. Second, this paper realizes the corresponding parallel algorithm of SPH, which includes neighbor particle searching and building, physical attributes computation and other main SPH method procedures. Third, details of mapping different parts of the SPH serial algorithm to parallel algorithm on GPU with CUDA C as parallel programming language are also shown in this paper. Taking advantage of powerful computation ability of GPU, the experiment approximately achieves a 8X speedup that shows the high efficiency of GPU-based programming. The parallel algorithm not only achieves a high performance, but also promises a reliability result with a small error rate as the experiment result shows.

Neural networks have proved to be effective in solving a wide range of problems. As problems become more and more demanding, they require larger neural networks, and the time used for learning is consequently greater. Parallel implementations of learning algorithms are therefore vital for a useful application. Implementation, however, strongly depends on the features of the learning algorithm and the underlying hardware architecture. For this experimental work a dynamic problem was chosen which implicates the use of recurrent neural networks and a learning algorithm based on the paradigm of learning automata. Two parallel implementations of the algorithm were applied - one on a computing cluster using MPI and OpenMP libraries and one on a graphics processing unit using the CUDA library. The performance of both parallel implementations justifies the development of parallel algorithms.

This paper presents a Parallel Data Mining Platform (PDMP), aiming at rapidly developing parallel data mining applications on cluster system. This platform consists of parallel data mining algorithm library, data warehouse, field knowledge base and platform middleware. The middleware is the kernel of the platform, which comprises data processing component, task manager, data manager, GUI, and so on. Taking advantage of cluster system, the middleware provides a convenient developing environment and effective bottom supports for implementation of parallel data mining algorithms. So far, the parallel data mining algorithm library has possessed several parallel algorithms, such as classification, clustering, association rule mining, sequence pattern mining and so on. With a register mechanism, the parallel data mining algorithm library is easy to be extended by users. Experiment results with the use of the PDMP show that there is a substantial performance improvement due to the cooperation of the middleware and corresponding parallel strategy.

Parallel communicating finite automata (PCFAs) are systems of several finite state automata which process a common input string in a parallel way and are able to communicate by sending their states upon request. We consider deterministic and nondeterministic variants and distinguish four working modes. It is known that these systems in the most general mode are as powerful as one-way multihead finite automata. It is additionally known that the number of heads corresponds to the number of automata in PCFAs in a constructive way. Thus, undecidability results as well as results on the hierarchies induced by the number of heads carry over from multi-head finite automata to PCFAs in the most general mode. Here, we complement these undecidability and hierarchy results also for the remaining working modes. In particular, we show that classical decidability questions are not semi-decidable for any type of PCFAs under consideration. Moreover, it is proven that the number of automata in the system induces infinite hierarchies for deterministic and nondeterministic PCFAs in three working modes.

Sorting is a classic problem that has been studied for decades. From the beginning of computing, many Sorting algorithms have been investigated. Bubble sort is a very common and powerful sorting technique used in different applications. For high speed data processing, we need faster and efficient environment for any sorting algorithm. In this purpose, FPGA based hardware accelerators can show better performance for high speed data processing than the general purpose processors. In this paper, the sequential and parallel bubble sort algorithm is implemented using FPGA. We show that parallel implementation of Bubble sort algorithm is almost 10 times faster than that of sequential implementation for 20 different data inputs. However, this implementation is faster for more data inputs.

Critical to any automated surveillance system is the recognition component. Since the inception of Pattern Recognition & Image processing, researchers across the globe continue to propose newer facial recognition algorithms. Each of these facial algorithms has its own pros and cons. A typical facial recognition algorithm consists of three steps namely: facial detection, feature extraction and recognition. In this paper we discuss serial and parallel implementation of four standard facial recognition algorithms namely, Principal Component Analysis (PCA), Linear Discriminant Analysis (LDA), Independent Component Analysis (ICA) and FISHER Face. Work presented in this paper consists of two sections. In section 1, we discuss serial and parallel implementation of the algorithms. Section 2, presents a comparative performance analysis of the above 4 algorithms. A major challenge in this effort is the ability to explore and exploit concurrency in existing facial recognition algorithms to improve performance. Based on the algorithms performance, we have made few suggestions regarding the suitability of each of these algorithms for different domains/applications. All algorithms are implemented using open source OPENCV and OPENMP libraries.