Dominant-Modes-Based Sliding-Mode Observer for Estimation of Temperature Distribution in Rapid Thermal Processing System

The rapid thermal processing (RTP) system requires critical control of temperature uniformity. For most RTP system, the structure and heating modes of heating component determined the control strategy. Major types of the heating system of nowadays RTP systems were reviewed and compared. Then a heating system for RTP was proposed to improve the uniformity of heaving emission, which includes optimally designed light path and high efficient light reflecting system. The simulating results of that were also given.

Issues of rapid thermal processing (RTP) system design and process applications are reviewed. Temperature measurement is the most important and limiting factor in current RTP systems. Problems related to the temperature measurement and control and potential solutions are discussed. Process uniformity control is another important issue in RTP system design. Reactor chamber design, selection and arrangement of heat source, as well as issues related to dislocation generation, patterned and doped wafer, and ramp-up (down) thennal cycle are considered. Experimental results (RTO, RTCVD silicon nitride and polysilicon) based on an in-house RTP system developed in our laboratory are taken as examples to demonstrate the process applications and system requirements for single wafer processing.

A first-principles approach to the modeling of a rapid thermal processing (RTP) system to obtain temperature uniformity is described. RTP systems are single wafer and typically have a bank of heating lamps which can be individually controlled. Temperature uniformity across a wafer is difficult to obtain in RTP systems. A temperature gradient exists outward from the center of the wafer due to cooling for a uniform heat flux density on the surface of the wafer from the lamps. Experiments have shown that the nonuniform temperature of a wafer in an RTP system can be counteracted by adjusting the relative power of the individual lamps, which alters the heat flux density at the wafer. The model is composed of two components. The first predicts a wafer's temperature profile given the individual lamp powers. The second determines the relative lamp power necessary to achieve uniform temperature everywhere but at the outermost edge of the wafer (cooling at the edge is always present). The model has been verified experimentally by rapid thermal chemical vapor deposition of polycrystalline silicon with a prototype LEISK RTP system. The wafer temperature profile is inferred from the poly-Si thickness. Results showed a temperature uniformity of +or-1%, an average absolute temperature variation of 5.5 degrees C, and a worst-case absolute temperature variation of 6.5 degrees C for several wafers processed at different temperatures.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

This paper highlights the basic principles of rapid thermal processing (RTP) systems and the important areas of concern. The basic system characteristics, the fundamental physics involved, and the techniques for temperature measurement and control are extensively reviewed. We summarize the options currently available for 15 RTP equipment manufacturers and point out the latest developments in RTP system design and temperature measurement. Some novel options for temperature control (optical, fiber optical, and photoacoustic) are included.

We consider the recursive identification and feedback control of the rapid thermal processing (RTP) system where the asymmetry of the convective heat transfer coefficient, caused by gas flow in the chamber, is taken into consideration. The success of RTP depends on the precise control of water temperature by adjusting the strength of the heating lamps to minimize dopant redistribution as well as wafer warpage. An efficient method of recursive identification and optimal feedback control is developed by separating the radiation field from the temperature field of the wafer and converting the heat conduction equation for the wafer temperature to a reduced-order model by means of the Karhunen-Loève Galerkin procedure.

The design of a decentralized controller has been studied as an integral part of the development of a commercial rapid thermal processing (RTP) system for manufacturing display glass. The glass RTP system uses bulb-type tungsten-halogen lamps for heating. A highly uniform temperature distribution with a maximum temperature difference of less than 6 °C between any two points is required during glass processing, regardless of the size of the glass. In designing a decentralized controller that satisfies this requirement, the problems of optimal sensor location, lamp grouping, optimization-based controller tuning, and time-varying bias input signals were identified and solved. The performance of the controller was investigated experimentally and numerically.

In this paper, a model-based control method for RTP (Rapid Thermal Processing) system is proposed. RTP system is a device used to heat semiconductor wafers uniformly. It can heat wafers rapidly and reduce the processing time. However, it is very difficult for a RTP system to achieve the extremely stringent requirement on temperature uniformity (±1[K] or less) without suitably controlling and coordinating the radiative heat flux from the halogen lamps. In this research, the location of lamps is optimized first. Then, a feedback control system is designed which provides optimal temperature control during the thermal processing. The design is carried out based on a linearized model and H2 optimal control. The effect of sensor location is also investigated. Numerous simulations show that satisfactory performances are obtained in both the tracking and the uniformity of wafer temperature.

Very thin cobalt silicide formation and annealing processes were investigated as a function of process temperature (350–700°C) and Co film thickness using a susceptor-based low pressure rapid thermal processing (RTP) system. TiN capped thin Co films were investigated. Highly reliable, backside emissivity independent, low resistance, production worthy shallow silicide contact formation process has been demonstrated. Both a wide process window and an excellent sheet resistance uniformity have been demonstrated in cobalt silicide process integration steps. The net added non-uniformity of typical TiN capped 10 nm thick cobalt films was less than 0.5%.

Titanium silicide formation and annealing processes were investigated as afunction of process temperature (600°C–850°C), Ti film thickness (27.5 nm–100 nm) and process time (45 s–87 s) using a susceptor-based low pressure rapid thermal processing (RTP) system. Highly reliable, low resistance, production worthy titanium silicide contact formation and annealing processes have been demonstrated. Excellent sheet resistance uniformity and repeatability have been demonstrated. The difference in wafer heating mechanism between the susceptor-based RTP and the lamp-based RTP systems and its implication to the process results were discussed. Power consumption and productivity were also described from the production point of view.

Rapid thermal processing (RTP) is becoming increasingly more important in semiconductor wafer fabrication. A nonlinear physical model for a generic RTP system is described. This generic RTP system is representative of the state-of-the-art RTP systems. A low-order nonlinear model is developed. A model-based LQG controller is designed for the low-order model which successfully controls the full-order nonlinear simulation model.

A new proprietary rapid thermal processing (RTP) method has been developed and implemented for the fast switching of a gas ambient surrounding a wafer inside a RTP furnace operated in the low pressure or atmospheric pressure regime. By controlling the gas flow pattern around a semi-conductor wafer, the effective volume of process gas interacting with the wafer has been reduced by a factor of 33. Thus, real-time gas sequencing can be realized so that multiple rapid thermal processing steps, involving dry and wet rapid thermal oxidation (RTO), rapid thermal nitridation (RTN), rapid thermal annealing (RTA) and chemical vapor deposition (CVD), can be carried out sequentially in a single RTP cycle. Experimental data from ion implant anneal and thermal oxide thin film growth will be presented to illustrate the major technical challenges and solutions associated with the integration of the new method into the Summit/spl trade/ RTP systems. Using this approach, the benefits of rapid thermal processing with high productivity and quick ambient switching is realized.

A direct energy transferred rapid thermal process (RTP) method is proposed as a new generation RTP to overcome the issues of the conventional RTP and flash‐ or laser‐based anneals. Plasma immersion ion implantation (PIII) is utilized to realize the concept because it can deliver high power density. The ramp‐up rates between 100 °C/sec and ∼2000 °C/sec and the effective thermal budgets between seconds and milliseconds can be achieved with other advantages, including no pattern effect, low temperature annealing, high throughput, and flexible process controllability.

A methodology to improve the temperature uniformity for the wafer in a rapid thermal processing (RTP) system is presented. The work aims at the temperature compensation at the wafer surface by thermal convection. From simulation results of the flow field, it is seen that the cold gas, while flowing from the periphery of the wafer toward the wafer center, causes a lower pressure at and around the center. This lower pressure is due to the flow away of gas by buoyancy and it aggregates thermal nonuniformity. A technique is suggested that consists of suppressing the upward gas flow using a transparent quartz cap above the monitored wafer. Simulation and experimental results show that by implementing this technique, the temperature uniformity of the wafer is improved.

The effect of rapid thermal processing on wafer distortion and overlay accuracy in global alignment photolithography in the fabrication of 0.85 /spl mu/m CMOS Flash EPROM integrated circuits was studied. Both rapid thermal process parameters and system design (single and multi-lamp processors) were evaluated for their effect on overlay accuracy. It was found that a rapid thermal process (following contact etch and ion implantation) at set temperatures greater than or equal to 950/spl deg/C resulted in interconnect metallization-to-contact overlay errors in excess of 1.0 /spl mu/m across the wafer, which led to a 20% functional circuit yield loss. In the case of the single lamp processor, this misalignment was attributed to wafer distortion due to the temperature overshoot during the ramp step, which subsequently resulted in an across wafer temperature range of greater than 120/spl deg/C. This temperature overshoot and nonuniformity was eliminated by reducing the ramp rate below 100/spl deg/C/s. This ramp rate reduction, however, decreased the system wafer throughput, and required optimization to eliminate the overlay errors and minimize the effect on throughput. In this study, a 60/spl deg/C/s ramp rate was found to be optimum. For the multi-lamp RTP system, the metal-to-contact overlay error was not observed. This was believed to be due to the design of the heating mechanism in the multi-lamp processor, which did not produce the large wafer temperature overshoot and nonuniformity that was observed in the single lamp processor.

New methods of metrology data analysis during semiconductor processing and application to rapid thermal processing