Dual-gate electrochemical synaptic transistor for tunable frequency-selective signal processing

In the quest to create computing systems that mimic the brain’s remarkable ability to process data efficiently and in parallel, researchers have recognized the need for in-memory computing devices that can overcome the limitations of the traditional von Neumann architecture. Recently, neuromorphic devices like memristors and synaptic transistors have been developed to emulate the process of neurons. However, memristors face challenges in simultaneously handling signal transmission and learning tasks. As an alternative, synaptic transistors have gained attention owing to their adjustable weight and improved non-volatile synaptic functionality. Notably, synaptic transistors with electrolyte insulating layers can form electric double layers (EDLs) with high capacitance per unit area, because of mobile ions and dipoles. This enables efficient gate-controlled synaptic behavior. Additionally, amorphous oxynitride semiconductors, used as n-type channels, exhibit superior mobility compared to other materials like 2D transition metals, perovskites, organic materials, and oxides. In our investigation, therefore, we employed a cross-linked poly-4-vinyl phenol (PVP) gate insulator to enhance the synaptic properties of oxynitride thin film transistors.In our study, we employed zinc oxynitride (ZnON) as the channel material. ZnON offers greater stability compared to oxide materials due to its reduced oxygen vacancy concentration. We precisely controlled the solution composition and the curing process during the deposition of the electrolyte insulating layer. To optimize the formation of electric double layers (EDLs), we varied the weight ratio of poly(melamine-co-formaldehyde) methylated (PMF) and poly-4-vinyl phenol (PVP). Our investigation focused on synaptic properties, including excitatory postsynaptic current (EPSC), paired-pulse facilitation (PPF), long-term memory, and high-band filtering. All samples exhibited a counter-clockwise hysteresis curve and a memory window exceeding 2 V at 1 V of drain voltage (Vd), except for the PVP:PMF 2:1 sample. Notably, the device with a 10:1 weight ratio demonstrated the most effective EPSC response, showing a gradual increase in EPSC with repeated gate voltage (Vg) pulses. Additionally, we analyzed the EPSC characteristics under various Vg pulse conditions (width, frequency, period). To understand the behavior of internal ions and dipoles in the cross-linked PVP insulating layer, we measured the frequency-dependent capacitance. Interestingly, the capacitance decreased as the frequency increased, suggesting that internal ions could be easily influenced by electrical bias in the cross-linked PVP electrolyte, forming an EDL layer. These findings suggest that the cross-linked PVP/ZnON-based transistor could potentially serve as a significant synaptic transistor component in artificial intelligence technology.

Non-Von Neumann computing application constituted by artificial synapses based on electrochemical random-access memory (ECRAM) has aroused tremendous attention owing to its capability to perform parallel operations, thus reducing the cost of time and energy spent [1-3]. Existing ECRAM synapses comprise two-terminal memristors and three-terminal synaptic transistors (SynT). While low cost, scalability, and high density are the highlights for memristors, their nonlinear, asymmetric state modulation, high ON current withdrawal, and sneak path in crossbar array integration prevent them from becoming the ideal synaptic elements for artificial neural networks (ANN) [4]. SynT configuration, on the other hand, offers an additional electrolyte-gated control from which ion doping content can be monitored via redox reactions, thus decoupling write-read actions and improving the linearity of programming states [5-6]. Nevertheless, existing SynTs suffer from different integration issues stemming from liquid-based ionic conductors and manually exfoliated channels. Moreover, several kinds of SynTs possess highly conductive channels in the range of µS to mS, significantly scaling up the energy spent for analog states reading. Despite having numerous communications on the performance of different ECRAM, a comprehensive electrochemical view of ion intercalation into the active material, the main root of conductance modulation, is clearly missing.In this work, we present the elaboration procedure of an all-solid-state synaptic transistor composed of nanoscale electrolyte and channel layers. The devices have been elaborated on 8’’ Silicon wafers using microfabrication processes compatible with conventional semiconductor technology and CMOS back end of line (BEoL) integration. (Figure 1a)We demonstrate the excellent synaptic plasticity properties of short-term potentiation (STP) and long-term potentiation (LTP) of our SynT. We performed tests to study the correlation between linearity, asymmetry, and the number of analog states. By averaging the amount of injected ions per write operation, we estimated the energy consumed for switching among adjacent states of this device is 22.5 pJ, yielding area-normalized energy of 4 fJ/µm2. In addition, operating in the range of nS, our SynTs meet the critical criteria of low energy consumption for both write and read operations. Endurance was highlighted by cycling in ambient conditions with 100 states of potentiation and depression for over 1000 cycles with only a slight variation of Gmax/Gmin ratio of 6.2 % (Figure 1b, c). Approximately 95 % accuracy in MNIST pattern recognition test on ANN in the crossbar array configuration has been obtained by simulation with SynTs as synaptic elements reassured SynT is a promising candidate for future neuromorphic computing hardware.To shed light on the properties of intercalation phenomena of Li ions into the TiO2 layer, a further electrochemical study on a cell comprising Ti/TiO2/LiPON/Li corresponding to the SynT gate stack was performed. This understanding will help to elucidate the correlation with conductance modulation characteristics for a synaptic transistor. Multiple tests were carried out, including cyclic voltammetry (CV) with different scan rates, rate capability with Galvanostatic cycling with potential limit (GCPL), and electrochemical impedance spectroscopy (EIS) on different states of charge. A circuit model was introduced to fit the frequency response of the cell, and it explained well the behavior of charging capability at different OCV (Figure 1d).

Long-term synaptic plasticity simulated in ionic liquid/polymer hybrid electrolyte gated organic transistors

The development of physiology and neurological diseases is normally accompanied by the production of acidic changes, making it crucial to develop biosensing system to detect pH variations to prevent early organ lesions. Due to the electrical double layer at the electrolyte/nanowire interface, artificial synaptic transistors can sensitively detect the pH variations. However, few studies focus on monitoring pH variations of the body based on synaptic transistors. In this study, electrolyte-gated synaptic transistors were fabricated using zinc tin oxide (ZnSnO) nanowires as channel materials. The fabricated devices can successfully mimic the functionality of acid-sensing ion channels (ASICs) in biological synapses, including excitatory postsynaptic currents (EPSCs), paired-pulse facilitations (PPFs), and short-term potentiations (STPs) under acidic conditions. Furthermore, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${3}\times {3}$ </tex-math></inline-formula> ZnSnO synaptic transistor arrays were constructed to monitor acid stimulations of diverse intensities and different regions to mimic the tongue ability of human. This work can not only advance the understanding of ASIC functionality in artificial synaptic devices, but also provide a novel approach to develop bioinspired taste-sensing systems with integrated sensing and memory capabilities.

An experimental study of mobile teletext reception is described. Teletext in Japan is a broadband signal with 5.73 Mb/s; therefore, multipath interference is a serious problem in mobile reception, and it is impossible to obtain the teletext correctly by conventional methods. A multipath reduction technique using signal processing in the frequency domain is developed. In this technique, an original chirp signal is used for reference to identify radio propagation paths. In field trials, the delay profile is precisely obtained, and the bit error rate can be reduced. the error correction capability is also tested in a computer simulation. The proposed method was found to improve the error rate when the signal-to-noise ratio was greater than 20 dB. >

Xanthan gum biopolymer gated low voltage-operating photo synaptic organic field-effect transistor for neuromorphic electronics

Bilateral collicular interaction: Modulation of auditory signal processing in frequency domain

In this study, we propose a polysilicon (poly-Si) channel thin-film synaptic transistor based on an organic-inorganic hybrid electric-double-layer (EDL) structured gate dielectric. To implement the hybrid EDLs, which play a key role in artificial synaptic transistors, a protonic mobile ion-based bio-inspired chitosan electrolyte and a high-k Ta <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> dielectric thin-film were applied. Synaptic modulation was realized on the poly-Si channels by the polarization reaction of mobile protonic ions in the organic chitosan electrolyte. The chemically and mechanically stable inorganic Ta <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> O <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">5</sub> dielectric capping layer prevented deterioration of the organic electrolyte due to the patterning and etching processes, enabling the fabrication of large-scale integrated circuits. The fabricated EDL field-effect transistors (FETs) verified essential synaptic behavior. Therefore, polarization and depolarization in EDLs, paired-pulse facilitation, and excitatory post-synaptic current modulation were successfully emulated by applying pre-synaptic stimulation spikes. As a result, the proposed CMOS-compatible poly-Si thin-film synaptic FETs based on hybrid EDLs are suitable for emerging neuromorphic systems and compact artificial neural networks.

We demonstrated a CNT synaptic transistor by integrating 6,6-phenyl-C61 butyric acid methyl ester(PCBM) molecules as charge storage molecules in a polyimide(PI) dielectric layer with carbon nanotubes(CNTs) for the transistor channel. Specifically, we fabricated and compared three different kinds of CNT-based synaptic transistors: a control device with Al2O3/PI, a single PCBM device with Al2O3/PI:PCBM(0.1 wt%), and a double PCBM device with Al2O3/PI:PCBM(0.1 wt%)/PI:PCBM(0.05 wt%). Statistically, essential device parameters such as Off and On currents, On/Off ratio, device yield, and longterm retention stability for the three kinds of transistor devices were extracted and compared. Notably, the double PCBM device exhibited the most excellent memory transistor behavior. Pulse response properties with postsynaptic dynamic current were also evaluated. Among all of the testing devices, double PCBM device consumed such low power for stand-by and its peak current ratio was so large that the postsynaptic current was also reliably and repeatedly generated. Postsynaptic hole currents through the CNT channel can be generated by electrons trapped in the PCBM molecules and last for a relatively short time(~ hundreds of msec). Under one certain testing configuration, the electrons trapped in the PCBM can also be preserved in a nonvolatile manner for a long-term period. Its integrated platform with extremely low stand-by power should pave a promising road toward next-generation neuromorphic systems, which would emulate the brain power of 20W.

We developed a bionic multiterminal, tunable ion gel-gated synaptic transistor to emulate reflex actions. Our device is innovatively designed with multi-presynaptic and modulatory terminals, which emulates the dendrites and descending pathways from the brain. These structures enable simultaneous processing of multiple signals from diverse sensory modalities and active modulation as enhancement or suppression of responses. The device emulates basic synaptic functions including current (EPSC) and high-pass filtering, while being sensitive to the amplitude, frequency, and duration of external stimuli. To demonstrate its potential applications, we emulate the eyeblink reflex in different scenarios. Results indicate that our synaptic transistor is well capable of multi-stimuli sensing under modulations, which is a crucial ability for artificial systems to perceive and adapt to more complex environments.

The widely anticipated end to Moore’s law and the growing demand for low power computing systems capable of learning, image recognition and real-time analysis of large streams of unstructured data has spurred intense interest in neural algorithms for brain-inspired computing. The brain is capable of massively parallel information processing while consuming only ~1- 100 fJ per synaptic event. Inspired by the efficiency of the brain, CMOS-based neural architectures and tunable resistance elements (memristors) are being developed for low-power pattern recognition and machine learning. However, the volatility, design complexity and high supply voltages for CMOS architectures on one hand, and the stochastic and energy-costly switching of memristors on the other significantly complicate the path to achieve the extreme interconnectivity, information density, and energy efficiency of the brain using either approach. To overcome these limitations, we have recently demonstrated a Li-ion synaptic transistor for analog computation (LISTA).1 LISTA is an all solid-state, non-volatile redox transistor (NVRT) with a resistance switching mechanism based upon the intercalation of Li-ion dopants into a channel of Li1-xCoO2. An NVRT differs from previously described electrochemical transistors in that dopants cannot diffuse out of the channel (after relaxation of applied bias) without an external source of charge to facilitate oxidation and liberate them as ions in a surrounding electrolyte. This is identical to the charge storage mechanism in batteries, which require external current sources to drive charge/discharge redox reactions. A major advantage of the LISTA device is that resistance switching can occur without inducing large structural transformations that are common for memristive devices, such as filament formation or amorphous-to-crystalline phase transformation. In my talk I will show that the structurally stable, diffusion-driven switching mechanism of Li intercalation allows LISTA to operate with a low ‘write’ noise, a near linear response to ‘write’ operations, and orders of magnitude lower switching voltages and currents. Furthermore, our simulations of the device physics demonstrate that scaled LISTA devices will have orders of magnitude lower energy consumption than any resistive memory device to date, and could operate as part of a neural architecture with an energy efficiency matching the brain. Finally, I will introduce an NVRT device based entirely on organic polymers fabricated on flexible substrates. Such devices could in principle form direct interfaces with the brain opening up the opportunity to build advanced neural prostheses with integrated brain-machine interfaces. 1.Fuller, E. J.; Gabaly, F. E.; Léonard, F.; Agarwal, S.; Plimpton, S. J.; Jacobs-Gedrim, R. B.; James, C. D.; Marinella, M. J.; Talin, A. A., Li-Ion Synaptic Transistor for Low Power Analog Computing. Advanced Materials 2016, DOI: 10.1002/adma.201604310

In this study, a P3HT-based multi-gate frequency-dependent synaptic transistor is fabricated, which demonstrates significant advantages in mimicking the transmission characteristics of biological synaptic activities. The proposed device simulates outputs related to frequency and gate voltage modulation. This device can respond differently to inputs ranging from 0.75 to 11.11 Hz, and at the same input frequency, it exhibits different responses by varying the control gate voltage from 0 to −0.8 V. This innovative design can dynamically adjust the cutoff frequency, enhancing edge feature processing in images, thereby significantly improving the recognition accuracy of information in blurry images that can be difficult for humans to distinguish. Our results provide a hardware edge-computing image processing method, overcoming the limitations of traditional single-gate transistors that typically have fixed parameters. The recognition accuracy of information in blurry images preprocessed by this device improved significantly from 80% to 100%. Combined with the multi-gate design, this synaptic device excels not only in edge enhancement and image processing but also offers robust hardware support for future neuromorphic electronics.

A HfS[formula omitted]-based photoelectronic synaptic transistor with tunable synaptic plasticity for emotional memory

Synaptic transistor based on PVK mixed with oxadiazole and its logic gate application

It is pointed out that existing backpropagation networks cannot be used for many signal-processing tasks because the signals are often represented with complex values. A complex-valued learning algorithm is derived for a backpropagation network where one or more of the inputs, outputs, and weight factors are complex-valued. The complex valued backpropagation network is tested with exclusive-OR problems for complex inputs, outputs, and weights. The network shows excellent mapping performance for this problem