Dynamic grid quorum: A novel approach for minimizing power consumption without data migration in grid quorums

Power-saving has become a central issue for well-configured SOC platforms. In particular, as a high percentage of the total energy is used by the storage systems, the cost effectiveness of data management is equally as important as reliability and availability. To address this issue, we propose the dynamic grid quorum as a method for reducing the power consumption of large-scale distributed storage systems. The basic principle of our approach is to skew the workload toward a small number of quorums. This can be realized using the following three techniques. First, our system allows reconfiguration by exchanging nodes without any data migration, so that high-capacity nodes can be reallocated to busier quorums. Second, for more effective skewing of the workload, we introduce the notion of dual allocation, which makes it possible to consider two distinct allocations in the same grid for write and read quorums. Finally, we present an optimization algorithm to find a pair of a strategy and an allocation of nodes, which minimizes power for a given system setting and its workload. We also demonstrate that the dynamic grid quorum saves, on average, 14---25% energy compared with static configurations, when the intensity of the total workload changes.

On-site study was held to investigate the influences of load factor on power consumption and energy performance of water-cooled air conditioning (WCAC) system. A comprehensive measurement has been conducted to a WCAC plant of a supermall building located in West Java, Indonesia. Hourly and daily power consumption and performance characteristics of the WCAC system at varied load factors for a period of one year were evaluated. Regression analyses were developed to evaluate the influences of load factor on the WCAC power consumption and performance. The WCAC system was found to operate with varied load factor ranging from 70 percent to 100 percent. Power consumption of the system was strongly influenced by the load factor. Power consumption boosted when the power factor increased. The increase of load factor was also found to significantly improve the cooling capacity but reduce the coefficient of performance (COP). The best potential performance of the investigated WCAC system could be obtained at load factor between 70 percent and 85 percent.

Large-scale storage systems are crucial components in data-intensive applications such as search engine clusters, video-on-demand servers, sensor networks and grid computing. A storage server typically consists of a set of storage devices. In such systems, data layouts may need to be reconfigured over time for load balancing or in the event of system failure/upgrades. It is critical to migrate data to their target locations as quickly as possible to obtain the best performance. Most of the previous results on data migration assume that each storage node can perform only one data transfer at a time. A storage node, however, can typically handle multiple transfers simultaneously and this can reduce the total migration time significantly. Moreover, storage devices tend to have heterogeneous capabilities as devices may be added over time due to storage demand increase. In this paper, we consider the heterogeneous data migration problem, where we assume that each storage node v has different transfer constraint cv, which represents how many simultaneous transfers v can handle. We develop algorithms to minimize the data migration time. We show that it is possible to find an optimal migration schedule when all cvs are even. Furthermore, though the problem is NP-hard in general, we give an efficient algorithm that offers a rigorous (1 + o(1))-approximation guarantee.

Cloud computing systems require a huge number of storage servers, with growing implications for power bills, carbon emissions and the logistics of data centers. These considerations have motivated researchers to improve the energy efficiency of storage servers. Most servers use a lot of power irrespective of the amount of computing that they are doing, and one important goal is to redesign servers to be power-proportional, meaning that the power consumption is in step with the workload. Research on large-scale storage systems is hampered by their cost (Wang et al. 2014). It is therefore desirable to develop a scalable test-bed for evaluating the power consumption of large-scale storage systems. We are building on two open-source projects to construct a test-bed which will contribute to the assessment of power consumption in tiered storage systems.

Hard disks are one of the largest sources of power consumption in large-scale storage systems. The disk spin up/down technique has been shown to be an effective solution to this problem. Accordingly, the Open Compute Project (OCP) proposed a storage server for cold data, known as Cold Storage, to reduce power consumption using the spin-down technique in large-scale storage systems. With the aim of making effective use of Cold Storage, we characterize the power consumed by a hard disk in its various modes of operation. We then analyze the workload of an instant messaging service. These our contributions should provide guidelines for the implementation of a stable and energy-efficient distributed file system on a Cold Storage server, and to establish a spin-down policy that is power-proportional and promotes reliability.

Data migration schemes are critical to balance the load in storage clusters for performance improvement. However, as NAND flash based SSDs are widely deployed in storage systems, extending the lifespan of SSD storage clusters becomes a new challenge for data migration. Prior approaches designed for HDD storage clusters, however, are inefficient due to excessive write amplification during data migration, which significantly decrease the lifespan of SSD storage clusters. To overcome this problem, we propose EDM, an endurance aware data migration scheme with careful data placement and movement to minimize the data migrated, so as to limit the worn-out of SSDs while improving the performance. Based on the observation that performance degradation is dominated by the wear speed of an SSD, which is affected by both the storage utilization and the write intensity, two complementary data migration policies are designed to explore the trade-offs among throughput, response time during migration, and lifetime of SSD storage clusters. Moreover, we design an SSD wear model and quantitatively calculate the amount of data migrated as well as the sources and destinations of the migration, so as to reduce the write amplification caused by migration. Results on a real storage cluster using real-world traces show that EDM performs favorably versus existing HDD based migration techniques, reducing cluster-wide aggregate erase count by up to 40%. In the meantime, it improves the performance by 25% on average compared to the baseline system which achieves almost the same effectiveness of performance improvement as previous migration techniques.

Massive Multiple-Input Multiple-Output (Massive MIMO) serves as a foundational enabling technology for 5G and future communication systems, markedly boosting spectral and energy efficiency through the deployment of large-scale antenna arrays. However, the scaling-up of antenna arrays has led to a substantial increase in system power consumption and hardware costs, with high-precision analog-to-digital converters (ADCs) emerging as the dominant power consumption bottleneck in the radio frequency chain. To alleviate system complexity and power consumption, low-resolution ADCs (13 bits) have attracted extensive research interest in recent years. Such schemes can substantially curtail hardware costs and energy consumption while retaining satisfactory system performance. Nevertheless, the introduction of severe nonlinear distortion due to low-precision quantization disrupts the linear Gaussian model assumption upon which traditional receiver algorithms rely, resulting in compromised channel estimation and signal detection performance. Quantization errors demonstrate non-Gaussian and input-dependent characteristics, leading to the degradation of amplitude information and thus constraining the applicability of technologies such as high-order modulation and high-precision sensing. This paper presents a systematic review of low-precision quantization techniques for Massive MIMO. It first investigates the impacts of low-bit quantization on system models and signal statistical properties. Subsequently, it elaborates on transceiver architectures and key design challenges pertaining to low-precision ADCs/DACs. The paper highlights signal processing and algorithmic strategies to overcome quantization distortion, including Bussgang decomposition linearization methods, statistical inference techniques such as approximate message passing (AMP), model-driven deep learning frameworks, and quantization architectures endowed with noise-shaping capabilities. Finally, it discusses the challenges and future directions of this technology in emerging scenarios, including terahertz communications, intelligent reflecting surfaces, and integrated sensing and communication. This paper seeks to provide researchers with a systematic technical overview, clarifying the intrinsic connections and trade-offs among different methods, and offering valuable insights for the realization of high-energy-efficiency and low-cost Massive MIMO systems.

Multi-tiered storage systems today are integrating Solid State Disks (SSD) on top of traditional rotational hard disks for performance enhancement due to the significant IO improvements in SSD technology. It is widely recognized that automated data migration between SSD and HDD plays a critical role in effective integration of SSD into multi-tiered storage systems. Furthermore, effective data migration has to take into account of application specific workload characteristics, deadlines, and IO profiles. An important and interesting challenge for automated data migration in multi-tiered storage systems is how to fully release the power of data migration while guaranteeing the migration deadline is critical to maximizing the performance of SSD-enabled multi-tiered storage system. In this paper, we present an adaptive look ahead data migration model that can incorporate application specific characteristics and I/O profiles as well as workload deadlines. Our adaptive data migration model has three unique features. First, it incorporates a set of key factors that may impact on the performance of look ahead migration efficiency in our formal model develop. Second, our data migration model can adaptively determine the optimal look ahead window size, based on several parameters, to optimize the effectiveness of look ahead migration. Third, we formally and experimentally show that the adaptive data migration model can improve overall system performance and resource utilization while meeting workload deadlines. Through our trace driven experimental study, we compare the adaptive look ahead migration approach with the basic migration model and show that the adaptive migration model is effective and efficient for continuously improving and tuning of the performance and scalability of multi-tier storage systems.

Chip Multi-Processors (CMPs) is applied in the embedded system. An embedded system with more cores means that there will be token more size and consumed more power. Scathed-Pad Memory (SPM) and Non-Volatile Memory (NVM) are new memory technologies. The embedded system can reduce its size and power consumption, which employ the SPM and the NVM. In this paper, we propose a Task data Optimization allocation with Data Migration algorithm (TODMA). Data migration and dynamic programming are combined to allocating task data, which has the dependency between them, in the TOMDMA algorithm. The Experimental results show that the TODMA algorithm can reduce time costs and the number of write activities on NVM by 36.25% and 24.58% respectively, and lower 34.41% systems energy consumption comparing to greedy algorithm And comparing to IDOA, the corresponding reduction are 33.82% , 10.00% and 24.27%.

The rising concern for power consumption of large-scale computer systems puts a research focus on the respective measurement methods. Varying workload patterns and energy efficiency optimizations cause highly dynamic power consumption on today’s compute nodes—a challenge for every measurement infrastructure. We identify five partly contradictory requirements that characterize such infrastructures: temporal granularity, spatial granularity, well-defined accuracy, scalability, and cost. In two projects we push the boundaries for these criteria: a scalable measurement solution for hundreds of nodes at millisecond granularity that is tightly integrated into the HPC system, and a sophisticated single-node instrumentation to measure the power consumption of application events in the microsecond range. Both measurement solutions are calibrated and their accuracy is carefully studied. We discuss scalable processing of the measurements for global monitoring in large-scale systems and use this data for energy efficiency analyses in combination with contextual information such as application performance trace data.

After 15 years of exponential improvement in microprocessor clock rates, the physical principles allowing for Dennard scaling, which enabled performance improvements without a commensurate increase in power consumption, have all but ended. Until now, most HPC systems have not focused on power efficiency. However, as the cost of power reaches parity with capital costs, it is increasingly important to compare systems with metrics based on the sustained performance per watt. Therefore we need to establish practical methods to measure power consumption of such systems in- situ in order to support such metrics. Our study provides power measurements for various computational loads on the largest scale HPC systems ever involved in such an assessment. This study demonstrates clearly that, contrary to conventional wisdom, the power consumed while running the high performance Linpack (HPL) benchmark is very close to the power consumed by any subset of a typical compute-intensive scientific workload. Therefore, HPL, which in most cases cannot serve as a suitable workload for performance measurements, can be used for the purposes of power measurement. Furthermore, we show through measurements on a large scale system that the power consumed by smaller subsets of the system can be projected straightforwardly and accurately to estimate the power consumption of the full system. This allows a less invasive approach for determining the power consumption of large-scale systems.

Focus on the energy saving problem in cloud radio access network (C-RAN), this paper jointly optimizes the system power consumption and delay performance with the consideration of quality-of-service (QoS) and fronthaul capacity. First, to make the power consumption model compatible with C-RAN, we give a modified power consumption model of base station (BS) on the basis of the well-known EARTH model. Then, to save the system power consumption, the sleeping strategy is introduced to dynamically switch ON/OFF the BS. In order to analyze BS mode under the sleeping strategy, the arriving users are modeled as a discrete-time queuing network. Based on the global balance equations of the queuing network, the probability that the BS is in active mode can be obtained. In the light of the above result, to further reduce the system power consumption, power control is introduced under the constraint of QoS and fronthaul capacity. Meanwhile, by applying Lyapunov method, a different way to consider the delay performance is provided, and at the same time, network stability is guaranteed. Simulation results show that the proposed algorithm can balance the power consumption and delay by adjusting relevant parameters, and achieve the goal of energy saving on the basis of delay control.

Microelectronics mounted on a piezoelectric transducer: Method, simulations, and measurements

With increasing design complexity of portable handheld devices, decreasing system power and energy consumption has become a key design metric. It is crucial for the designers to accurately evaluate the system power consumption in detail during the development process, especially for the power hungry digital system processing (DSP) system. This paper presents an automatic power estimation methodology, which can provide accurate dynamic power consumption distributions of DSP components implemented on Xilinx FPGAs. Additionally, the dependences of power consumption on system level parameters, including clock frequency, area utilization ratio and activity rate, are investigated from sensitivity metric. According to the experimental results, several power optimizations can be performed at the early stages of design flow.

This paper presents the design and implementation of an optimised MEMS-based reconfigurable VCO for a multi-standard mobile terminal for GSM900, DCS1800 and WCDMA standards. In this VCO design, the passive components, including inductors, capacitors and switches are replaced by MEMS components, to improve the system performance and reduce the system power consumption. Moreover, a phase noise optimisation algorithm is also proposed to optimise the VCO design for optimum system phase noise and minimum power consumption. Results show that a 50% reduction of power consumption is achieved when the MEMS components are used instead of the passive components. A 31% further reduction of power consumption is also achieved when the tail-current optimisation algorithm is applied. This characteristic makes the VCO a better candidate for wireless communication applications where power consumption is the major factor.