Electromagnetic Susceptibility Analysis on a Digital Pulse Width Modulator for SMPSs

(Kleinman) Associate Professor and Chief of Anesthesiology (Hines), Department of Anesthesiology, Edward Hines Jr. Veterans Administration Hospital, Loyola University Stritch School of Medicine.(Hamilton) Senior Staff Engineer, Telectronics Pacing Systems.(Hariman) Professor of Medicine, Division of Cardiology, Edward Hines Jr. Veterans Administration Hospital, Loyola University Stritch School of Medicine.(Olshansky) Associate Professor of Medicine, Division of Cardiology, Loyola University Stritch School of Medicine.(Justus) Staff nurse anesthetist, Department of Anesthesiology, Edward Hines Jr. Veterans Administration Hospital.(Desai) Staff Anesthesiologist, Department of Anesthesiology, Edward Hines Jr. Veterans Administration Hospital.Received from Edward Hines Jr. Veterans Administration Hospital, Hines, Illinois. Submitted for publication June 24, 1996. Accepted for publication September 11, 1996.Address reprint requests to Dr. Kleinman: Department of Anesthesiology, Loyola University Medical Center, 2160 South First Avenue, Maywood, Illinois 60153.Cardiac pacemaker failure in patients who are pacemaker dependent results in asystole, and can be catastrophic. A major concern is how electromagnetic interference (EMI) from the electrosurgical unit (ESU) will alter pacemaker function. The effects of EMI on pacemaker function are multiple. Electromagnetic interference, by itself, can reprogram some multiprogrammable pacemakers. [1–3]In addition, some pacemakers may automatically convert to the VOO (see Table 1for explanation of pacemaker code) or DOO mode. [4,5]Others may be totally inhibited. [4,5]If total inhibition occurs in a pacemaker-dependent patient, the result will be asystole. Pacemaker inhibition induced by EMI from the ESU generally responds to placement of a precordial magnet on the skin overlying the pacemaker generator. This effectively activates a magnetic reed switch within the pacemaker that converts the pacemaker to a VOO or DOO mode as long as the magnet overlies the generator unit. Atlee [4]recommends having the pacemaker reprogrammed to the VOO mode using a pacemaker programmer. In the VOO mode, the pacemaker is not expected to sense the EMI and, therefore, will continue to pace the heart asynchronously. We report a case of a pacemaker-dependent patient where EMI from the ESU produced total pacemaker inhibition, despite proper placement of a precordial magnet or use of a pacemaker programmer.The patient was a 70-yr-old man scheduled for resection of a carcinoma of the left neck. He had a DDDR pacemaker (Model 1254, Telectronics, Englewood, CO) placed for the treatment of complete heart block 3 yr before his current admission. He was currently pacemaker dependent. The pacemaker generator was placed in the left infraclavicular region and attached to endocardial ventricular (Cordis Core, Miami, FL, model 330–201) and atrial (Telectronics, model 330–801) leads. He had no subsequent problems related to his heart or pacemaker since its insertion. Regular clinic visits showed that his pacemaker was working appropriately and the intended programmed settings, in the DDD mode, were operational.Physical examination revealed an arterial pressure of 150/70 mmHg and a paced heart rate of 70 beats/min.After appropriate monitors were placed, including a cannula in his right radial artery for continuous blood pressure monitoring, anesthesia was induced with thiopental and, after intravenous succinylcholine, the trachea was intubated. The return plate to the unipolar ESU (System 5000, Power Plus, C. R. Bard, Englewood, CO) was placed under the patient's left buttock. Desflurane and nitrous oxide were used to maintain anesthesia. The operative course was unremarkable until neck dissection was begun. Activation of the ESU by the surgeon initiated asystole. After placement of a precordial magnet on the skin over the pacemaker generator by the anesthesiologist, the surgeon proceeded. When the ESU was activated again, the pacemaker was totally inhibited, asystole ensued for almost 6 s, and the arterial pressure trace decreased precipitously. A cardiologist then interrogated and reprogrammed the pacemaker to the VOO mode (Telectronics Pacemaker Programmer model 9600). The surgeons proceeded once again with the surgery. Activation of the ESU continued to result in asystole, duplicating the previous findings. The operation was completed using a bipolar ESU. The pacemaker functioned as expected in the programmed VOO mode for the remainder of the surgery, which proceeded uneventfully.Postoperatively, the pacemaker was interrogated, and found functioning normally. It was then reprogrammed to its previous DDD settings.Use of a precordial magnet to convert a pacemaker to an asynchronous mode (VOO or DOO) should be restricted to instances when EMI can cause life-threatening inhibition of the pacemaker. Routine prophylactic use of the precordial magnet is not recommended because of possible pacemaker reprogramming in the presence of EMI. [4,5]This is particularly true for those pacemakers that use a magnetic reed switch to enable the pacemaker to receive programming instructions. [5]Radiofrequency signals are used for programming instructions after the magnetic reed switch has been enabled. High frequency EMI from the ESU could be misinterpreted as a programming instruction. [5]The new reprogrammed parameters would then become manifest after the magnet is taken off the skin overlying the pacemaker generator. How the pacemaker would be reprogrammed depends on the pacemaker's characteristics and is often unpredictable.With the activation of the ESU, the patient's arterial pressure decreased precipitously. Because the patient was pacemaker dependent, we elected to change the mode of the pacemaker from DDD to VOO, using the precordial magnet. However, this failed to prevent a recurrence of the events when the ESU was once again activated. Failure of a precordial magnet to change a VVI pacemaker to VOO mode in the surgical setting was described previously. [6]However, in that case, failure of the magnet occurred because the pacemaker had inadvertently been left in a noninvasive threshold testing mode, designated as “vario” by the manufacturer, when the patient was seen in the pacemaker clinic before his surgery. In the “vario” mode, application of a precordial magnet will not convert the pacemaker from VVI to VOO. The Telectronics Model 1254 pacemaker present in our patient does not have a “vario” mode. In addition, our patient's pacemaker clinic records clearly documented that the pacemaker was in the appropriate DDD mode, and the problem persisted despite appropriate reprogramming of the pacemaker to the VOO mode by the cardiologist.The events described were not due to technical pacemaker failure, because the pacemaker was subsequently found to be operating within company specifications. This pacemaker, similar to all dual-chambered Telectronics pacemakers, is equipped with a unique, high-voltage protection circuit (Figure 1). This circuit monitors the voltages continuously in the electrodes and the case of the generator itself. High voltages monitored include those induced by the ESU or by defibrillator shocks. Once a high voltage, exceeding manufacturer's threshold, is detected, electronic switches open, effectively disconnecting all electrodes (and the case) from the pacemaker output circuitry. This protects the components of the pacemaker circuitry from these high voltages, which prevents permanent pacemaker damage but also prevents effective output from the pacemaker. In the presence of the EMI from the ESU, the impulses emanating from the pacemaker could not exit and conduct down the pacemaker lead. This led to an apparent and effective pacing failure in the VOO mode even though the pacemaker's output circuitry was in the VOO mode. This can lead to temporary pacemaker failure, as demonstrated by our case.All pacemaker manufacturers use a strategy to prevent or limit retrograde currents from entering the pacemaker. The specific circuitry involved varies from company to company. Most companies use a series of zener diodes to prevent retrograde currents.*,**,***,**** This arrangement will theoretically allow an operational VOO mode even in the presence of EMI. However, it also makes possible, in the presence of very high induced voltages, retrograde currents, and, therefore, possible permanent pacemaker damage. The circuit design depicted in Figure 1can lead to temporary operational failure of the VOO mode in the presence of powerful EMI, as it did in our case, but will prevent possible permanent pacemaker damage. Because of the absence of clinical outcome data, each manufacturer determines which tradeoffs to make and, therefore, which circuit design to incorporate into their devices.A few lessons can be learned from this case. First, in the presence of EMI from a unipolar ESU, a precordial magnet will not effectively convert all pacemakers to a functional VOO mode even when the pacemaker's output circuitry is functioning properly. Second, even reprogramming this type of pacemaker to the VOO mode will not guarantee continuous pacing in the presence of powerful EMI. We recommend that, if the pacemaker output is inhibited by the ESU, and inhibition results in asystole, a precordial magnet should still be tried, because, without knowledge of pacemaker brand and model, it can not be known a priori whether the precordial magnet will work. If the use of the precordial magnet still leads to pacemaker inhibition with ESU activation, the anesthesiologist should consider whether brief periods of asystole might be tolerated, provided there was sufficient time for recovery between periods when the surgeon was not using the ESU. If this approach is not feasible, the position of the return plate should be changed. This, conceivably, could change the voltage vector, leading to a smaller amount of current being conducted retrograde by the pacemaker lead. Another strategy that could be tried is to decrease the power of the ESU. If these maneuvers fail to reverse the inhibition of output of the pacemaker, the anesthesiologist and surgeon should consider completion of the operation by using a bipolar ESU. Afterwards, the pacemaker should be interrogated electronically to ensure proper function and programmed settings.There are two heat-generating surgical scalpels that likely will not interfere with pacemaker function. These devices are now not commonly used. However, anesthesiologists should be aware of them, because they offer possible alternatives to dealing with the problem described in our case. One device is the Shaw Hemostatic Scalpel (Hemostatix Medical Devices, Cherry Hill, NJ). [7]It works by true cautery but is electrically insulated from the patient by a Teflon (E.I. DuPont de Nemours Co., Wilmington, DE) coating. The other is the Ultracision Harmonic Scalpel (Ultracision, Smithfield, RI). [8]This device generates heat for cutting and coagulation by vibrating at a high frequency. The harmonic scalpel, therefore, relies on mechanical, not electrical, energy to cut and coagulate and has been used successfully in a pacemaker-dependent patient. [8]More than 10 yr ago, Shapiro et al., [6]in concluding his article on intraoperative pacemaker failure wrote that “it is impossible to know how every pacemaker functions.” Because of their growing complexity at the time, he called for industry-wide standardization of all aspects of pacemaker technology. In the ensuing 10 yr, pacemaker technology has grown even more complex, and Shapiro's sentiments are as true now as they were then.*Personal communication with Medtronic, May 1996.**Personal communication with CPI, May 1996.***Personal communication with Pacesetter, May 1996.****Personal communication with Intermedics, May 1996.

In this paper, we analyzed a spectrum of the SMPS (Switching Mode Power Supply) which uses DPWM (Digital Pulse Width Modulation) and adopts SSC (Spread Spectrum Clocking) circuit to reduce EMI (Electro-Magnetic Interference) noise. Generally, SSC circuits are used in order to reduce noise peaks by spreading switching frequency spectrum. Such noise peak reduction is verified with a general FFT (Fast Fourier Transform) method through sufficiently long time which includes many switching cycles. However, effects of drastic changes of power supply voltage such as voltage dropping, onetime noise or bounce in power distribution network are apparently not revealed in the spectrum because their effects are averaged down in the general FFT method. These ripples in power distribution become sources of EMI failures. For accurate spectrum analysis in the transition period, FFT should be performed separately with respect to each transient section. Therefore, we carried out short-time Fourier transform (STFT) with respect to several local window sections as well as general Fourier transform with respect to the overall interval. The separated local windows are the overshoot section and the undershoot section.

This paper presents the use of a combined random pulse position modulation (RPPM)/digital pulsewidth modulation (DPWM) digital controller for a buck converter to simultaneously achieve low-conductive electromagnetic interference (EMI) and a fast transient response. An area-efficient RPPM/DPWM controller suitable for advanced system-on-chip integration is proposed and implemented in a field-programmable gate array-based prototype to verify its EMI-suppression capability. The experimental results for a 1.2-V digital buck converter show that the proposed digital switching regulator can switch between RPPM and DPWM modes smoothly and automatically. Closed-loop system measurements demonstrate that, compared to DPWM, up to 17.27 and 14.99 dB power spectra reductions are obtained in the input current and switching node, respectively.

PurposeThe model for digitally controlled three-phase pulse width modulation (PWM) boost rectifiers is a sampled data model, which is different from the continuous time domain models presented in previous studies. The controller, which is tuned according to the model in continuous time domain and discretized by approximation methods, may exhibit some unpredictable performances and even result in unstable systems under some extreme situations. Consequently, a small-signal discrete-time model of digitally controlled three-phase PWM boost rectifier is required. The purpose of this paper is to provide a simple but accurate small-signal discrete-time model of digital controlled three-phase PWM boost rectifier, which explains the effect of the sampling period, modulator and time delays on system dynamic and improves the control performance.Design/methodology/approachBased on the Laplace domain analysis and the waveforms of up-down-count modulator, the small signal model of digital pulse width modulation (DPWM) in the Laplace domain is presented. With a combination of state-space average and a discrete-time modeling technique, a simplified large signal discrete time model is developed. With rotation transformation and feed-forward decoupling, the large-signal model is decoupled into a single input single output system with rotation transformation. Then, an integrated small signal model in the Laplace domain is constructed that included the time delay and modulation effect. Implementing the modified z-transform, a small-signal discrete-time model is derived from the integrated small signal model.FindingsIn a digital control system, besides the circuit parameters, the location of pole of open-loop transfer function is also related to system sampling time, affecting the system stability, and the time delay determines the location of the zero of open-loop transfer function, affecting the system dynamic. In addition to the circuit parameters discussed in previous literature, the right half plane (RHP) zero is also determined by the sampling period and the time delay. Furthermore, the corner frequency of the RHP zero is mainly determined by the sampling period.Originality/valueThe model developed in this paper, accounting for the effect of the sampling period, modulator and time delays on the system dynamic, give a sufficient insight into the behavior of the digitally controlled three-phase PWM rectifier. It can also explain the effect of sampling period and control delay time on system dynamic, accurately predict the system stability boundary and determine the oscillation frequency of the current loop in critical stable. The experimental results verify that the model is a simple and accurate control-oriented small-signal discrete-time model for the digitally controlled three-phase PWM boost rectifier.

The duty cycle in digital pulse width modulation (DPWM) whose time resolution is as high as hundreds of picosecond will be increased since the propagation delays of internal logics and interconnects are superimposed on the on-time. The duty-cycle-increment phenomenon affects the regulation performance of converters, especially when the delays are the same magnitude level as switching period. In this paper, a compensation method based on tool command language commands is used to offset the propagation delays. Furthermore, the DPWM applies a counter, phase locked loop, and carry chain to constitute segmented delay-line, while it maintains a wide duty cycle range and a high time resolution. This DPWM is implemented by a low-cost field-programmable gate array Cyclone IV. It achieves a good linearity where R2 is 0.9949 for an 11-bit, 9.375 MHz switching frequency DPWM. The duty cycle range is from 1.52% to 97.81%. Meanwhile, the time resolution and average duty difference are 53 ps and 3.08%, respectively.

This paper presents a novel digital pulse width modulator (DPWM) structure with higher time resolution and lower input clock frequency, which is especially suitable for high frequency digitally controlled DC-DC switching converters. For the proposed DPWM, two multi-phase clock arrays are generated which have relatively close frequencies, and the time-inserting method is also utilized. The FPGA based simulation results show that, the proposed DPWM can achieve the time resolution of around 30ps and the equivalent 12-bits precision when the input dual-clock frequencies are 100MHz and 105MHz at 5MHz switching frequency.

The use of very high-resolution digital pulse width modulators (DPWMs) for high frequency dc-dc converters has been steadily increasing in recent years. However, the resolution of the DPWM formed by counters and comparators is limited when the switching frequency rise above MHz range. Given this limitation, new strategies for DPWM architectures are being designed to increase the resolution of the signals. This article proposes two new DPWMs architectures with the aim of increasing the resolution of trigger signals using field programmable gate arrays (FPGAs). The first proposed architecture is a hybrid DPWM, which integrates a clock manager and a delay line. For this architecture, the delay line is configured using FPGA intellectual properties (IP) blocks. This delay stage allows a fine resolution in the picosecond scale. In addition, an alternative solution has been implemented to generate two signals, the main signal and its complementary one, including high resolution for the dead time, which is also configurable. Both architectures have been tested through static and dynamic tests on two FPGAs of different costs, an Artix-7 (low-cost) and a Kintex-UltraScale 7 (high-cost) by Xilinx.

In this paper we present the Make And Take(MAT) approach for adding switch-mode power supply (SMPS) control to hard real-time systems. MAT enables control of the SMPS with the task scheduler and this allows the designer to use a less expensive and smaller (but noisier) SMPS without it affecting circuits sensitive to electromagnetic interference (EMI) such as high-impedance input signals and amplifiers. The MAT concept is both energy and EMI aware and schedules the tasks based on the total energy in the system by segregating them as either a producer or consumer of energy. We discuss MAT in detail and show how it can be applied to both preemptive and non-preemptive scheduling approaches. We present several properties of MAT and their impact on the system, in terms of energy and real-time scheduling decisions. We demonstrate its usage by implementing a simple processor controlled boost SMPS on a non-preemptive real-time embedded platform.

DC-DC converters are extensively used for switched mode power supplies. Hence, this chapter presents a design, modelling and hardware implementation of a digitally controlled system and its application to DC-DC buck converter being interfaced with Texas Instruments DSP TMS320F2812 controller for voltage control mode. ADC, compensator and digital PWM are the main building blocks that appears in digital controller design. Conventionally, analog controller is popular to get the desired output voltage in DC-DC converters, whereas, digital controllers offer high speed arithmetic and high resolution. Analog PI controller design approach is reviewed and the digital PI controller design is being implemented in this chapter. Digital control has been applied using standard frequency responses with design by emulation approach. Modulation delay in digital control is very critical while designing for fast control loops. Therefore, this chapter also introduces discrete time modelling of synchronous buck converter from practical standpoint considering feedback loop delays. Whereas, this chapter illustrates PI digital controller design methodology, hardware implementation and experimental verification. Experimental results have been taken from a closed loop 18W buck converter. The transient and steady state performance of the converter using PI controller are also presented with appropriate simulation and hardware results.

Power converters in the smart grid systems are essential to link renewable energy sources with all grid appliances and equipment. However, this raises the possibility of electromagnetic interference (EMI) between the smart grid elements. Hence, spread spectrum (SS) modulation techniques have been used to mitigate the EMI peaks generated from the power converters. Consequently, the performance of the nearby communication systems is affected under the presence of EMI, which is not covered in many situations. In this paper, the behavior of the G3 Power Line Communication (PLC) channel is evaluated in terms of the Shannon–Hartley equation in the presence of SS-modulated EMI from a buck converter. The SS-modulation technique used is the Random Carrier Frequency Modulation with Constant Duty cycle (RCFMFD). Moreover, The analysis is validated by experimental results obtained with a test setup reproducing the parasitic coupling between the PLC system and the power converter.

One of the most preferable types of switched-mode power supplies (SMPS) is the flyback converter, due to its wide range of application areas. Properties such as low cost, provision of multiple output voltage terminals, and higher efficiencies make it important, and hence its usage in technologies including cell phone chargers, personal computers, set-top boxes, and televisions is increasing. Special attention should be paid to the design of this type of converter due to its working principles and electromagnetic interference (EMI) performance. Rapid switching of high current and high voltage during the operation of SMPS causes an EMI problem. The level of the EMI noise should be reduced in order to not interfere with the operation of other equipment. One of the methods for mitigating EMI emissions is the frequency modulation (FM) technique. In this paper, the FM technique, which has been increasingly used as an EMI-reduction method in SMPS, is investigated. The modulation technique that was applied to the switching frequency of the flyback converter is analyzed and its effect on the EMI performance is discussed. The FM technique was tested on an AC-DC flyback converter prototype that was built with an L6566B integrated circuit. Conducted emission noises from the SMPS were measured using an EMI receiver. Experimental results showed that EMI levels were reduced after the application of the FM method.

Active electromagnetic interference (EMI) filter is a feasible and effective suppression technology for switching mode power supply (SMPS) system. The traditional active EMI filter (AEF) suppresses EMI by sensing EMI signal and generating cancelation EMI by the controlled high-frequency operational amplifier. The filtering performance not only depends on the high-open-loop gains of the operational amplifier but also on its low-output impedance of AEF. However, obtaining sufficiently low-output impedance of AEF is very difficult in a controlled filtering frequency band. To cope with it, a filtering topology of AEF based on impedance modulation for SMPS is proposed in this article. The proposed active trap EMI filter (ATEF) can trap the EMI current at the filtering frequency band with a sufficiently low-output impedance by introducing a negative impedance circuit. Finally, the impedance and the filtering performance are evaluated on a 48 W SMPS, and experimental results show that the proposed ATEF can effectively suppress the conducted EMI generated by SMPS.

Power converters for applications with high switching frequency and tight output voltage regulation such as voltage regulator modules (VRM) for microprocessors power supplies require fast dynamic response to meet the specifications. An existing control technique known as linear–non‐linear (LnL) control strategy allows improving the transient converter response by means of an easy rule for the saturation of the duty cycle. The use of a digital implementation can optimise the transient response of the multi‐phase VRM with LnL. However, digital control leads to other problems derived from time discretisation and finite word length effects. The limited resolution and the sampling delay are critical issues for digital control implementation of multi‐phase VRM with LnL control. As a result, a high‐resolution digital pulse width modulator (DPWM) and high‐speed analogue‐to‐digital (A/D) converter are required to obtain proper performance of the converter. This study is focused on the digital implementation of the well‐known LnL control in a multi‐phase VRM taking advantage of low‐cost field‐programmable gate array resources. A detailed description of the digital implementation of the main converter control blocks, which are the A/D converter, the compensator and the DPWM, is provided in the paper.

Hybrid DPWM implementation using coarse and fine programmable ADLL

A 4 MHz monolithic digital single-inductor dual-output (DSIDO) buck/boost converter based on 10-bit ΣΔ modulator and 4-bit delay line digital pulse width modulator (DPWM) is presented. Window delay line ADCs, digital PID compensator and DPWM with 2nd ΣΔ modulator are utilized in the converter to pursue highly flexible and intelligent power management. Digital Extend PWM control method is proposed to the converter which is implemented in 0.35µm CMOS process. Measurement results show the converter can work in buck mode, boost mode and buck/boost mode. The converter has a peak efficiency of 83% while offers 400mA current to the load. And the outputs voltage ripples are less than 47mV both in buck and boost mode.