Enhancing Pixel Charging Efficiency by Optimizing Thin-Film Transistor Dimensions in Gate Driver Circuits for Active-Matrix Liquid Crystal Displays.

This paper presents a new low-leakage gate driver circuit using hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) for active-matrix liquid crystal display (AMLCD) applications. The pull-down TFTs are turned OFF to maintain the high driving capability of the proposed circuit. Four phase clock signals with a duty ratio of 33% are utilized to turn ON the pull-down TFTs in advance to improve the stability of the row line at ${V}_{L}$ . The electrical characteristics of a fabricated a-Si:H TFT are measured to establish the model for HSPICE simulation to elucidate the effect of charge loss on the proposed circuit. Measurements confirm that the output waveforms of the proposed gate driver circuit remain identical to the initial waveforms and can be stabilized at ${V}_{L}$ at 85 °C over 720 h, ensuring the feasibility of the use of the proposed gate driver circuit in AMLCDs.

Chapter 5 - Performance Characteristics

Hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) are widely used in many areas and the most important application is in active matrix liquid crystal display. However, the instability of the a-Si:H TFTs constrains their usability. These TFTs have been annealed at higher temperatures in hope of improving their electrical performance. But, higher anneal temperatures become a constraint when the TFTs are grown on polymer-based flexible substrates. This study investigates the effect of anneal time on the performance of the a-Si:H TFTs on PEN. Thin-film transistors are annealed at different anneal times (4 h, 24 h, and 48 h) and were stressed under different bias conditions. Sub-threshold slope and the off-current improved with anneal time. Off-current was reduced by two orders of magnitude for 48 hours annealed TFT and sub-threshold slope became steeper with longer annealing. At positive gate-bias-stress (20 V), threshold voltage shift (∆Vt) values are positive and exhibit a power-law time dependence. High temperature measurements indicate that longer annealed TFTs show improved performance and stability compared to unannealed TFTs. This improvement is due to reduction of interface trap density and good a-Si:H/insulator interface quality with anneal time.

Raychem Corporation (RYC) and the Lawrence Livermore National Laboratory (LLNL) conducted a development program with the goal to make rugged, low-cost, high-resolution flat panel displays based on RYC'S proprietary Nematic Curvilinear Aligned Phase (NCAP) liquid crystal and LLNL's patented processes for the doping of polycrystalline silicon and the fabrication of thin film transistors (TFTs) on low-temperature, flexible, plastic substrates. The program demonstrated that thin-film transistors (TFTs) of adequate performance could be fabricated on low-cost, optical quality plastic substrates using a mix of conventional and laser processing. The maximum processing temperature of 100°C developed by the project is the lowest polysilicon TFT fabrication process reported to date.

This paper introduces novel driving methods of the pull-down unit in a gate driver circuit for enhancement- and depletion-mode a-IGZO thin-film transistors (TFTs). The proposed gate driver circuit can achieve uniform output characteristics and effectively reduce the V-OUT ripple voltage because the threshold voltage (VTH) of the pull-down units is compensated regardless of the a-IGZO TFT operation characteristics (enhancement mode: positive value of VTH, depletion mode: negative value of VTH). Many groups proposed the VTH compensation method for pull-down TFTs in the gate driver circuit using a diode connection structure. However, the diode connection structure to extract the VTH value cannot be applied in the depletion-mode oxide TFTs because VTH enters the turn-on state even when the VGS value is 0 V. To solve this problem, we adopted the VTH extraction period only once in one frame time. As a result, our circuit can compensate for VTH of the pull-down unit in the enhancement mode and can be normally operated in the depletion mode. Adjunctively, two low signals (VGL1 and VGL2) and QC node were designed to prevent the leakage current path for Q and \\four nodes. To verify the threshold voltage tolerance for various stress conditions, we demonstrated the reliability of the circuit according to the threshold voltage change of the TFTs. The simulation result shows that all the VOUT waveforms are maintained at +28 V (VGH) under the VTH shift conditions from 7 V to +11 V; further, the rising time and falling time are less than 0.62 s and 0.96 [Ls, respectively. Based on a 120 Hz ultra-high definition (UHD) graphics (3840x2160) display panel, the proposed circuit has uniform \\four characteristics compared to previous VTH compensation circuit when AVTH changes from 3 V to +11 V. When AVTH changes from 4 V to 7 V, there is also no circuit malfunction, even with slight increase in the falling time and power consumption.

High yield and precisely controlled fabrication processes for large-size and high-resolution active-matrix liquid-crystal displays (AM-LCDs) have been established. By using these processes, the authors have developed two kinds of advanced AM-LCDs addressed by a-Si thin-film transistors: a high-resolution 5-in full-color AM LCD (240(V)*320*2(H) pixels) fabricated with an optimized color pixel arrangement; and a large-area, high-resolution 10-in. color Am-LCD (450(V)*640*3(H) pixels). These devices can replace the 5-in. conventional CRT TVs and 12-in. CRT display monitors currently used. These AM LCDs will also allow such applications as hand-held and laptop personal computers in the near future.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>

Time-dependent color simulation of active-matrix liquid crystal display adopting the field sequential driving method

Active-Matrix LCD With Amorphous Thin-Film Transistors

Large-size, organic light-emitting device (OLED) panels based on highly reliable gate driver circuits integrated using InGaZnO thin-film transistors (TFTs) were fabricated to achieve ultra-high image density (UHD). These large-size OLED panels were driven by using a novel gate driver circuit not only for displaying images but also for sensing TFT characteristics for external compensation. Regardless of the negative threshold voltage of the TFTs, the proposed gate driver circuit in OLED panels functioned precisely, resulting from a decrease in the leakage current. The falling time of the circuit is approximately $1.6~{{\mu }}\text{s}$ , which is fast enough to drive UHD OLED displays at 120 Hz. 120 Hz is most commonly used as the operating voltage because images consisting of 12 frames per second can be quickly shown on the display panel without any image sticking. The reliability tests showed that the lifetime of the proposed integrated gate driver is at least $1 \times 10^{5}$ h.

This work demonstrates a novel twin poly-Si thin film transistor (TFT) EEPROM that utilizes oxide for gate dielectric and nitride for electron trapping layer (O/N twin poly-Si EEPROM). This EEPROM has superior reliability because its nitride for electron trapping layer provides a better program/erase efficiency and retention. For endurance and retention, the memory window can be maintained 2.5 V after 103 program and erase (P/E) cycles, and the memory window can be maintained 2.5 V after 104 s at 85 °C. This investigation explores its feasibility in future active matrix liquid crystal display (AMLCD) system-on-panel (SOP) and 3D stacked Flash memory applications.

Chapter 7 - Special AMLCD Configurations

We propose a novel gate driver circuit using low‐temperature polycrystalline silicon and oxide (LTPO) thin‐film transistors (TFTs). The proposed circuit consists of only six TFTs, four p‐type LTPS, and two n‐type a‐IGZO TFTs, without capacitor. The proposed circuit operates well when oxide TFTs have threshold voltage (VTH) of −7.5 V, which is very depletion mode. Without bootstrapping, low gate bias stress occurs on TFTs in the proposed circuit. With dual gate (DG) structure of oxide TFTs, the stability of the proposed circuit is improved. In addition, by utilizing extremely low off‐state current of oxide TFTs, ultra‐low power consumption can be achieved. The total power consumption of the proposed gate driver is less than 100 mW under a‐IGZO TFT's VTH of −6 V at 120 Hz 4k (3,840 × 2,160) resolution display. The fabricated circuit works perfectly at a pulse width of 1 μs equivalent to operating speed of 500 kHz. The proposed circuit can be applied to ultra‐high definition (UHD) and narrow bezel AMOLED display.

Liquid Crystal on Silicon (LCOS) microdisplay combines high birefringence and low operating voltage liquid crystalline (LC) materials with crystalline silicon VLSI technology that provides a flexible technology to control and hold the state of the LC in a high resolution, small sized display [1]. The crystalline silicon VLSI technology is well recognized as a competitive alternative for active matrix liquid crystal display (AMLCD) [2]. Due to the low cost and compact system size achievable for display systems using LCOS technology, these devices have been integrated into camera view finders, head mount displays (HMD) [3], head-up-displays [4], and projection display systems such as front projector and rear projector for high definition televisions and computer monitors. The image quality of AMLCD is however limited by the electronic data write time since data is addressed by line-at-a-time, the display should not be viewed during the data write time to maintain good image contrast ratio. The loss of brightness due to the data write time is very detrimental for a single panel light engine with Field Sequential Color technique, where new image is updated at the frame rate of 180 Hz. The time to write the data (up to 1-2 milliseconds) becomes a significant fraction of the sub-frame time (5.5 milliseconds). Hence there is a serious brightness and contrast ratio tradeoff.

When current domestic Active Matrix Liquid Crystal Display (AMLCD) sources became unavailable, prime contractors for military aircraft faced a severe problem with the sudden obsolescence of these assemblies. AMLCDs had become central to crew station design, but the only qualified North American source had failed. The problem was further complicated as several programs were beginning production, and supplies of existing, useable AMLCDs were rapidly being depleted. Solutions to the availability of AMLCDs had to be found quickly. The F/A - 18E/F program faced a unique situation in that three different displays, manufactured by two different suppliers, were affected by the loss of the AMLCD source. Both of the suppliers, for various technical and programmatic reasons, chose different approaches to the crisis. The advantages and disadvantages of each approach are examined in this paper. In addition, Boeing has formed a Displays Process Action Team (DPAT) to examine whether or not it is possible to use common displays across the Company's diverse product lines.

In this article, we described an innovative design technology of active matrix organic light emitting diode (AMOLED) display, to provide a bezel free design. We designed gate driver circuit of amorphous indium‐gallium‐zinc oxide thin‐film transistors (TFTs) not on the bezel area but within the active array. Although we applied challengeable design, no degradation of electrical/optical properties of panel was observed. Because we effectively prevented capacitive coupling and interference between the emission circuit and integrated gate driver circuit in active array, finally, we successfully demonstrated a bezel free designed AMOLED display of 18.3″ HD (1366 × 768) driven by a‐InGaZnO TFTs.