ESIGN: An Efficient Digital Signature Implementation for Smart Cards

To design an efficient post-quantum linearly homomorphic signature scheme, using the pre-image sampling function, a lattice-based linearly homomorphic signature scheme over a binary field is proposed in this paper. Linear homomorphism is achieved through the homomorphism of the lattice-based hash function used in the proposed signature scheme. It is shown that the proposed scheme satisfies the privacy property. Based on the hardness of the short integer solution problem, the proposed scheme is unforgeable against the type 1 and type 2 adversaries in the random oracle model. Moreover, compared with a presented linearly homomorphic signature scheme in 2011, the proposed scheme has some advantages with respect to the public key size, signature length and computational cost.

Smart cards are one of the efficient devices in providing security in some systems. Smart cards are secured with using encryption algorithms. Finding the best algorithm in smart cards is more of a concern these days. There are a lot of applications with different types of encryption algorithm. Although many people have worked on modifying and improving the algorithms, the needs for having all information about them in one place and detailed comparisons between them are essential. In this paper we are going to describe the most popular and efficient encryption algorithms in smart cards such as RSA, ECC, DES and ECDSA and comparisons between these algorithms to find out the differences. This result can be helpful for such new device such as multipurpose smart cards. Results are considered under different hardware settings and languages.

We consider the question of efficiently extending the key length of block ciphers. To date, the approach providing highest security is triple encryption (used e.g. in Triple-DES), which was proved to have roughly κ + min {n/2, κ/2} bits of security when instantiated with ideal block ciphers with key length κ and block length n, at the cost of three block-cipher calls per message block. This paper presents a new practical key-length extension scheme exhibiting κ + n/2 bits of security – hence improving upon the security of triple encryption – solely at the cost of two block cipher calls and a key of length κ + n. We also provide matching generic attacks showing the optimality of the security level achieved by our approach with respect to a general class of two-query constructions.

The use of data-dependent transformations has been an area of increasing interest for the designers of ciphers. In particular, data-dependent permutations (DDPs) provide a fast and simple cryptologic primitive when implemented in hardware. However, when a DDP block is naively implemented in software, it can reveal information about the Hamming weight of the control vector applied to it. Specifically, when a subkey is used as a control vector then information about the Hamming weight of the subkey can be directly obtained from timing information. This potentially leaves ciphers heavily dependent on DDPs vulnerable to timing attacks. In this paper, we examine the application of a timing attack to the CIKS-1 symmetric block cipher. The analysis is motivated by the possibility that a naive implementation of the DDPs used in CIKS-1 would result in encryption taking a time that is a function of data. Such implementations are possible in software environments, typically in embedded systems such as smart cards. The methodology of deriving the Hamming weight of the key using a known plaintext attack based on timing information is outlined and is followed by a discussion of the results. Further, a simple means of thwarting the timing attack in a software implementation is presented

Based on the discrete logarithm problem, Hwang and Li (see ibid., vol.46, no.1, p.28-30, Feb. 2000) proposed a remote user authentication scheme using smart cards. Their scheme is very novel because no password table is required to keep in a system. In this paper, we further propose an efficient and practical remote user authentication scheme using smart cards. The proposed scheme not only provides the same advantages as that of Hwang and Li's scheme, but also significantly reduces the communication and computation costs.

In order to improve the realization efficiency of AES encryption algorithm based on FPGA and reduce hardware resource utilization. We give a reconfigurable implementation of AES encryption and decryption circuit which supports three different key lengths of AES, AES-128, AES-192, AES-256. It effectively uses the public modules and greatly reduces the chip's area compared with a single implementation of these modules respectively. Based on reconfigurable ideas, this design uses a state machine to control encryption round number according to the different key lengths, while under module implementation mixed with the inverse of resource sharing, as well as three AES algorithm key expansion shared. The circuit implemented on Xilinx Virtex-V FPGA series, hardware resource consumption is for the 4308 slice. Our experiments show that the maximum operating frequency of 132.5 MHz, 128/192/256-bit AES key length encryption throughput rates of up to 1005/960/740 Mb/s. High throughput ratio/hardware resources can meet the current requirements of most of the wireless sensor network data exchange rate.

Push down lists (PUDL) or First In Last Out memories have been described for use in multiprocessors. However, in most of these applications, the system's fast access memory is divided in stacks, each program being run in a given stack on a first stack available basis. The push down list is then used to store the program instructions. Very seldom has such a system been described using more than two to six fast access lists. These applications might not justify the use of a special device for the PUDL, making use, instead, of a random access memory section addressed by a pointer address register or counter to keep track of the upper word in the PUDL. There the PUDL storage is only a small fraction of the total fast access storage, and software implementation is more economical than special hardware would be. However, in more sophisticated data processing applications such that language translation, pattern recognition, high speed data acquisition and retrieval, etc., an efficient system organization would result from the use of a central processor working on a multiplicity of programs on a fast interrupt and logic priority basis. The next active program location would depend upon the output from the presently processed instruction. Then the program storage is an important part or even the largest part of the total fast access storage of the system. In this situation, a large number of lists could be required with an access time of the order of one microsecond. If the program instruction lists are stored in a conventional random access memory one pointer register per list would be required and result in an expensive hardware. The pointer could be stored in memory, however, this would result in much increased access time and additional software. A more economical and more efficient implementation of such a multiprogram organization may result from the use a specialized hardware such as a DTPL magnetic thin film Push Down List Memory. The system described here has as an objective the development of a DDPL push down list memory consisting of a set of 128 lists. Each list is 100 words deep with 38 bits per word and thus is implemented by 38 shift registers of 100 bits each. An additional shift register of the same length stores a bottom-of-list (BOL) flag that can be sensed at both ends of the register to deliver an empty or filled list warning signal. Only one magnetic thin film of approximately one inch square area is required for the 38 shift registers constituting one list. The system makes use of a stack of 100 magnetic thin films. Every list is controlled by a conductor that can be selected in a manner similar to that of a word line of a conventional random access memory. The DTPL Push Down List Memory makes use of the controlled propagation of elongated domains of reversed magnetization contained within low coercive force channels imbedded in a magnetic thin film of higher coercive force. This technique of implementation is particularly suited to the construction of bi-directional shift registers with nonvolatile storage and are operable with shifting rates above one megacycle.

The aim of the work is to study the possibilities provided by new information technologies, object-oriented programming tools and modern operating systems for solving boundary value problems of continuum mechanics described by partial differential equations. To discretize the basic equations, we applied the method of finite differences and finite volumes, which are widely used to solve problems in the mechanics of liquids and gases. The paper considers the implementation of the finite difference methods and the finite volume method with vectorized grid structures, including access to the inner and boundary cells of the grid, as well as the features of the implementation of algorithms at singular points of the computational domain. To solve boundary value problems described by partial differential equations, we developed an approach to the construction of vectorized algorithms and considered the features of their software implementation in the MATLAB package. Vectorization in such tasks, excluding nested loops, is ensured by appropriate data organization and the use of vectorized operations. On the one hand, the developed algorithms widely use MATLAB functions designed for processing vectors and sparse matrices, and on the other hand, they are distinguished by high efficiency and computation speed, comparable to those of programs written in C/C++. The main results imply the numerical solution of a number of problems in continuum mechanics associated with the calculation of stresses in a separate body and the calculation of the field of velocity and temperature in the flow of a viscous incompressible fluid. The features of discretization of the basic equations and the implementation of the corresponding finite-difference and finite-volume algorithms are shown. The use of the MATLAB system opens up new possibilities for the formalization and implementation of finite-difference and finite-volume methods for the numerical solution of boundary value problems in continuum mechanics. Despite the fact that the capabilities of the developed algorithms are illustrated by the example of solving fairly simple problems, they admit a relatively simple generalization to more complex problems, for example, solving the Euler equations and Navier–Stokes equations. As part of the work, computational modules were prepared with user programming tools that expand the capabilities of the package and are focused on solving problems in continuum mechanics.

The rough sets theory developed by Prof. Z. Pawlak is one of the tools used in intelligent systems for data analysis and processing. In modern systems, the amount of the collected data is increasing quickly, so the computation speed becomes the critical factor. This paper shows FPGA and softcore CPU based hardware solution for big datasets core calculation focusing on rough set methods. Core represents attributes cannot be removed without affecting the classification power of all condition attributes. Presented architectures have been tested on real datasets by running presented solutions inside two different FPGA chips. Datasets had 1 000 to 1 000 000 objects. The same operations were performed in software implementation. Results show the up to 15.83 times increase factor in computation time using hardware supporting core generation in comparison to pure software implementation.

We present techniques for design and implementation of software systems with AI and concurrent S.E. techniques. The stages of conceptualization, design and implementation are defined by Al methods. Software systems are proposed to be designed through knowledge acquisition, specification, and multiagent implementations. Multi-agent implementations are proposed to facilitate a fault tolerant software design methodology, applying our recent research that has lead to fault tolerant AI systems. A particular approach to and an AI formulation of designing fault free and fault tolerant software is presented, which is based on the agent models of computation. Design with objects and a novel multi-kernel approach is presented. A system is defined by many communicating pairs of kernels, each defining a part of the system, as specified by object level knowledge acquisition. An overview to agent morphisms and algebras are presented and applied to the design.KeywordsConcurrent Software Engineering with Al AgentsMulti Agent AI TechniquesAbstract Multi Agent AI DesignAIIAgent Morphisms

Nowadays, the TLS protocol (transport layer security) is the de facto standard for securing transactions across the Internet. It provides end-to-end secure communications with one way or mutual authentication between two network nodes. However, this protocol suffers from serious vulnerabilities because classical software implementations are not trusted and allow the use of falsified credentials (e.g. revoked and false certificates) and provide an unsecured storage of credentials (private keys, passwords, etc.). In this paper, we introduce the TLS smart card to prevent those issues and we describe the TLS Tandem protocol, a TLS extension cohabiting between two TLS software installed in both a docking host and a smart card. The card of our architecture, after which the TLS authentication is successfully performed, derives secret keys from the master secret key, and transmits these values to the TLS software installed in the docking host. We discuss the performance and the efficiency of TLS Tandem. The implementation and performances analysis are performed using smart cards and Java Card libraries.

In this study, we propose a practical and secure hash function-based password authentication scheme using smart cards. Our proposed scheme offers some advantages and interesting features. Firstly, the scheme does not require a verification table and is secure against the replay attacks, an attack that most of the existing schemes suffer. Secondly, any user of the scheme be allowed to change his or her account’s password efficiently. Thirdly, the time complexity for each algorithm in the proposed scheme are relatively low and minimal compared to some existing well-known password authentication schemes.

A complete remote authentication scheme should provide the following security properties: (1) mutual authentication, (2) session key exchange, (3) protection of user anonymity, (4) support of immediate revocation capability, (5) low communication and computation cost, (6) resistance to various kinds of attacks, (7) freely choosing and securely changing passwords by users, and (8) without storing password or verification tables in servers. However, none of the existing schemes meets all the requirements. In this paper, along the line of cost effective approach using hash functions for authentication, we propose an efficient and practical remote user authentication scheme with smart cards to support the above complete security properties.

Recent advances in unsteady flow visualization

The possibilities of the optimization of histogram of oriented gradients calculations for solving image content recognition problems described based on the 48 × 48 pixels size image example. The algorithm doesn’t change in regards to the input data and suits for the histogram of the oriented gradients calculation based on any image. The algorithm idea is taken from the work of Soojin Kim and Kyeongsoon Cho [1], which is the modification of original HOG descriptor algorithm presented by Navneet Dalal and Bill Triggs [3] aimed at optimization of the calculation speed without loosing accuracy during image content recognition using HOG descriptor to generate the set of features of the image content. The algorithm is described in detail in the next sequence of actions. 1) Original HOG feature calculation. We use it as the first step since the algorithm is the optimized version of the original HOG feature calculation. 2) Solving the aliasing problem and accuracy improvement by using the interpolation technique during the HOG feature calculation process. We use one of the normalization schemes, applying interpolation as the next calculation step. 3) Solving the redundant operations and calculation speed problems by using cell-based operations and applying from one to four described types to the cells, based on which depends the detection window cell calculation. The types are applied to cell based on the blocks intersection containing the cell. The computer program has been developed according to the selected optimized algorithm of HOG feature calculation. It was used during the image content features description and learning process and in the further computer vision research. The software implementation of the algorithm takes into account the capabilities of modern computer technology, Javascript programming language and modern needs of the image content recognition calculation speed and accuracy. The implementation of computer program logic is shown in the script examples, utilizing modularity and parallel calculation as the strong sides of Javascript, further improving HOG feature calculation speed.