Exploring Deep Learning-based Branch Prediction for Computer Devices

Dynamic per-branch history length adjustment to improve branch prediction accuracy

When CPU enters the era of instruction level parallelism, the execution cycle of instructions has become shorter and shorter. Meanwhile, the processing speed of CPU has become faster and faster. However, only from the execution process of CPU instructions, there is a key factor that limits the speed of CPU processing instructions, namely, the branch instruction processing. The branch predictor is used to predict the execution result of the current branch instruction (taken/non-taken), which can make the program counter get the target instruction to continue to execute according to the prediction result before calculating the target jump address. If the prediction is correct, it will greatly improve the execution efficiency of CPU. This paper starts from the two basic categories of static branch prediction and dynamic branch prediction. Then analyse their prediction principle, prediction accuracy and component consumption used for prediction. For static branch predictor, its hardware consumption is less than that of dynamic branch predictor, and its accuracy is also lower than that of dynamic branch predictor. Moreover, their shortcomings are pointed out in this paper. At last, based on the original branch predictor, better branch predictors developed in recent years are introduced. In the future, considering the hardware consumption, I think the development of branch predictor will continue to optimize the branch predictor combining global history and local history, from the number of stored entries, the correlation between branch instructions and so on. On the premise of executing a large number of instructions, every little improvement in the efficiency of the predictor will bring huge benefits.

Image classification is a fundamental problem in the field of computer vision and involves assigning a label to an image based on its content. In this paper, we survey both traditional machine learning-based image classification methods and deep learning-based image classification methods, specifically, we review two deep learning-based image classification methods: a convolutional neural network (CNN) method and a pre-trained CNN-based transfer learning method for image classification. We first briefly review traditional machine learning-based image classification methods and then deep learning-based image classification methods, discussing both the feature extraction methods and the classification methods used in the deep learning-based methods. We discuss several deep neural network architectures for image classification, including LeNet, AlexNet, VGGNet, GoogleNet, ResNet, and DenseNet, and finally, we conclude with a discussion on the applications of image classification and compare the different methods based on various factors both qualitatively and quantitatively, and present our experimental results, while also summarizing various methods of data augmentation, batch normalization, and regularization by dropout. We introduce techniques for practical training of deep networks, and discuss fine-tuning, pruning, and model quantization for efficient inference of trained neural networks, and finally, we introduce and discuss the runtime engines for the deployment of trained neural networks for efficient inference.

Modern wide-issue superscalar processors tend to adopt deeper pipelines in order to attain high clock rates. This trend increases the number of on-the-fly instructions in processors and a mispredicted branch can result in substantial amounts of wasted work. In order to mitigate these wasted works, an accurate branch prediction is required for the high performance processors. In order to improve the prediction accuracy, we propose the bimode++ branch predictor. It is an enhanced version of the bimode branch predictor. Throughout execution from the start to the end of a program, some branch instructions have the same result at all times. These branches are defined as extremely biased branches. The bimode++ branch predictor is unique in predicting the output of an extremely biased branch with a simple hardware structure. In addition, the bimode++ branch predictor improves the accuracy using the refined indexing and a fusion function. Our experimental results with benchmarks from SpecFP, SpecINT, multi-media and server area show that the bimode++ branch predictor can reduce the misprediction rate by 13.2% to the bimode and by 32.5% to the gshare.

Designers have invested much effort in developing accurate branch predictors. To maintain accuracy, current processors update the predictor regularly and frequently. Although this aggressive approach helps to achieve high accuracy, for a large number of branches, quite often, updating the branch predictor unit is unnecessary as there is already enough information available to the predictor to predict the branch outcome accurately. Therefore, the current approach appears to be inefficient since it results in unnecessary energy consumption. The author introduces the power-aware branch predictor update (PABU). PABU uses a simple power efficient structure to identify well behaved accurately predicted branch instructions. Once such branches are identified, the predictor is no longer accessed to update the associated data. The key to the success of the proposed technique is a power efficient method that can effectively identify such branches. The author exploits branch instruction behaviour to identify such branch instructions. He shows that it is possible to reduce the number of predictor updates considerably without losing performance. The technique is evaluated by studying energy and performance tradeoffs for SPEC2000 benchmarks. It is shown that the technique can reduce branch prediction energy consumption considerably for both floating point and integer benchmarks. This comes with a negligible impact on performance.

조건부 분기 명령어는 분기 벌칙을 야기함으로써 명령어 수준의 병렬도 향상에 제약을 가한다. 고성능 슈퍼스칼라 프로세서의 등장으로 인해, 정확한 분기 예측의 중요성은 더욱 높아지고, 이를 위해 동적 분기 예측의 일종인 2단계 적응적 분기 예측(2-level adaptive branch prediction) 방식이 개발되었다. 그러나 2단계 적응적 분기 예측이 상당히 높은 예측 정확도를 보여주고 있음에도 불구하고, 정확도에 따른 비용이 기하급수적으로 증가하는 등의 문제점을 가지고 있다. 본 논문에서는 2단계 적응적 분기 예측의 이러한 문제점을 개선하기 위하여 세트 연관 캐쉬를 이용한 캐쉬 상관 분기 예측기(cached correlated branch predictor)를 제안하고, 기존의 방식에 비해 예측의 정확도는 증가하고, 비용은 줄어든 것을 시뮬레이션을 통하여 확인한다. 세트 연관 예측기의 경우 전역과 지역 방식의 가장 좋은 예측 실패율은 각각 5.99%, 6.28%이며, 이는 종래의 2단계 적응적 분기 예측 방식에서의 가장 좋은 결과인 9.23%, 7.35%에 비해 각각 54%, 17% 향상된 결과이다. Conditional branches can severely limit the performance of instruction level parallelism by causing branch penalties. 2-level adaptive branch predictors were developed to get accurate branch prediction in high performance superscalar processors. Although 2 level adaptive branch predictors achieve very high prediction accuracy, they tend to be very costly. In this paper, set-associative cached correlated 2-level branch predictors are proposed to overcome the cost problem in conventional 2-level adaptive branch predictors. According to simulation results, cached correlated predictors deliver higher prediction accuracy than conventional predictors at a significantly lower cost. The best misprediction rates of global and local cached correlated predictors using set-associative caches are 5.99% and 6.28% respectively. They achieve 54% and 17% improvements over those of the conventional 2-level adaptive branch predictors.

Illumination estimation is a fundamental prerequisite for many computer vision applications. Various statistics and deep learning-based estimation methods have been proposed, and further studies are ongoing. In this study, we first perform a comparative analysis of representative statistics and deep learning-based methods and subsequently investigate combining them to improve the illumination estimation accuracy. We use hyperspectral images as the training data and support vector regression to combine the methods. Based on the results, we confirm that their combination enhances their accuracy.

A branch predictor is the part of the processor that determines whether a conditional branch in the instruction flow of a program is likely to be taken or not. Almost all pipelined processors have branch predictors, because they must guess the address of the next instruction to fetch before the current conditional instruction has been executed [1]. Hence, attempts have been made to design accurate branch predictors. This project attempts at modeling different branch predictors and comparing their performances for a set of benchmarks.

The Precomputed-Branch architecture: Efficient branches with compiler support

Modern processors usually have a deep pipeline, superscalar architecture to obtain higher performance. As pipelines are getting deeper, accurate branch prediction is critical to achieve high performance, since fetched instructions after a branch have to be flushed from inside the pipeline when the prediction is wrong. This paper studies the performance of several types of branch predictors, starting from local branch predictor and global branch predictor. Simulation results show that the global history predictor outperforms the local history predictor due to the characteristic that branches tend to be correlated. However, the global history predictor still suffers an aliasing problem that degrades performance. Four techniques are proposed to alleviate the aliasing problem. The performance is evaluated by using Simplescalar with SPEC CINT95 benchmark programs. The proposed predictors display better performance over the conventional predictors after careful configuration of each.

During the 1990s Two-level Adaptive Branch Predictors were developed to meet the requirement for accurate branch prediction in high-performance superscale processors. However, while two-level adaptive predictors achieve very high prediction rates, they tend to be very costly. In particular, the size of the second level Pattern History Table (PHT) increases exponentially as a function of history register length. Furthermore, many of the prediction counters in a PHT are never used; predictions are frequently generated from non-initialised counters and several branches may update the same counter, resulting in interference between branch predictions. In this paper, we propose a Cached Correlated Two-Level Branch Predictor in which the PHT is replaced by a Prediction Cache. Unlike a PHT, the Prediction Cache saves only relevant branch prediction information. Furthermore, predictions are never based on uninitialised entries and interference between branches is eliminated. We simulate three versions of our Cached Correlated Branch Predictors. The first predictor is based on global branch history information while the second is based on local branch history information. The third predictor exploits the ability of cached predictors to combine both global and local history information in a single predictor. We demonstrate that our predictors deliver higher accuracy than conventional predictors at a significantly lower cost.

There is wide agreement that one of the most important impediments to the performance of current and future pipelined superscalar processors is the presence of conditional branches in the instruction stream. Speculative execution seems to be one solution of choice to the branch problem, but speculative work is discarded if a branch is mispredicted. Therefore, we need a very accurate branch predictor; 95% accuracy is not good enough. This paper proposes branch classification to help improve the accuracy of branch predictors. Branch classification allows an individual branch instruction to be associated with the branch predictor best suited to predict its direction. Using this approach, a hybrid branch predictor can be constructed such that each component branch predictor predicts those branches for which it is best suited. This paper suggests one classification scheme, analyzes several branch predictors, and proposes a hybrid branch predictor that achieves higher prediction accuracy than any branch predictor previously reported in the literature.

SA-MVSNet: Self-attention-based multi-view stereo network for 3D reconstruction of images with weak texture

Purpose: Benign breast disease (BBD) is viewed as a non-obligate precursor stage in the development of breast cancer (BC). Transcriptome profiling using RNA sequencing (RNA-seq) of bulk formalin-fixed paraffin-embedded (FFPE) tissue blocks has been routinely used in BC research. However, RNA-seq of heterogeneous bulk samples represents an averaged expression profile across all cell mixtures. Downstream analyses, such as biomarker discovery, are likely confounded by differences in cell proportions. There is a lack of research in optimizing strategies for cell type deconvolution especially for FFPE samples. We evaluated and optimized strategies for cell type deconvolution using existing single cell RNA-seq (scRNA-seq) and single nucleus RNA-seq (snRNA-seq) breast tissue references, and applied these to a cohort of BBD FFPE samples to assess risk of subsequent BC. Methods: 7 scRNA-seq and 3 snRNA-seq public samples from women’s breast tissue were normalized using SCTransform, then integrated using Harmony to form a complete reference set. Bioinformatics evaluations examined the performance of existing statistical and deep learning-based deconvolution methods. Computational simulations were conducted to evaluate those methods on three scenarios: 1) baseline; 2) incomplete reference set; 3) FFPE artifacts. FFPE artifacts were simulated based on a generalized additive model using 7 in-house paired FFPE-fresh frozen samples. Finally, we applied the best performing method to our BBD cohort of 62 samples. Differential expression analysis adjusting for cell proportions was performed to identify transcriptomic aberrations in BBD cases. Results: snRNA-seq was more sensitive in capturing adipocytes, while scRNA-seq was more sensitive in detecting lymphocytes in breast tissue. The median number of detectable genes per cell was higher for scRNA-seq than snRNA-seq before integration (1264 vs 558). Marker gene-based regression methods (e.g. CIBERSORT) displayed higher variance and lower bias compared to methods directly using scRNA-seq data (e.g. SCDC). Incomplete reference data led to increased bias and little effect on variance. FFPE artifacts had a higher impact on performance compared to incomplete reference data. Overall, Scaden, a deep learning-based method, was the top performing method across all simulation scenarios and was especially robust to FFPE artifacts. 59 differential expressed genes (DEGs) were identified with fold change > 1.5 and p value < 0.01. DEGs involved in BC, e.g. S100A8, WNT4 and HIST1H3H, would be left out if cell proportions were not properly adjusted. Conclusions: We constructed the first complete single cell reference data for women’s breast tissue and benchmarked existing cell type deconvolution methods. Compared to analyses not adjusting for cell proportions, we observed substantial differences in perturbed genes and pathways associated with BC risk for BBD patients. Citation Format: Yuanhang Liu, Chen Wang, Stacey J. Winham, Aditya Bhagwate, Robert A. Vierkant, Julie M. Cunningham, Bryan M. McCauley, William A. Jons, Derek C. Radisky, Amy C. Degnim. Deconvolution of cell type composition in FFPE tissue: Application to benign breast disease. [abstract]. In: Proceedings of the American Association for Cancer Research Annual Meeting 2023; Part 1 (Regular and Invited Abstracts); 2023 Apr 14-19; Orlando, FL. Philadelphia (PA): AACR; Cancer Res 2023;83(7_Suppl):Abstract nr 4291.

Vehicle positioning technology is essential for intelligent vehicles, supporting applications such as path planning, route guidance and autonomous parking. High-precision road topology network information is also crucial for vehicle positioning and navigation. However, approaches that generate road topology from remote sensing images are limited by viewing angle and resolution, often missing road segments and generating only road-level topology. Ground mapping vehicle systems such as simultaneous localization and mapping (SLAM) based methods struggle to directly obtain road centerlines and are rarely used directly for topology generation, while deep learning-based methods can dynamically produce lane-level topology but often lack global consistency and interpretability, suffering from redundant misconnections and high perception cost. In this paper, we present a geometry-driven framework for automatic lane-level topology generation from a monocular front-view camera, with global map alignment supported by external localization. Unlike purely deep learning-based approaches, our approach leverages existing high-precision ground vehicle mapping algorithms to extract road geometry constraints and incorporates semantic cues to ensure interpretable and globally connected topology generation, combining interpretability with strong geometric supervision. Specifically, we introduce a lane semantic information based lane enhancement strategy to fill topological gaps, a DBSCAN based three-stage pipeline to denoise and regularize lane center nodes, and a virtual-node representation to simplify complex intersections. Our approach has been experimentally validated in real-world urban areas and compared to existing mainstream deep learning-based topology generation methods. The results indicate that our method achieves higher topological accuracy and completeness within the same front-view camera field of view, demonstrating its effectiveness for lane-level topology construction.