Fast algorithms for signal processing using finite field operations

The relation between homotopic types of compact linearly connected semigroups and their minimal ideals is investigated. In Theorem 1 we prove that, if a semigroup has a homotopic unit, even if it is only one-sided, then the minimal ideal is a deformation retract of the semigroup and so is homotopically equivalent to the semigroup. In Theorem 2 it is proved that a Q-semigroup is weakly homotopically equivalent to its minimal ideal.

A method for polynomial multiplication over finite fields using field extensions and polynomial interpolation is introduced. The proposed method uses polynomial interpolation as Toom-Cook method together with field extensions. Furthermore, the proposed method can be used when Toom-Cook method cannot be applied directly. Explicit formulae improving the previous results in many cases are obtained.

Conditions for the existence and conjugacy of complements of certain minimal ideals of solvable Lie algebras over a Noetherian ring R are considered. Let L be a solvable Lie algebra and A be a minimal ideal of L. If L/A is nilpotent and L is not nilpotent then A has a complement in L, all such complements are conjugate and self-normalizing and if C is a complement then there exists an x∈L such that C = {y∈L; yadnx = 0 for some n = 1, 2,…}. A similar result holds if A is self-centralizing and a finitely generated R-module.

Given a homogeneous polynomial on a Banach space E belonging to some maximal or minimal polynomial ideal, we consider its iterated extension to an ultrapower of E and prove that this extension remains in the ideal and has the same ideal norm. As a consequence, we show that the Aron–Berner extension is a well defined isometry for any maximal or minimal ideal of homogeneous polynomials. This allows us to obtain symmetric versions of some basic results of the metric theory of tensor products.

We introduce an efficient way of performing polynomial multiplication in a class of finite fields GF(pm) in the frequency domain. The Fast Fourier Transform (FFT) based frequency domain multiplication technique, originally proposed for integer multiplication, provides an extremely efficient method for multiplication with the best known asymptotic complexity, i.e. O(n log n log log n). Unfortunately, the original FFT method bears significant overhead due to the conversions between the time and the frequency domains, which makes it impractical to perform multiplication of relatively short (160 - 1024 bits) integer operands as used in many applications. In this work, we introduce an efficient way of performing polynomial multiplication in finite fields using the FFT. We show that, with careful selection of parameters, all the multiplications required for the FFT computations can be avoided and polynomial multiplication in finite fields can be achieved with only O(m) multiplications in addition to O(m log m) simple shift, addition and subtraction operations. We show that, especially in constrained devices where multiplication is expensive, polynomial multiplication in the suggested finite fields using the FFT outperforms both the schoolbook and Karatsuba methods for practically small finite fields, e.g., relevant to elliptic curve cryptography.

We derive a layer‐recursive algorithm for reconstructing an equal‐travel‐time layered acoustic medium from its transmission response to an impulsive plane wave incident from below. The medium is bounded below by an infinite half‐space from which it is probed, and it is bounded above by a free surface at which its transmission response is measured. This problem arises in the nondestructive evaluation of layered composite materials, in which the transmission response is measured. The algorithm is similar in form to the Levinson algorithm, which reconstructs a layered medium from its reflection response; it is closely related to the lattice algorithm for computing the QR factorization of a matrix. We relate the new algorithm to the Levinson, fast Cholesky, and lattice algorithms, all of which are well‐known fast algorithms for signal processing.

Recent research presents a technique to enumerate all valid assignments of “twiddle factors” for power-of-two fast Fourier transform (FFT) flow graphs. Brute-force search employing state-of-the-art Boolean satisfiability (SAT) solvers can then be used to find FFT algorithms within this large solution space which have desirable characteristics. Surprisingly, this approach has discovered FFT algorithms requiring fewer operations than the split-radix algorithm even when all twiddle factors are nth roots of unity. This paper reviews and then extends this prior research to examine fast discrete convolution algorithms when implemented via FFT and inverse FFT (IFFT) algorithms. In particular, we find that the combination of FFT and IFFT algorithms in fast convolution permits greater freedom when selecting valid twiddle factor assignments. We exploit this freedom and use SAT solvers to find new fast convolution algorithms with the lowest operation counts known.

A new fast algorithm for computing prime-Length DCT through cyclic convolutions

Binary extension (or Galois) fields GF(2^m) have been widely studied due to their use in several important applications, such as cryptography, error control codes and digital signal processing. These applications require efficient hardware implementations of GF(2^m) arithmetic operations, particularly multiplication, which is considered the most important and complex one. The complexity of GF(2^m) multiplication depends on the representation basis and on the defining irreducible polynomial f(y) selected for the finite field. For efficient hardware implementations, polynomial basis and irreducible trinomials or pentanomials are normally used. Any element A ∊ GF(2^m) can be represented in the polynomial basis {1,x,...,x^m-1} as A = Σm-1/i-0, a_i x^i with a_i Σ GF(2), where x is a root of the irreducible polynomial f(y) = Σ^m/_i=0^f_i y^i. Polynomial basis multiplication C = A ⋅ B requires a polynomial multiplication followed by a reduction modulo an irreducible polynomial. Mastrovito [1] proposed an efficient bit-parallel polynomial basis multiplier in which a product matrix was introduced to combine the above two steps together. A new polynomial basis multiplication method applied to irreducible trinomials was proposed in [2], where the functions S_i and T_i given by the addition of terms x_k = (a_k b_k) and z_i^j = (a_i b_j + a_j b_i), with a_i, b_i ∊ GF(2), were obtained from the decomposition of a product matrix. The addition of these functions is used for the computation of the product of two GF(2^m) elements. In [3], the above method was applied to type II irreducible pentanomials and the functions S_i and T_i were split in the form S_i = s^i_k S_i^k + ... + s^i_0 S_i^0 and T_i = t^i_k T_i^k + ... + t^i_0 T_i^0, with s^i_j, t^i_j ∊ GF(2) and k = log_2m. The terms S_i^j and T_i^j represent the sum of 2^j products a_kb_l and therefore can be implemented as a j-level complete binary tree of XOR gates. The addition in pairs of binary trees with the same depth leads to a reduction of the multiplication delay. However, splitting method imposes hard restrictions (given by the use of parenthesis in the expressions of the coordinates) for the addition of S_i^j and T_i^j terms in order to reduce the number of XOR levels. These restrictions could not be efficient for a synthesis tool in order to map that expressions into FPGA's logic blocks. If parenthesized restrictions are removed, more freedom could be given for the synthesizer to find an optimized implementation of the multiplier. In this work, efficient Xilinx FPGA implementations of GF(2^m) bit-parallel polynomial basis multipliers for irreducible trinomials are presented. Based on [2], a new general algorithm for multiplication over irreducible trinomials f(y) = y^m + y^n +1, with 1 ≤ n ≤ (m+1)/2, is proposed and the splitting method given in [3] is applied to these irreducible polynomials. Furthermore, in order to optimize the synthesis of the multipliers, a new approach for the computation of the product is used where the splitting of S_i and T_i terms is performed, but the restriction given by the addition in pairs of binary trees with the same depth has been removed. In this way, Xilinx tools are free to optimize the synthesis of the multiplier. Several GF(2^m) multipliers for different binary fields have been described in VHDL and their post-place and route implementation results in Xilinx Artix-7 have been reported. Experimental results show that the multiplier here proposed exhibits the best delay and Area×Time complexities when it is compared with similar multipliers found in the literature. Moreover, the new approach also achieves the lowest number of slices in most of the implemented multipliers.

The cyclic convolution algorithms of chapter 6 are efficient for special small block lengths, but as the size of the block length increases, other methods are required. First as discussed in chapter 6, these algorithms keep the number of required multiplications small, but can require many additions. Also, each size requires a different algorithm. There is no uniform structure that can be repeatedly called upon. In this chapter, a technique similar to the Good-Thomas PFA will be developed to decompose a large size cyclic convolution into several small size cyclic convolutions which in turn can be evaluated using the Winograd cyclic convolution algorithm. These ideas were introduced by Agarwal and Cooley [1] in 1977. As in the Good-Thomas PFA, the CRT is used to define an indexing of data. This indexing changes a one-dimensional cyclic convolution into a two-dimensional cyclic convolution. We will see how to compute a two-dimensional cyclic convolution by ‘nesting’ a fast algorithm for one-dimensional cyclic convolution inside another fast algorithm for one-dimensional cyclic convolution. There are several two-dimensional cyclic convolution algorithms which although important will not be discussed. These can be found in [2].KeywordsDiscrete Fourier TransformFast AlgorithmPermutation MatrixCirculant MatrixConvolution TheoremThese keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Elliptic curve cryptography is a rather new, efficient technology for security. However, its implementation is complex and software versions can be prohibitively slow. The main original contribution of this paper is the proposition of a highly parameterizable soft intellectual property core that implements all the operations needed to perform elliptic curve cryptography in hardware. This core supports several standardized elliptic curves. Here, finite field operations use only affine coordinates, which keeps interoperability with software implementations. Also, core operators such as the finite field multiplier and inversion are highly configurable, to enable fulfilling constraints of area or performance, according to what is relevant to each application. The core can thus serve several different purposes, through the setting of parameters that pick the adequate elliptic curve and others that control the finite field multiplier and inversion operator characteristics. Results obtained by synthesizing the core with different parameters for Xilinx FPGAs and 65nm CMOS ASICs show that the exploitable design space is ample: implementations can take from 17 to 5,800μs to execute a point multiplication, taking from 5.7 to 162.2 thousand LUTs in FPGAs or from 16,6 to 360,7 thousand gates in ASICs.

A novel method for blind reconstruction of binary Bose–Chaudhuri–Hocquenghem codes is proposed. Compared to previously reported works, a new approach to find the goal generator polynomial is employed. First, using the feature that each codeword polynomial of a t‐error‐correcting Bose–Chaudhuri–Hocquenghem code has the same 2t consecutive roots over Galois field, a new set of candidate generator polynomials is introduced. Then, this set in a random situation to find the correct generator polynomial is investigated. Monte Carlo simulations demonstrate the superiority of the proposed reconstruction algorithm compared to the previous methods.

The finite field $\mathbb {F}_{q^\ell }$ of $q^\ell $ elements contains $\mathbb {F}_{q}$ as a subfield. If $\theta \in \mathbb {F}_{q^\ell }$ is of degree $\ell $ over $\mathbb {F}_{q}$ , it can be used to unfold elements of $\mathbb {F}_{q^\ell }$ to vectors in $\mathbb {F}_{q}^\ell $ . We apply the unfolding to the coordinates of all codewords of a cyclic code $\mathcal {C}$ over $\mathbb {F}_{q^\ell }$ of length $n$ . This generates a quasi-cyclic code $\mathcal {Q}$ over $\mathbb {F}_{q}$ of length $n\ell $ and index $\ell $ . We focus on the class of quasi-cyclic codes resulting from the unfolding of cyclic codes. Given a generator polynomial $g(x)$ of a cyclic code $\mathcal {C}$ , we present a formula for a generator polynomial matrix for the unfolded code $\mathcal {Q}$ . On the other hand, for any quasi-cyclic code $\mathcal {Q}$ with a reduced generator polynomial matrix $G$ , we provide a necessary and sufficient condition on $G$ that determines whether or not the code $\mathcal {Q}$ can be represented as the unfolding of a cyclic code. Furthermore, as an application, we discuss the reversibility of the class of quasi-cyclic codes resulting from unfolding of cyclic codes. Specifically, we provide a necessary and sufficient condition on the defining set $\mathcal {T}$ of the cyclic code $\mathcal {C}$ that ensures the reversibility of the unfolded code. Numerical examples are used to illustrate theoretical results. Some of these examples show that quasi-cyclic codes reversibility does not necessarily require a self-reciprocal generator polynomial for the cyclic code. Since reversibility is essential in constructing DNA codes, some DNA codes are designed as examples.

Multiplication and squaring are main finite field operations in cryptographic computations and designing efficient multipliers and squarers affect the performance of cryptosystems. In this paper, we consider the Montgomery multiplication in the binary extension fields and study different structures of bit-serial and bit-parallel multipliers. For each of these structures, we study the role of the Montgomery factor, and then by using appropriate factors, propose new architectures. Specifically, we propose two bit-serial multipliers for general irreducible polynomials, and then derive bit-parallel Montgomery multipliers for two important classes of irreducible polynomials. In this regard, first we consider trinomials and provide a way for finding efficient Montgomery factors which results in a low time complexity. Then, we consider type-II irreducible pentanomials and design two bit-parallel multipliers which are comparable to the best finite field multipliers reported in the literature. Moreover, we consider squaring using this family of irreducible polynomials and show that this operation can be performed very fast with the time complexity of two XOR gates.

Bose–Chaudhuri–Hocquenghem (BCH) codes are broadly used to correct errors in flash memory systems and digital communications. These codes are cyclic block codes and have their arithmetic fixed over the splitting field of their generator polynomial. There are many solutions proposed using CPUs, hardware, and Graphical Processing Units (GPUs) for the BCH decoders. The performance of these BCH decoders is of ultimate importance for systems involving flash memory. However, it is essential to have a flexible solution to correct multiple bit errors over the different finite fields (GF(2)). In this paper, we propose a pragmatic approach to decode BCH codes over the different finite fields using hardware circuits and GPUs in tandem. We propose to employ hardware design for a modified syndrome generator and GPUs for a key-equation solver and an error corrector. Using the above partition, we have shown the ability to support multiple bit errors across different BCH block codes without compromising on the performance. Furthermore, the proposed method to generate modified syndrome has zero latency for scenarios where there are no errors. When there is an error detected, the GPUs are deployed to correct the errors using the iBM and Chien search algorithm. The results have shown that using the modified syndrome approach, we can support different multiple finite fields with high throughput.