Fault-Tolerance in Universal Middleware Bridge

When ASICs are dedicated to highly dependable applications, concurrent checking and/or fault-tolerance capabilities are necessary on chip. In particular, FSMs must be protected against permanent and transient faults. The authors review the main proposals one can fine on this subject in the literature. Then, an approach is proposed to achieve intrinsic fault tolerance. This approach is based on a specific logic synthesis for FSMs described by their state transition graph. >

Programming distributed applications in the IoT-edge environment is a cumbersome challenge. Developers are expected to seamlessly handle issues in dynamic reconfiguration, routing, state management, fault tolerance, and heterogeneous device capabilities. This demo presents DDFLOW, a macroprogramming abstraction and accompanying runtime that offers appropriate distributed system tooling to properly isolate application semantics from arbitrary deployment environments. Using DDFLOW leads to portable, visualizable, and intuitive applications. The accompanying runtime enables dynamic adaptation to improve end-to-end latency while preserving application behavior despite device failures. We evaluate DDFLOW on the Heliot platform, a hybrid emulation testbed for learning-enabled IoT systems. This demo complements the paper DDFLOW: Visualized Declarative Programming for Heterogeneous IoT Networks that is to be presented at IoTDI 2019 [6].

Most of the widely used renewable energy sources like PV systems produce DC output and in order to integrate this output with AC grid, an efficient inverter system with fault tolerance is essential. Even for a little period of time, a switch defect in an inverter might have a negative impact on the related essential loads. While considering the several advantages and applications, cascaded multilevel inverter(CHB MLI) can significantly improve system reliability through its fault-tolerant operation due to its switching redundancy. Many multilevel inverters with several control strategies are proposed in literature, but only fewer inverters are with fault tolerant capability. This research suggests a hybrid H-bridge-based CHB MLI architecture that is fault-tolerant. The inverter is capable of operating with rated power under multiple switch open fault conditions. A five-level fault tolerant CHB MLI is simulated and analysed under various fault conditions. Reconfiguration of inverter is possible under input source variations is also possible in this system. The operation of inverter is validated with experimental results. This inverter is suitable for industrial drives, battery energy storage systems and uninterrupted power systems where reliable operation is needed.

Numerous researchers have suggested numerous solutions based on routing and energy to overcome the prevalence of WSN faults in the current literature. Clustering is the most commonly used energy-efficient and fault-tolerant management technique in WSNs, grouping sensors to manage them and perform distributed activities such as resource management. Although clustering methods are most commonly used to reduce energy consumption, they can also achieve various quality-driven goals, such as network fault tolerance capability. As a result of WSN's unpredictable nature, developing fault tolerance mechanisms is essential. Redundancy and diversity methods are commonly used in networks to increase fault tolerance. As a network management challenge, clustering methods should tolerate malfunctioning sensors while maintaining the network's coverage and stability. Sensors are prone to failure due to their operation in hostile environments with limited battery power. The state of the deployed sensor or cluster head (CH) can be active, redundant, or dead/faulty for the same target region of interest (R). The network's overall lifetime and fault tolerance capability can also be extended by using these backup sensors. By putting redundant sensors into sleep mode, can extend the network lifetime without compromising the quality of service. Sensor networks are generally designed to endure far longer than individual sensors. It is commonly performed by putting sensors to sleep. We propose a robust distributed clustered fault tolerance scheduling (RDCFT) approach that efficiently checks the status of the deployed sensor periodically (based on a sweep-line redundancy check algorithm) in WSNs. Simulation results are based on analytical and experimental studies to validate the effectiveness and usefulness of the proposed work.

Fault tolerance and adaptive capabilities are challenges for modern networks-on-chip (NoC) due to the increase in physical defects in advanced manufacturing processes. Two novel adaptive routing algorithms, namely coarse and fine-grained (FG) look-ahead algorithms, are proposed in this paper to enhance 2-D mesh/torus NoC system fault-tolerant capabilities. These strategies use fault flag codes from neighboring nodes to obtain the status or conditions of real-time traffic in an NoC region, then calculate the path weights and choose the route to forward packets. This approach enables the router to minimize congestion for the adjacent connected channels and also to bypass a path with faulty channels by looking ahead at distant neighboring router paths. The novelty of the proposed routing algorithms is the weighted path selection strategies, which make near-optimal routing decisions to maintain the NoC system performance under high fault rates. Results show that the proposed routing algorithms can achieve performance improvement compared to other state of the art works under various traffic loads and high fault rates. The routing algorithm with FG look-ahead capability achieves a higher throughput compared with the coarse-grained approach under complex fault patterns. The hardware area/power overheads of both routing approaches are relatively low which does not prohibit scalability for large-scale NoC implementations.

This paper demonstrates that an adaptive computing system (ACS) is good platform for implementing robotic control algorithms. We show that an ACS can be used to provide both good performance and high dependability. An example of an FPGA-implemented dependable control algorithm is presented. The flexibility of ACS is exploited by choosing the best precision for our application. This reduces the amount of required hardware and improves performance. Results obtained from a WILDFORCE emulation platform showed that even using 0.35 /spl mu/m technology, an FPGA-implemented control algorithm has comparable performance with the software-implemented control algorithm in a 0.25 /spl mu/m microprocessor. Different voting schemes are used in conjunction with multi-threading and combinational redundancy to add fault tolerance to the robotic controller. Error-injection experiments demonstrate that robotic control algorithms with fault tolerance techniques are orders of magnitude less vulnerable to faults compared to algorithms without any fault tolerant features.

Multiphase generators in multi-MW wind energy applications can be realized with a variety of possible topologies. Series connection of machine-side converters elevates the dc-link voltage for the same voltage rating of IGBTs, allowing medium voltage generation on the grid-side. On the other hand, parallel connection of machine-side converters provides fault-tolerant capability, enhancing the system reliability. The combination of series and parallel connection of machine-side converters simultaneously elevates the dc-link voltage and provides some fault tolerance to the system. This work discusses the series-parallel topology for six-phase induction generators and analyzes the fault tolerance capability of the topology. Theoretical analysis and simulations confirm that it is possible to obtain additional fault tolerance at the expense of some unbalance on the individual dc-link voltages.

The increasing complexity and volume of digital payment transactions demand architectural solutions that ensure continuous service availability while maintaining strict security and compliance standards. This article presents a comprehensive framework for implementing event-driven architecture in payment systems, focusing specifically on failover mechanisms and redundancy patterns that enable seamless operation during service disruptions. The article examines how asynchronous event processing and message-driven communication patterns can decouple payment services, creating natural resilience boundaries that prevent cascading failures common in traditional synchronous architectures. Through detailed analysis of retry mechanisms, circuit breaker implementations, and dynamic gateway routing strategies, the article demonstrates how event-driven systems can automatically recover from transient failures while maintaining transaction integrity and audit compliance. The article explores critical implementation considerations, including idempotency handling, eventual consistency management, and distributed transaction coordination through saga patterns, providing practical guidance for organizations transitioning from legacy payment infrastructures. Case studies illustrate real-world applications of the proposed architecture in scenarios ranging from payment authorization retries to multi-region disaster recovery, highlighting both the technical benefits and operational challenges associated with event-driven payment processing. The article addresses essential security and compliance requirements through tokenization strategies, comprehensive audit logging, and real-time fraud detection integration that leverages event streams for immediate risk assessment. Performance evaluation reveals significant improvements in system throughput, fault tolerance, and recovery capabilities compared to traditional architectures, though implementation requires substantial investment in team expertise and monitoring infrastructure. This article contributes to the growing body of knowledge on distributed payment system design by providing a practical blueprint for achieving high availability and fault tolerance through event-driven architectural principles.

The demand for highly flexible manipulation of plant growth generations and modification of specific plant processes in a controlled environment has led to the development of a Commercial Plant Biotechnology Facility (CPBF) for the International Space Station. The CPBF integrates proven ASTROCULTURE™ technologies, state-of-the-art control software, and fault tolerance and recovery technologies together to increase overall system efficiency, reliability, robustness, and flexibility. An open and modular design architecture minimizes the design effort of reconfiguration/reconstruction of the facility with different dimensions and capacities. An autonomous control system with fault tolerance and recovery capability minimizes the on-orbit crew intervention which is particularly valuable for Space Shuttle and International Space Station missions. A flexible user interface is provided for operators to select, define, and modify the tasks to be conducted. The CPBF consists of five major subsystems: the lighting c...

One of the advantages of multiphase machine is the capability of fault tolerance. Variety of post-fault control methods based on hysteresis, proportional-integral (PI), proportional resonant (PR) and model predictive controller (MPC) have gradually been developed. Due to simple structure and decoupling of reduced-order matrix, it is used as an alternative to the Clarke matrix in the healthy mode when the fault happens. Although a lot of control methods adopted a reduced-order matrix as the basic derived technology, the performance of controllers is different, and they need to be compared in term of specific applications in fault tolerance. For this propose, the paper deals with the steady-state and dynamic performance of four current control methods, hysteresis control, PI control, PR control and model predictive control in open-circuit fault. The results shows that the PR control method has low torque ripple, copper loss and derating in healthy and post-fault stage, and the MPC control method has low torque ripple in fault stage and fast response capability after applying fault-tolerant methods.

The purpose of adaptive fault-tolerance (AFT) is to meet the dynamically and widely changing fault-tolerance requirement by efficiently and adaptively utilizing a limited and dynamically changing amount of available redundant processing resources. In this paper we present one concrete AFT scheme, named the adaptable distributed recovery block (ADRB) scheme, which is an extension of the Distributed Recovery Block (DRB) scheme for reliable execution of real-time applications with the tolerance of both hardware and software faults in distributed/parallel computer systems. An ADRB station dynamically switches its operating mode in response to significant changes in the resource and application modes. Different operating modes have different resource requirements and yield different fault tolerance capabilities. A modular implementation model for the ADRB scheme is also presented. An efficient execution support mechanism for the ADRB scheme has been implemented as a part of a timeliness-guaranteed kernel developed at the University of California, Irvine.

In Multistage interconnection networks (MINs); fault tolerance is a critical issue. In this paper, we proposed a new fault tolerant irregular MIN named as Advanced Irregular Shuffle Exchange Networks (AISEN). The proposed AISEN is compared with existing Irregular Augmented Shuffle Exchange Network-2 (IASEN-2) which shows that Proposed MINs have better fault tolerance capability as compared to existing IASEN-2 in terms of non-faulty and faulty conditions.

In this chapter sequential faults occurring in a distributed system are mainly considered. A TMR system dynamically composed in the distributed system which can tolerant the largest number of sequential faults is focused on. The fault tolerance degree and fault tolerance center are defined and the optimal designs considering the cost and the fault tolerant capability are proposed.

At the present time an important tendency in industrial automated systems is to apply equipments that can assure uninterrupted operation even if a fault occurs. Advanced electrical drives are complex systems containing both hardware and software. In order to obtain a reliable electrical drive system all its major components have to be fault tolerant. In this paper two switched reluctance machines are studied in order to compare their fault tolerance capability at different stator winding faults.

Describes an approach for enabling the synergistic coordination between two fault-tolerance protocols to simultaneously tolerate software and hardware faults in a distributed computing environment. Specifically, our approach is based on a message-driven confidence-driven (MDCD) protocol that we have devised for tolerating software design faults, and a time-based (TB) checkpointing protocol that was developed by N. Neves and W.K. Fuchs (1996) for tolerating hardware faults. By carrying out algorithm modifications that are conducive to synergistic coordination between volatile-storage and stable-storage checkpoint establishments, we are able to circumvent the potential interference between the MDCD and TB protocols, and to allow them to effectively complement each other to extend a system's fault tolerance capability. Moreover, the protocol coordination approach preserves and enhances the features and advantages of the individual protocols that participate in the coordination, keeping the performance cost low.