Fault-tolerant LPT task scheduling in multiprocessor systems

Static task scheduling in multiprocessor frameworks is one of the well-defined NP hard problem. Due to optimal utilization of processors and in addition investing less time, the scheduling of tasks in multiprocessor frameworks is of extraordinary significance. To solve NP hard problem using traditional strategies takes reasonable measures of time. Over the time, various heuristic procedures were presented for comprehending it. Therefore, heuristic methods such as genetic algorithms are appropriate methods for task scheduling in multiprocessor system. In this paper, a new GA for static task scheduling in multiprocessor systems has been presented whose priority of tasks’ execution is based on the height of task in graph and other mentioned parameters and then scheduling is performed. This proposed method is simulated and then compared with basic genetic algorithm.

A novel intelligent method for task scheduling in multiprocessor systems using genetic algorithm

We develop a new method to map (i.e. allocate and schedule) real-time applications into certain multiprocessor systems. Its objectives are: the minimization of the number of processors used; and the minimization of the deadline missing time. Given a parallel program with real time constraints and a multiprocessor system, our method finds schedules of the program in the system which satisfy all the real time constraints with minimum number of processors. The minimization is carried out through a Pareto-based genetic algorithm which independently considers the both goals, because they are non-commensurable criteria. Experimental results show that our scheduling algorithm achieved better performance than previous ones. The advantage of our method is that the algorithm produces not a single solution but a family of solutions known as the Pareto-optimal set, out of which designers can select optimal solutions appropriate for their environmental conditions.

We consider using hardware and software redundancy to guarantee task deadlines in a hard real-time mu1 tiprocessor system even in the presence of processor failures. A set of scheduling requirements for the real-time fault-tolerant multiprocessor scheduling problem is first identified and a heuristic algorithm is then proposed to solve the problem. Experimental results show that the algorithm finds optimal solutions in most of the cases.

International Journal of Computer Sciences and Engineering (A UGC Approved and indexed with DOI, ICI and Approved, DPI Digital Library) is one of the leading and growing open access, peer-reviewed, monthly, and scientific research journal for scientists, engineers, research scholars, and academicians, which gains a foothold in Asia and opens to the world, aims to publish original, theoretical and practical advances in Computer Science,Information Technology, Engineering (Software, Mechanical, Civil, Electronics & Electrical), and all interdisciplinary streams of Computing Sciences. It intends to disseminate original, scientific, theoretical or applied research in the field of Computer Sciences and allied fields. It provides a platform for publishing results and research with a strong empirical component. It aims to bridge the significant gap between research and practice by promoting the publication of original, novel, industry-relevant research.

EDF (Earliest Deadline First) has been proved to be optimal scheduling algorithm for single processor real-time system. It also performs well for multiprocessor system. Limitation of EDF is that its performance decreases exponentially when system becomes slightly overloaded. ACO (Ant Colony Optimization) based scheduling algorithm performs well in both underloaded and overloaded conditions. But its limitation is that it takes more time for execution compared to EDF. In this paper, an adaptive algorithm for multiprocessor real-time system is proposed, which is combination of both of these algorithms. The proposed algorithm along with EDF and ACO based algorithm is simulated for real-time multiprocessor system and the results are obtained. The performance is measured in terms of Success Ratio (SR) and Effective CPU Utilization (ECU). Execution Time taken by each scheduling algorithm is also measured. From analysis and experiments, it reveals that the proposed algorithm is fast as well as efficient in both underloaded and overloaded conditions for real-time multiprocessor systems.

In this paper, we study the problem of allocating a set of periodic tasks on a multiprocessor system such that tasks are scheduled to meet their deadlines on individual processors by the Rate-Monotonic scheduling algorithm. A new schedulability condition is developed for the Rate-Monotonic scheduling that allows us to develop more efficient on-line allocation algorithms. Two on-line allocation algorithms—RM-FF and RM-BF are presented, and shown that their worst-case performance, over the optimal allocation, is upper bounded by 2.33 and lower bounded by 2.28. Then RM-FF and RM-BF are further improved to form two new algorithms: Refined-RM-FF (RRM-FF) and Refined-RM-BF (RRM-BF), both of which have a worst-case performance bound of 2. We also show that when the maximum allowable utilization of a task is small, the worst-case performance of all the new algorithms can be significantly improved. The worst-case performance bounds of RRM-FF and RRM-BF are currently the best bounds in the class of on-line scheduling algorithms proposed to solve the same scheduling problem. Simulation studies show that the average-case performance of the newly proposed algorithms is significantly superior to those in the existing literature.

Describes an approach to the problem of optimizing memory resource use in high-performance scalable computing systems. The approach is automatic and applicable to a wide variety of system architectures. It consists of a hybrid genetic algorithm optimizer (the Embedded Genetic Allocator or EGA), coupled with a high-precision software performance monitoring system. EGA requires no programmer knowledge of the underlying non-uniform memory access (NUMA) architecture of the target hardware; the programmer simply specifies the data buffers to be allocated and requires that certain groups of buffers share the same performance quality. EGA minimizes the execution time of time-critical portions of the target system by allocating target program data buffers to various memory banks in the NUMA architecture. These trial allocations are loaded and evaluated directly on the target hardware. Measurements of process execution time are derived from synchronized event logging of multiple processors performed by BBN TraceMaker/sup TM/. The timing data provides the information for an optimizer cost function which the genetic algorithm uses when selecting from amongst competing allocations. Thus, EGA automates the trial-and-error method of hand optimization. We have demonstrated EGA performing memory allocation optimizations on a typical VME-based multiprocessor DSP system and completed a set of optimization experiments. The results demonstrate that EGA can be used to optimize the memory allocation on a DSP with real-world code, and that the resulting optimizations can rival those generated manually by a skilled programmer.

The power consumption of modern high-performance processors is becoming a major concern because it leads to increased heat dissipation and decreased reliability. While many techniques have been proposed to reduce power consumption for uni-processors, there has been considerably less work on multi-processor systems. In this paper we focus on power-aware scheduling for multi-processor real-time systems. Based on the idea of slack sharing among processors, we propose two novel scheduling algorithms for task sets with and without precedence constraints. These scheduling techniques reclaim the time unused by a task to reduce the execution speed of future tasks, and thus reduce the total energy consumption of the system. Simulation results indicate that our algorithms achieve up to 60% energy savings on multi-processor systems with variable voltage processors.

MapReduce has emerged as an important and widely used programming model for distributed and parallel computing, due to its ease of use, generality and scalability. This model is proposed to mainly solve large-scale data processing, i.e. data-intensive jobs, and it is optimized for homogenous environment, in which computing nodes are identical and dedicated. Today enterprise IT systems preserve massive, historical management and operational data, which need both data-intensive and computation-intensive analysis while using heterogeneous computing resources. In order to support enterprise data analysis application with the MapReduce model, it is important to improve MapReduce's task scheduling algorithm that can reduce the overall completion time with multi-type jobs and in heterogeneous environments. This paper formulates the scheduling problem as an optimization problem. Based on the job shop scheduling theory and existing approximation algorithms, we propose a new dispatching-rule-based and online scheduling policy LPT-θ. By using LPT-θ, the tasks with larger processing time and within a θ-space would be assigned with higher priorities. Numerical results show that LPT-θ can achieve a 12%~45% performance gain compared with the original scheduling algorithm in MapReduce.

Reconfigurable hardware, in conjunction with soft-CPUs, has increasingly established itself in computer architecture education. In this paper we expand this approach into the area of distributed memory multi-processor systems.Arguments that supported the introduction of reconfigurable hardware as a substitute for commodity CPUs on educational computer architecture boards are equally applicable to teaching hardware that facilitates the construction and configuration of multiprocessor systems.The IEEE Standard for the Scalable Coherent Interface (SCI) was chosen as the interconnect technology because it enables the demonstration of the most important architecture concepts in this context. This interconnect exhibits high bandwidth and low latencies and not only specifies a hardware Distributed Shared Memory (DSM) architecture, but also defines cache coherence protocols. Consequently an implementation of this standard allows the design of Non-Uniform Memory Access (NUMA) and cache-coherent NUMA (ccNUMA) multiprocessor systems.

Commodity servers deployed in the data centers are now typically using the Non-Uniform Memory Access (NUMA) architecture. The NUMA multicore servers provide scalable system performance and cost-effective property. However, virtual machines (VMs) running on NUMA systems will access remote memory and contend for shared on-chip resources, which will decrease the overall performance of VMs and reduce the efficiency, fairness, and QoS that a virtualized system is capable to provide. In this paper, we propose a “Best NUMA Node” based virtual machine scheduling algorithm and implement it in a user-level scheduler that can periodically adjust the placement of VMs running on NUMA systems. Experimental results show that our NUMA-aware virtual machine scheduling algorithm is able to improve VM performance by up to 23.4% compared with the default CFS (Completely Fair Scheduler) scheduler used in KVM. Moreover, the algorithm achieves more stable virtual machine performance.KeywordsNUMAvirtual machineschedulingmemory locality

An important issue in the execution of programs on multiprocessor systems with non-uniform memory access times is data locality. Most of the dynamic scheduling algorithms deal well with load balance, but fail to take locality into account and, therefore, behave poorly on NUMA systems. In this paper we present a scheduling algorithm which has as its objective to increase data locality, and therefore performance, in problems based on elimination trees. We applied this scheduling to the modified Cholesky factorization as a case study. Experimental results on the SGI O2000 are shown.

In multiprocessor systems, a reasonable goal of the scheduler is to keep all processors as busy as possible. One technique for doing this is to allocate all available processors to the jobs waiting for service. Techniques which allocate all available processors are known as work-conserving policies. In this paper, non-work-conserving policies are examined. These policies keep some number of processors idle (i.e., unallocated) even when there are parallel jobs that are waiting for service. Such non-work-conserving policies set aside idle processors for anticipated new job arrivals or for unexpected system behavior. Two classes of non-work-conserving space-sharing policies are examined. One policy class keeps a certain percentage of the processors free. The other policy class makes an allocation decision based on previously observed system behavior. Two non-work-conserving policies, each selected from the two classes, are evaluated against their work-conserving counterparts. It is demonstrated that non-work-conserving policies can be particularly useful when the workload or the system behavior are irregular. Variability in the workload behavior including bursty arrivals, a high coefficient of variation in the workload execution time, unstable systems with processor failures are among the situations where non-work-conserving policies improve performance.

Hierarchical loop scheduling for clustered NUMA machines